com_aubus.c revision 1.2.14.3 1 /* $NetBSD: com_aubus.c,v 1.2.14.3 2007/09/03 14:27:53 yamt Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: com_aubus.c,v 1.2.14.3 2007/09/03 14:27:53 yamt Exp $");
40
41 #include <sys/param.h>
42 #include <sys/device.h>
43 #include <sys/lwp.h>
44 #include <sys/systm.h>
45 #include <sys/tty.h>
46
47 #include <machine/bus.h>
48 #include <dev/ic/comvar.h>
49
50 #include <mips/alchemy/include/aureg.h>
51 #include <mips/alchemy/include/auvar.h>
52 #include <mips/alchemy/include/aubusvar.h>
53 #include <mips/alchemy/dev/com_aubus_reg.h>
54
55 struct com_aubus_softc {
56 struct com_softc sc_com;
57 int sc_irq;
58 void *sc_ih;
59 };
60
61 static int com_aubus_probe(struct device *, struct cfdata *, void *);
62 static void com_aubus_attach(struct device *, struct device *, void *);
63 static int com_aubus_enable(struct com_softc *);
64 static void com_aubus_disable(struct com_softc *);
65 static void com_aubus_initmap(struct com_regs *);
66
67 CFATTACH_DECL(com_aubus, sizeof(struct com_aubus_softc),
68 com_aubus_probe, com_aubus_attach, NULL, NULL);
69
70 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
71
72 #ifndef COM_REGMAP
73 #error COM_REGMAP not defined!
74 #endif
75
76 int
77 com_aubus_probe(struct device *parent, struct cfdata *cf, void *aux)
78 {
79 struct aubus_attach_args *aa = aux;
80
81 /* match only aucom devices */
82 if (strcmp(aa->aa_name, cf->cf_name) == 0)
83 return (1);
84
85 return (0);
86 }
87
88 void
89 com_aubus_attach(struct device *parent, struct device *self, void *aux)
90 {
91 struct com_aubus_softc *asc = (void *)self;
92 struct com_softc *sc = &asc->sc_com;
93 struct aubus_attach_args *aa = aux;
94 int addr = aa->aa_addr;
95
96 sc->sc_regs.cr_iot = aa->aa_st;
97 sc->sc_regs.cr_iobase = addr;
98 asc->sc_irq = aa->aa_irq[0];
99
100 if (com_is_console(aa->aa_st, addr, &sc->sc_regs.cr_ioh) == 0 &&
101 bus_space_map(aa->aa_st, addr, AUCOM_NPORTS, 0,
102 &sc->sc_regs.cr_ioh) != 0) {
103 printf(": can't map i/o space\n");
104 return;
105 }
106 com_aubus_initmap(&sc->sc_regs);
107
108 /*
109 * The input to the clock divider is the internal pbus clock (1/4 the
110 * processor frequency). The actual baud rate of the interface will
111 * be pbus_freq / CLKDIV.
112 */
113 sc->sc_frequency = curcpu()->ci_cpu_freq / 4;
114
115 sc->sc_hwflags = COM_HW_NO_TXPRELOAD;
116 sc->sc_type = COM_TYPE_AU1x00;
117
118 sc->enable = com_aubus_enable;
119 sc->disable = com_aubus_disable;
120
121 /* Enable UART so we can access it. */
122 com_aubus_enable(sc);
123 sc->enabled = 1;
124
125 /* Attach MI com driver. */
126 com_attach_subr(sc);
127
128 /* Disable UART if it's not the console. (XXX kgdb?) */
129 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
130 com_aubus_disable(sc);
131 sc->enabled = 0;
132 }
133 }
134
135 int
136 com_aubus_enable(struct com_softc *sc)
137 {
138 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */
139
140 /* Ignore requests to enable an already enabled console. */
141 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && (asc->sc_ih != NULL))
142 return (0);
143
144 /* Enable the UART module. */
145 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, AUCOM_MODCTL,
146 UMC_ME | UMC_CE);
147
148 /* Establish the interrupt. */
149 asc->sc_ih = au_intr_establish(asc->sc_irq, 0, IPL_SERIAL, IST_LEVEL,
150 comintr, sc);
151 if (asc->sc_ih == NULL) {
152 printf("%s: unable to establish interrupt\n",
153 sc->sc_dev.dv_xname);
154 return (1);
155 }
156
157 return (0);
158 }
159
160 void
161 com_aubus_disable(struct com_softc *sc)
162 {
163 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */
164
165 /* Ignore requests to disable the console. */
166 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
167 return;
168
169 /* Disestablish the interrupt. */
170 au_intr_disestablish(asc->sc_ih);
171
172 /* Disable the UART module. */
173 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh,
174 AUCOM_MODCTL, 0);
175 }
176
177 void
178 com_aubus_initmap(struct com_regs *regsp)
179 {
180 regsp->cr_nports = AUCOM_NPORTS;
181 regsp->cr_map[COM_REG_RXDATA] = AUCOM_RXDATA;
182 regsp->cr_map[COM_REG_TXDATA] = AUCOM_TXDATA;
183 regsp->cr_map[COM_REG_DLBL] = AUCOM_DLB;
184 regsp->cr_map[COM_REG_DLBH] = AUCOM_DLB;
185 regsp->cr_map[COM_REG_IER] = AUCOM_IER;
186 regsp->cr_map[COM_REG_IIR] = AUCOM_IIR;
187 regsp->cr_map[COM_REG_FIFO] = AUCOM_FIFO;
188 regsp->cr_map[COM_REG_EFR] = 0;
189 regsp->cr_map[COM_REG_LCR] = AUCOM_LCTL;
190 regsp->cr_map[COM_REG_MCR] = AUCOM_MCR;
191 regsp->cr_map[COM_REG_LSR] = AUCOM_LSR;
192 regsp->cr_map[COM_REG_MSR] = AUCOM_MSR;
193 }
194
195 int
196 com_aubus_cnattach(bus_addr_t addr, int baud)
197 {
198 struct com_regs regs;
199 uint32_t sysfreq;
200
201 regs.cr_iot = aubus_st;
202 regs.cr_iobase = addr;
203 regs.cr_nports = AUCOM_NPORTS;
204 com_aubus_initmap(®s);
205
206 sysfreq = curcpu()->ci_cpu_freq / 4;
207
208 return comcnattach1(®s, baud, sysfreq, COM_TYPE_AU1x00, CONMODE);
209 }
210