com_aubus.c revision 1.2.4.2
1 /* $NetBSD: com_aubus.c,v 1.2.4.2 2006/08/11 15:42:14 yamt Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: com_aubus.c,v 1.2.4.2 2006/08/11 15:42:14 yamt Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/device.h> 43 #include <sys/systm.h> 44 #include <sys/tty.h> 45 46 #include <machine/bus.h> 47 #include <dev/ic/comvar.h> 48 49 #include <mips/alchemy/include/aureg.h> 50 #include <mips/alchemy/include/auvar.h> 51 #include <mips/alchemy/include/aubusvar.h> 52 #include <mips/alchemy/dev/com_aubus_reg.h> 53 54 struct com_aubus_softc { 55 struct com_softc sc_com; 56 int sc_irq; 57 void *sc_ih; 58 }; 59 60 static int com_aubus_probe(struct device *, struct cfdata *, void *); 61 static void com_aubus_attach(struct device *, struct device *, void *); 62 static int com_aubus_enable(struct com_softc *); 63 static void com_aubus_disable(struct com_softc *); 64 static void com_aubus_initmap(struct com_regs *); 65 66 CFATTACH_DECL(com_aubus, sizeof(struct com_aubus_softc), 67 com_aubus_probe, com_aubus_attach, NULL, NULL); 68 69 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 70 71 #ifndef COM_REGMAP 72 #error COM_REGMAP not defined! 73 #endif 74 75 int 76 com_aubus_probe(struct device *parent, struct cfdata *cf, void *aux) 77 { 78 struct aubus_attach_args *aa = aux; 79 80 /* match only aucom devices */ 81 if (strcmp(aa->aa_name, cf->cf_name) == 0) 82 return (1); 83 84 return (0); 85 } 86 87 void 88 com_aubus_attach(struct device *parent, struct device *self, void *aux) 89 { 90 struct com_aubus_softc *asc = (void *)self; 91 struct com_softc *sc = &asc->sc_com; 92 struct aubus_attach_args *aa = aux; 93 int addr = aa->aa_addr; 94 95 sc->sc_regs.cr_iot = aa->aa_st; 96 sc->sc_regs.cr_iobase = addr; 97 asc->sc_irq = aa->aa_irq[0]; 98 99 if (com_is_console(aa->aa_st, addr, &sc->sc_regs.cr_ioh) == 0 && 100 bus_space_map(aa->aa_st, addr, AUCOM_NPORTS, 0, 101 &sc->sc_regs.cr_ioh) != 0) { 102 printf(": can't map i/o space\n"); 103 return; 104 } 105 com_aubus_initmap(&sc->sc_regs); 106 107 /* 108 * The input to the clock divider is the internal pbus clock (1/4 the 109 * processor frequency). The actual baud rate of the interface will 110 * be pbus_freq / CLKDIV. 111 */ 112 sc->sc_frequency = curcpu()->ci_cpu_freq / 4; 113 114 sc->sc_hwflags = COM_HW_NO_TXPRELOAD; 115 sc->sc_type = COM_TYPE_AU1x00; 116 117 sc->enable = com_aubus_enable; 118 sc->disable = com_aubus_disable; 119 120 /* Enable UART so we can access it. */ 121 com_aubus_enable(sc); 122 sc->enabled = 1; 123 124 /* Attach MI com driver. */ 125 com_attach_subr(sc); 126 127 /* Disable UART if it's not the console. (XXX kgdb?) */ 128 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 129 com_aubus_disable(sc); 130 sc->enabled = 0; 131 } 132 } 133 134 int 135 com_aubus_enable(struct com_softc *sc) 136 { 137 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */ 138 139 /* Ignore requests to enable an already enabled console. */ 140 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && (asc->sc_ih != NULL)) 141 return (0); 142 143 /* Enable the UART module. */ 144 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, AUCOM_MODCTL, 145 UMC_ME | UMC_CE); 146 147 /* Establish the interrupt. */ 148 asc->sc_ih = au_intr_establish(asc->sc_irq, 0, IPL_SERIAL, IST_LEVEL, 149 comintr, sc); 150 if (asc->sc_ih == NULL) { 151 printf("%s: unable to establish interrupt\n", 152 sc->sc_dev.dv_xname); 153 return (1); 154 } 155 156 return (0); 157 } 158 159 void 160 com_aubus_disable(struct com_softc *sc) 161 { 162 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */ 163 164 /* Ignore requests to disable the console. */ 165 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 166 return; 167 168 /* Disestablish the interrupt. */ 169 au_intr_disestablish(asc->sc_ih); 170 171 /* Disable the UART module. */ 172 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, 173 AUCOM_MODCTL, 0); 174 } 175 176 void 177 com_aubus_initmap(struct com_regs *regsp) 178 { 179 regsp->cr_nports = AUCOM_NPORTS; 180 regsp->cr_map[COM_REG_RXDATA] = AUCOM_RXDATA; 181 regsp->cr_map[COM_REG_TXDATA] = AUCOM_TXDATA; 182 regsp->cr_map[COM_REG_DLBL] = AUCOM_DLB; 183 regsp->cr_map[COM_REG_DLBH] = AUCOM_DLB; 184 regsp->cr_map[COM_REG_IER] = AUCOM_IER; 185 regsp->cr_map[COM_REG_IIR] = AUCOM_IIR; 186 regsp->cr_map[COM_REG_FIFO] = AUCOM_FIFO; 187 regsp->cr_map[COM_REG_EFR] = 0; 188 regsp->cr_map[COM_REG_LCR] = AUCOM_LCTL; 189 regsp->cr_map[COM_REG_MCR] = AUCOM_MCR; 190 regsp->cr_map[COM_REG_LSR] = AUCOM_LSR; 191 regsp->cr_map[COM_REG_MSR] = AUCOM_MSR; 192 } 193 194 int 195 com_aubus_cnattach(bus_addr_t addr, int baud) 196 { 197 struct com_regs regs; 198 uint32_t sysfreq; 199 200 regs.cr_iot = aubus_st; 201 regs.cr_iobase = addr; 202 regs.cr_nports = AUCOM_NPORTS; 203 com_aubus_initmap(®s); 204 205 sysfreq = curcpu()->ci_cpu_freq / 4; 206 207 return comcnattach1(®s, baud, sysfreq, COM_TYPE_AU1x00, CONMODE); 208 } 209
Indexes created Thu Oct 16 14:10:15 GMT 2025