com_aubus.c revision 1.7
1 /* $NetBSD: com_aubus.c,v 1.7 2018/12/08 17:46:12 thorpej Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: com_aubus.c,v 1.7 2018/12/08 17:46:12 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/device.h> 43 #include <sys/lwp.h> 44 #include <sys/systm.h> 45 #include <sys/tty.h> 46 47 #include <sys/bus.h> 48 #include <dev/ic/comvar.h> 49 50 #include <mips/alchemy/include/aureg.h> 51 #include <mips/alchemy/include/auvar.h> 52 #include <mips/alchemy/include/aubusvar.h> 53 #include <mips/alchemy/dev/com_aubus_reg.h> 54 55 struct com_aubus_softc { 56 struct com_softc sc_com; 57 int sc_irq; 58 void *sc_ih; 59 }; 60 61 static int com_aubus_probe(device_t, cfdata_t , void *); 62 static void com_aubus_attach(device_t, device_t, void *); 63 static int com_aubus_enable(struct com_softc *); 64 static void com_aubus_disable(struct com_softc *); 65 static void com_aubus_init_regs(struct com_regs *, bus_space_tag_t, 66 bus_space_handle_t, bus_addr_t); 67 68 CFATTACH_DECL_NEW(com_aubus, sizeof(struct com_aubus_softc), 69 com_aubus_probe, com_aubus_attach, NULL, NULL); 70 71 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 72 73 #ifndef COM_REGMAP 74 #error COM_REGMAP not defined! 75 #endif 76 77 int 78 com_aubus_probe(device_t parent, cfdata_t cf, void *aux) 79 { 80 struct aubus_attach_args *aa = aux; 81 82 /* match only aucom devices */ 83 if (strcmp(aa->aa_name, cf->cf_name) == 0) 84 return (1); 85 86 return (0); 87 } 88 89 void 90 com_aubus_attach(device_t parent, device_t self, void *aux) 91 { 92 struct com_aubus_softc *asc = device_private(self); 93 struct com_softc *sc = &asc->sc_com; 94 struct aubus_attach_args *aa = aux; 95 bus_space_handle_t bsh; 96 int addr = aa->aa_addr; 97 98 sc->sc_dev = self; 99 asc->sc_irq = aa->aa_irq[0]; 100 101 if (com_is_console(aa->aa_st, addr, &bsh) == 0 && 102 bus_space_map(aa->aa_st, addr, AUCOM_NPORTS, 0, 103 &sc->sc_regs.cr_ioh) != 0) { 104 aprint_error(": can't map i/o space\n"); 105 return; 106 } 107 108 com_aubus_init_regs(&sc->sc_regs, aa->aa_st, bsh, addr); 109 110 /* 111 * The input to the clock divider is the internal pbus clock (1/4 the 112 * processor frequency). The actual baud rate of the interface will 113 * be pbus_freq / CLKDIV. 114 */ 115 sc->sc_frequency = curcpu()->ci_cpu_freq / 4; 116 117 sc->sc_hwflags = COM_HW_NO_TXPRELOAD; 118 sc->sc_type = COM_TYPE_AU1x00; 119 120 sc->enable = com_aubus_enable; 121 sc->disable = com_aubus_disable; 122 123 /* Enable UART so we can access it. */ 124 com_aubus_enable(sc); 125 sc->enabled = 1; 126 127 /* Attach MI com driver. */ 128 com_attach_subr(sc); 129 130 /* Disable UART if it's not the console. (XXX kgdb?) */ 131 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 132 com_aubus_disable(sc); 133 sc->enabled = 0; 134 } 135 } 136 137 int 138 com_aubus_enable(struct com_softc *sc) 139 { 140 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */ 141 142 /* Ignore requests to enable an already enabled console. */ 143 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && (asc->sc_ih != NULL)) 144 return (0); 145 146 /* Enable the UART module. */ 147 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, AUCOM_MODCTL, 148 UMC_ME | UMC_CE); 149 150 /* Establish the interrupt. */ 151 asc->sc_ih = au_intr_establish(asc->sc_irq, 0, IPL_SERIAL, IST_LEVEL, 152 comintr, sc); 153 if (asc->sc_ih == NULL) { 154 aprint_error_dev(sc->sc_dev, 155 "unable to establish interrupt\n"); 156 return (1); 157 } 158 159 return (0); 160 } 161 162 void 163 com_aubus_disable(struct com_softc *sc) 164 { 165 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */ 166 167 /* Ignore requests to disable the console. */ 168 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 169 return; 170 171 /* Disestablish the interrupt. */ 172 au_intr_disestablish(asc->sc_ih); 173 174 /* Disable the UART module. */ 175 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, 176 AUCOM_MODCTL, 0); 177 } 178 179 void 180 com_aubus_init_regs(struct com_regs *regsp, bus_space_tag_t bst, 181 bus_space_handle_t bsh, bus_addr_t addr) 182 { 183 184 com_init_regs(regsp, bst, bsh, addr); 185 186 regsp->cr_nports = AUCOM_NPORTS; 187 regsp->cr_map[COM_REG_RXDATA] = AUCOM_RXDATA; 188 regsp->cr_map[COM_REG_TXDATA] = AUCOM_TXDATA; 189 regsp->cr_map[COM_REG_DLBL] = AUCOM_DLB; 190 regsp->cr_map[COM_REG_DLBH] = AUCOM_DLB; 191 regsp->cr_map[COM_REG_IER] = AUCOM_IER; 192 regsp->cr_map[COM_REG_IIR] = AUCOM_IIR; 193 regsp->cr_map[COM_REG_FIFO] = AUCOM_FIFO; 194 regsp->cr_map[COM_REG_EFR] = 0; 195 regsp->cr_map[COM_REG_LCR] = AUCOM_LCTL; 196 regsp->cr_map[COM_REG_MCR] = AUCOM_MCR; 197 regsp->cr_map[COM_REG_LSR] = AUCOM_LSR; 198 regsp->cr_map[COM_REG_MSR] = AUCOM_MSR; 199 } 200 201 int 202 com_aubus_cnattach(bus_addr_t addr, int baud) 203 { 204 struct com_regs regs; 205 uint32_t sysfreq; 206 207 com_aubus_init_regs(®s, aubus_st, (bus_space_handle_t)0/*XXX*/, 208 addr); 209 210 sysfreq = curcpu()->ci_cpu_freq / 4; 211 212 return comcnattach1(®s, baud, sysfreq, COM_TYPE_AU1x00, CONMODE); 213 } 214
Indexes created Wed Oct 22 06:10:02 GMT 2025