ohci_aubus.c revision 1.1
1 /* $NetBSD: ohci_aubus.c,v 1.1 2003/04/01 17:36:45 hpeyerl Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Herb Peyerl of Middle Digital Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 43 #include <machine/bus.h> 44 45 #include <mips/alchemy/include/aureg.h> 46 #include <mips/alchemy/include/auvar.h> 47 #include <mips/alchemy/include/aubusvar.h> 48 49 #include <evbmips/alchemy/pb1000reg.h> 50 #include <evbmips/alchemy/pb1000_obiovar.h> 51 52 #include <dev/usb/usb.h> 53 #include <dev/usb/usbdi.h> 54 #include <dev/usb/usbdivar.h> 55 #include <dev/usb/usb_mem.h> 56 57 #include <dev/usb/ohcireg.h> 58 #include <dev/usb/ohcivar.h> 59 60 61 static int ohci_aubus_match(struct device *, struct cfdata *, void *); 62 static void ohci_aubus_attach(struct device *, struct device *, void *); 63 64 CFATTACH_DECL(ohci_aubus, sizeof (ohci_softc_t), 65 ohci_aubus_match, ohci_aubus_attach, NULL, NULL); 66 67 struct aubus_ohci_softc { 68 ohci_softc_t sc; 69 void *sc_ih; 70 }; 71 72 int 73 ohci_aubus_match(struct device *parent, struct cfdata *match, void *aux) 74 { 75 struct aubus_attach_args *aa = aux; 76 77 if (strcmp(aa->aa_name, match->cf_name) == 0) 78 return (1); 79 80 return (0); 81 } 82 83 void 84 ohci_aubus_attach(struct device *parent, struct device *self, void *aux) 85 { 86 struct aubus_ohci_softc *sc = (struct aubus_ohci_softc *)self; 87 usbd_status r; 88 uint32_t x, tmp; 89 struct aubus_attach_args *aa = aux; 90 91 r = 0; 92 93 sc->sc.sc_size = USBH_SIZE; 94 sc->sc.iot = aa->aa_st; 95 sc->sc.sc_bus.dmatag = (bus_dma_tag_t)aa->aa_dt; 96 97 if (bus_space_map(sc->sc.iot, USBH_BASE, USBH_SIZE, 0, &sc->sc.ioh)) { 98 printf("%s: Unable to map USBH registers\n", 99 sc->sc.sc_bus.bdev.dv_xname); 100 return; 101 } 102 /* 103 * Enable the USB Host controller here. 104 * As per 7.2 in the Au1500 manual: 105 * 106 * (1) Set CE bit to enable clocks. 107 * (2) Set E to enable OHCI 108 * (3) Clear HCFS in OHCI_CONTROL. 109 * (4) Wait for RD bit to be set. 110 */ 111 x = bus_space_read_4(sc->sc.iot, sc->sc.ioh, USBH_ENABLE); 112 x |= UE_CE; 113 bus_space_write_4(sc->sc.iot, sc->sc.ioh, USBH_ENABLE, x); 114 delay(10); 115 x |= (UE_E); 116 bus_space_write_4(sc->sc.iot, sc->sc.ioh, USBH_ENABLE, x); 117 delay(10); 118 x = bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_CONTROL); 119 x &= ~(OHCI_HCFS_MASK); 120 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_CONTROL, x); 121 delay(10); 122 for (x = 100; x; x--) { 123 tmp = bus_space_read_4(sc->sc.iot, sc->sc.ioh, USBH_ENABLE); 124 if (tmp&UE_RD) 125 break; 126 delay(1000); 127 } 128 printf(": Au1X00 OHCI\n"); 129 130 /* Disable OHCI interrupts */ 131 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 132 OHCI_ALL_INTRS); 133 /* hook interrupt */ 134 sc->sc_ih = au_intr_establish(aa->aa_irq[0], 0, IPL_USB, IST_LEVEL_LOW, 135 ohci_intr, sc); 136 if (sc->sc_ih == NULL) { 137 printf("%s: couldn't establish interrupt\n", 138 sc->sc.sc_bus.bdev.dv_xname); 139 } 140 141 if (x) 142 r = ohci_init(&sc->sc); 143 if (r != USBD_NORMAL_COMPLETION) { 144 printf("%s: init failed, error=%d\n", 145 sc->sc.sc_bus.bdev.dv_xname, r); 146 return; 147 } 148 149 /* Attach USB device */ 150 sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus, 151 usbctlprint); 152 153 } 154
Indexes created Mon Sep 29 18:09:42 GMT 2025