ohci_aubus.c revision 1.8
1 /* $NetBSD: ohci_aubus.c,v 1.8 2005/12/20 21:06:42 tron Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Herb Peyerl of Middle Digital Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ohci_aubus.c,v 1.8 2005/12/20 21:06:42 tron Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 46 #include <machine/bus.h> 47 48 #include <mips/alchemy/include/aureg.h> 49 #include <mips/alchemy/include/auvar.h> 50 #include <mips/alchemy/include/aubusvar.h> 51 52 #include <evbmips/alchemy/pb1000reg.h> 53 #include <evbmips/alchemy/pb1000_obiovar.h> 54 55 #include <dev/usb/usb.h> 56 #include <dev/usb/usbdi.h> 57 #include <dev/usb/usbdivar.h> 58 #include <dev/usb/usb_mem.h> 59 60 #include <dev/usb/ohcireg.h> 61 #include <dev/usb/ohcivar.h> 62 63 64 static int ohci_aubus_match(struct device *, struct cfdata *, void *); 65 static void ohci_aubus_attach(struct device *, struct device *, void *); 66 67 CFATTACH_DECL(ohci_aubus, sizeof (ohci_softc_t), 68 ohci_aubus_match, ohci_aubus_attach, NULL, NULL); 69 70 int 71 ohci_aubus_match(struct device *parent, struct cfdata *match, void *aux) 72 { 73 struct aubus_attach_args *aa = aux; 74 75 if (strcmp(aa->aa_name, match->cf_name) == 0) 76 return (1); 77 78 return (0); 79 } 80 81 void 82 ohci_aubus_attach(struct device *parent, struct device *self, void *aux) 83 { 84 ohci_softc_t *sc = (ohci_softc_t *)self; 85 void *ih; 86 usbd_status r; 87 uint32_t x, tmp; 88 bus_addr_t usbh_base, usbh_enable; 89 struct aubus_attach_args *aa = aux; 90 91 r = 0; 92 93 usbh_base = aa->aa_addrs[0]; 94 usbh_enable = aa->aa_addrs[1]; 95 sc->sc_size = aa->aa_addrs[2]; 96 sc->iot = aa->aa_st; 97 sc->sc_bus.dmatag = (bus_dma_tag_t)aa->aa_dt; 98 99 if (bus_space_map(sc->iot, usbh_base, sc->sc_size, 0, &sc->ioh)) { 100 printf("%s: Unable to map USBH registers\n", 101 sc->sc_bus.bdev.dv_xname); 102 return; 103 } 104 /* 105 * Enable the USB Host controller here. 106 * As per 7.2 in the Au1500 manual: 107 * 108 * (1) Set CE bit to enable clocks. 109 * (2) Set E to enable OHCI 110 * (3) Clear HCFS in OHCI_CONTROL. 111 * (4) Wait for RD bit to be set. 112 */ 113 x = bus_space_read_4(sc->iot, sc->ioh, usbh_enable); 114 x |= UE_CE; 115 bus_space_write_4(sc->iot, sc->ioh, usbh_enable, x); 116 delay(10); 117 x |= UE_E; 118 #ifdef __MIPSEB__ 119 x |= UE_BE; 120 #endif 121 bus_space_write_4(sc->iot, sc->ioh, usbh_enable, x); 122 delay(10); 123 x = bus_space_read_4(sc->iot, sc->ioh, OHCI_CONTROL); 124 x &= ~(OHCI_HCFS_MASK); 125 bus_space_write_4(sc->iot, sc->ioh, OHCI_CONTROL, x); 126 delay(10); 127 /* Need to read USBH_ENABLE twice in succession according to 128 * au1500 Errata #7. 129 */ 130 for (x = 100; x; x--) { 131 bus_space_read_4(sc->iot, sc->ioh, usbh_enable); 132 tmp = bus_space_read_4(sc->iot, sc->ioh, usbh_enable); 133 if (tmp&UE_RD) 134 break; 135 delay(1000); 136 } 137 printf(": Alchemy OHCI\n"); 138 139 /* Disable OHCI interrupts */ 140 bus_space_write_4(sc->iot, sc->ioh, OHCI_INTERRUPT_DISABLE, 141 OHCI_ALL_INTRS); 142 /* hook interrupt */ 143 ih = au_intr_establish(aa->aa_irq[0], 0, IPL_USB, IST_LEVEL_LOW, 144 ohci_intr, sc); 145 if (ih == NULL) { 146 printf("%s: couldn't establish interrupt\n", 147 sc->sc_bus.bdev.dv_xname); 148 } 149 150 sc->sc_endian = OHCI_HOST_ENDIAN; 151 152 if (x) 153 r = ohci_init(sc); 154 if (r != USBD_NORMAL_COMPLETION) { 155 printf("%s: init failed, error=%d\n", 156 sc->sc_bus.bdev.dv_xname, r); 157 au_intr_disestablish(ih); 158 return; 159 } 160 161 /* Attach USB device */ 162 sc->sc_child = config_found((void *)sc, &sc->sc_bus, usbctlprint); 163 164 } 165
Indexes created Sun Oct 19 22:09:57 GMT 2025