arbus.c revision 1.2
1 /* $Id: arbus.c,v 1.2 2006/04/02 05:41:32 gdamore Exp $ */ 2 /* 3 * Copyright (c) 2006 Urbana-Champaign Independent Media Center. 4 * Copyright (c) 2006 Garrett D'Amore. 5 * All rights reserved. 6 * 7 * This code was written by Garrett D'Amore for the Champaign-Urbana 8 * Community Wireless Network Project. 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer in the documentation and/or other materials provided 18 * with the distribution. 19 * 3. All advertising materials mentioning features or use of this 20 * software must display the following acknowledgements: 21 * This product includes software developed by the Urbana-Champaign 22 * Independent Media Center. 23 * This product includes software developed by Garrett D'Amore. 24 * 4. Urbana-Champaign Independent Media Center's name and Garrett 25 * D'Amore's name may not be used to endorse or promote products 26 * derived from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT 29 * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR 30 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 31 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT 33 * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, 34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 35 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 38 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 40 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: arbus.c,v 1.2 2006/04/02 05:41:32 gdamore Exp $"); 45 46 #include "locators.h" 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 #include <sys/extent.h> 51 #include <sys/malloc.h> 52 53 #define _MIPS_BUS_DMA_PRIVATE 54 #include <machine/bus.h> 55 #include <mips/atheros/include/ar531xreg.h> 56 #include <mips/atheros/include/ar531xvar.h> 57 #include <mips/atheros/include/arbusvar.h> 58 59 static int arbus_match(struct device *, struct cfdata *, void *); 60 static void arbus_attach(struct device *, struct device *, void *); 61 static int arbus_print(void *, const char *); 62 static void arbus_bus_mem_init(bus_space_tag_t, void *); 63 static void arbus_dma_init(struct device *, bus_dma_tag_t); 64 65 struct arbus_intrhand { 66 int ih_irq; 67 int ih_misc; 68 void *ih_cookie; 69 }; 70 71 CFATTACH_DECL(arbus, sizeof(struct device), arbus_match, arbus_attach, 72 NULL, NULL); 73 74 struct mips_bus_space arbus_mbst; 75 struct mips_bus_dma_tag arbus_mdt; 76 77 void 78 arbus_init(void) 79 { 80 static int done = 0; 81 if (done) 82 return; 83 done++; 84 85 arbus_bus_mem_init(&arbus_mbst, NULL); 86 arbus_dma_init(NULL, &arbus_mdt); 87 } 88 89 static struct { 90 const char *name; 91 bus_addr_t addr; 92 int irq; 93 uint32_t mask; 94 uint32_t reset; 95 uint32_t enable; 96 } arbus_devices[] = { 97 { 98 "ae", 99 AR531X_ENET0_BASE, 100 ARBUS_IRQ_ENET0, 101 AR531X_BOARD_CONFIG_ENET0, 102 AR531X_RESET_ENET0 | AR531X_RESET_PHY0, 103 AR531X_ENABLE_ENET0 104 }, 105 { 106 "ae", 107 AR531X_ENET1_BASE, 108 ARBUS_IRQ_ENET1, 109 AR531X_BOARD_CONFIG_ENET1, 110 AR531X_RESET_ENET1 | AR531X_RESET_PHY1, 111 AR531X_ENABLE_ENET1 112 }, 113 { 114 "com", 115 AR531X_UART0_BASE, 116 ARBUS_IRQ_UART0, 117 AR531X_BOARD_CONFIG_UART0, 118 0, 119 0, 120 }, 121 { 122 "com", 123 AR531X_UART1_BASE, 124 -1, 125 AR531X_BOARD_CONFIG_UART1, 126 0, 127 0, 128 }, 129 { 130 "ath", 131 AR531X_WLAN0_BASE, 132 ARBUS_IRQ_WLAN0, 133 AR531X_BOARD_CONFIG_WLAN0, 134 AR531X_RESET_WLAN0 | 135 AR531X_RESET_WARM_WLAN0_MAC | 136 AR531X_RESET_WARM_WLAN0_BB, 137 AR531X_ENABLE_WLAN0 138 }, 139 { 140 "ath", 141 AR531X_WLAN1_BASE, 142 ARBUS_IRQ_WLAN1, 143 AR531X_BOARD_CONFIG_WLAN1, 144 AR531X_RESET_WLAN1 | 145 AR531X_RESET_WARM_WLAN1_MAC | 146 AR531X_RESET_WARM_WLAN1_BB, 147 AR531X_ENABLE_WLAN1 148 }, 149 #if 0 150 { 151 "argpio", 152 AR531X_GPIO_BASE, 153 -1, 154 0, 155 0, 156 0 157 }, 158 #endif 159 { NULL } 160 }; 161 162 /* this primarily exists so we can get to the console... */ 163 bus_space_tag_t 164 arbus_get_bus_space_tag(void) 165 { 166 arbus_init(); 167 return (&arbus_mbst); 168 } 169 170 bus_dma_tag_t 171 arbus_get_bus_dma_tag(void) 172 { 173 arbus_init(); 174 return (&arbus_mdt); 175 } 176 177 int 178 arbus_match(struct device *parent, struct cfdata *match, void *aux) 179 { 180 181 return 1; 182 } 183 184 void 185 arbus_attach(struct device *parent, struct device *self, void *aux) 186 { 187 struct arbus_attach_args aa; 188 struct ar531x_board_info *info; 189 int i; 190 191 printf("\n"); 192 int locs[ARBUSCF_NLOCS]; 193 194 info = ar531x_board_info(); 195 arbus_init(); 196 197 for (i = 0; arbus_devices[i].name; i++) { 198 if ((arbus_devices[i].mask & info->ab_config) == 0) { 199 continue; 200 } 201 aa.aa_name = arbus_devices[i].name; 202 aa.aa_dmat = &arbus_mdt; 203 aa.aa_bst = &arbus_mbst; 204 aa.aa_irq = arbus_devices[i].irq; 205 aa.aa_addr = arbus_devices[i].addr; 206 207 if (aa.aa_addr < 0x1C000000) 208 aa.aa_size = 0x00100000; 209 else 210 aa.aa_size = 0x1000; 211 212 locs[ARBUSCF_ADDR] = aa.aa_addr; 213 214 if (arbus_devices[i].reset) { 215 /* put device into reset */ 216 PUTSYSREG(AR531X_SYSREG_RESETCTL, 217 GETSYSREG(AR531X_SYSREG_RESETCTL) | 218 arbus_devices[i].reset); 219 220 /* this could probably be a tsleep */ 221 delay(15000); 222 223 /* take it out of reset */ 224 PUTSYSREG(AR531X_SYSREG_RESETCTL, 225 GETSYSREG(AR531X_SYSREG_RESETCTL) & 226 ~arbus_devices[i].reset); 227 228 delay(25); 229 } 230 231 if (arbus_devices[i].enable) { 232 /* enable it */ 233 PUTSYSREG(AR531X_SYSREG_ENABLE, 234 GETSYSREG(AR531X_SYSREG_ENABLE) | 235 arbus_devices[i].enable); 236 } 237 238 (void) config_found_sm_loc(self, "arbus", locs, &aa, 239 arbus_print, config_stdsubmatch); 240 } 241 } 242 243 int 244 arbus_print(void *aux, const char *pnp) 245 { 246 struct arbus_attach_args *aa = aux; 247 248 if (pnp) 249 aprint_normal("%s at %s", aa->aa_name, pnp); 250 251 if (aa->aa_addr) 252 aprint_normal(" addr 0x%lx", aa->aa_addr); 253 254 if (aa->aa_irq >= 0) { 255 aprint_normal(" interrupt %d", ARBUS_IRQ_CPU(aa->aa_irq)); 256 257 if (ARBUS_IRQ_MISC(aa->aa_irq)) 258 aprint_normal(" irq %d", ARBUS_IRQ_MISC(aa->aa_irq)); 259 } 260 261 return (UNCONF); 262 } 263 264 void * 265 arbus_intr_establish(int irq, int (*handler)(void *), void *arg) 266 { 267 struct arbus_intrhand *ih; 268 269 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT); 270 if (ih == NULL) 271 return NULL; 272 273 ih->ih_irq = irq; 274 ih->ih_cookie = NULL; 275 276 if (ARBUS_IRQ_MISC(irq)) { 277 irq = ARBUS_IRQ_MISC(irq); 278 ih->ih_misc = 1; 279 ih->ih_cookie = ar531x_misc_intr_establish(irq, handler, arg); 280 } else { 281 irq = ARBUS_IRQ_CPU(irq); 282 ih->ih_misc = 0; 283 ih->ih_cookie = ar531x_intr_establish(irq, handler, arg); 284 } 285 286 if (ih->ih_cookie == NULL) { 287 free(ih, M_DEVBUF); 288 return NULL; 289 } 290 return ih; 291 } 292 293 void 294 arbus_intr_disestablish(void *arg) 295 { 296 struct arbus_intrhand *ih = arg; 297 if (ih->ih_misc) 298 ar531x_misc_intr_disestablish(ih->ih_cookie); 299 else 300 ar531x_intr_disestablish(ih->ih_cookie); 301 free(ih, M_DEVBUF); 302 } 303 304 305 void 306 arbus_dma_init(struct device *sc, bus_dma_tag_t pdt) 307 { 308 bus_dma_tag_t t; 309 310 t = pdt; 311 t->_cookie = sc; 312 t->_wbase = 0; 313 t->_physbase = 0; 314 t->_wsize = MIPS_KSEG1_START - MIPS_KSEG0_START; 315 t->_dmamap_create = _bus_dmamap_create; 316 t->_dmamap_destroy = _bus_dmamap_destroy; 317 t->_dmamap_load = _bus_dmamap_load; 318 t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 319 t->_dmamap_load_uio = _bus_dmamap_load_uio; 320 t->_dmamap_load_raw = _bus_dmamap_load_raw; 321 t->_dmamap_unload = _bus_dmamap_unload; 322 t->_dmamap_sync = _bus_dmamap_sync; 323 t->_dmamem_alloc = _bus_dmamem_alloc; 324 t->_dmamem_free = _bus_dmamem_free; 325 t->_dmamem_map = _bus_dmamem_map; 326 t->_dmamem_unmap = _bus_dmamem_unmap; 327 t->_dmamem_mmap = _bus_dmamem_mmap; 328 } 329 330 /* 331 * CPU memory/register stuff 332 */ 333 334 #define CHIP arbus 335 #define CHIP_MEM /* defined */ 336 #define CHIP_W1_BUS_START(v) 0x00000000UL 337 #define CHIP_W1_BUS_END(v) 0x1fffffffUL 338 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v) 339 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) 340 341 #include <mips/mips/bus_space_alignstride_chipdep.c> 342
Indexes created Sun Oct 19 02:09:48 GMT 2025