argpio.c revision 1.1 1 /* $NetBSD: argpio.c,v 1.1 2006/07/07 22:03:19 gdamore Exp $ */
2
3 /*-
4 * Copyright (c) 2006 Garrett D'Amore
5 * All rights reserved.
6 *
7 * Written by Garrett D'Amore.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse
18 * or promote products derived from this software without specific
19 * prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
27 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
30 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: argpio.c,v 1.1 2006/07/07 22:03:19 gdamore Exp $");
36
37 #include <sys/param.h>
38 #include <sys/conf.h>
39 #include <sys/kernel.h>
40 #include <sys/types.h>
41 #include <sys/device.h>
42 #include <sys/gpio.h>
43
44 #include <machine/bus.h>
45 #include <machine/intr.h>
46
47 #include <mips/atheros/include/ar531xreg.h>
48 #include <mips/atheros/include/ar531xvar.h>
49 #include <mips/atheros/include/arbusvar.h>
50
51 #include <contrib/dev/ath/ah_soc.h> /* this should really move */
52
53 #include <dev/gpio/gpiovar.h>
54 #include <dev/sysmon/sysmonvar.h>
55 #include <dev/sysmon/sysmon_taskq.h>
56
57 #include <mips/atheros/dev/argpioreg.h>
58
59 /*
60 * General Plan:
61 *
62 * Register GPIOs for all pins that are _not_ associated with the reset
63 * pin. (Possibly also not the sytem LED.)
64 */
65
66 struct argpio_softc {
67 struct device sc_dev;
68 struct gpio_chipset_tag sc_gc;
69 gpio_pin_t sc_pins[ARGPIO_NPINS];
70 int sc_npins;
71 bus_space_tag_t sc_st;
72 bus_space_handle_t sc_sh;
73 bus_size_t sc_size;
74 int sc_caps;
75 struct sysmon_pswitch sc_resetbtn;
76 void *sc_ih;
77 int sc_rstpin;
78 };
79
80 static int argpio_match(struct device *, struct cfdata *, void *);
81 static void argpio_attach(struct device *, struct device *, void *);
82 static int argpio_intr(void *);
83 static void argpio_reset_pressed(void *);
84 static void argpio_ctl(void *, int, int);
85 static void argpio_write(void *, int, int);
86 static int argpio_read(void *, int);
87
88 CFATTACH_DECL(argpio, sizeof (struct argpio_softc), argpio_match,
89 argpio_attach, NULL, NULL);
90
91 #define INPUT(pin) (1 << (pin)) /* input bit */
92 #define INTR(pin) (1 << ((pin) + 8)) /* interrupt bit */
93 #define SERIAL(pin) (1 << ((pin) + 16)) /* serial mux bit */
94
95 #define GETREG(sc, o) bus_space_read_4(sc->sc_st, sc->sc_sh, o)
96 #define PUTREG(sc, o, v) bus_space_write_4(sc->sc_st, sc->sc_sh, o, v)
97 #define FLUSH(sc) bus_space_barrier(sc->sc_st, sc->sc_sh, \
98 0, 12, BUS_SPACE_BARRIER_SYNC)
99
100 int
101 argpio_match(struct device *parent, struct cfdata *match, void *aux)
102 {
103 struct arbus_attach_args *aa = aux;
104
105 return ((strcmp(aa->aa_name, "argpio") == 0) ? 1 : 0);
106 }
107
108 void
109 argpio_attach(struct device *parent, struct device *self, void *aux)
110 {
111 struct argpio_softc *sc = (struct argpio_softc *)self;
112 struct arbus_attach_args *aa = aux;
113 struct gpiobus_attach_args gba;
114 const struct ar531x_boarddata *board;
115 int rstpin = -1, ledpin = -1, i;
116 uint32_t reg;
117
118 sc->sc_st = aa->aa_bst;
119 sc->sc_npins = ARGPIO_NPINS;
120 sc->sc_size = aa->aa_size;
121
122 if (bus_space_map(sc->sc_st, aa->aa_addr, sc->sc_size, 0,
123 &sc->sc_sh) != 0) {
124 printf(": unable to map registers!\n");
125 return;
126 }
127
128 sc->sc_gc.gp_cookie = sc;
129 sc->sc_gc.gp_pin_read = argpio_read;
130 sc->sc_gc.gp_pin_write = argpio_write;
131 sc->sc_gc.gp_pin_ctl = argpio_ctl;
132
133 board = ar531x_board_info();
134
135 aprint_normal(": Atheros AR531X GPIO");
136 if (board->config & BD_RSTFACTORY) {
137 rstpin = board->resetConfigGpio;
138 aprint_normal(", reset button pin %d", rstpin);
139 sc->sc_rstpin = rstpin;
140 }
141 if (board->config & BD_SYSLED) {
142 ledpin = board->sysLedGpio;
143 aprint_normal(", system led pin %d", ledpin);
144 }
145 printf("\n");
146
147 if ((board->config & BD_RSTFACTORY) && (aa->aa_irq > -1)) {
148 sc->sc_ih = arbus_intr_establish(aa->aa_irq, argpio_intr, sc);
149 if (sc->sc_ih == NULL) {
150 aprint_error("%s: couldn't establish interrupt\n",
151 sc->sc_dev.dv_xname);
152 }
153
154 }
155
156 if (sc->sc_ih) {
157 sysmon_task_queue_init();
158
159 sc->sc_resetbtn.smpsw_name = sc->sc_dev.dv_xname;
160 sc->sc_resetbtn.smpsw_type = PSWITCH_TYPE_RESET;
161 if (sysmon_pswitch_register(&sc->sc_resetbtn) != 0)
162 printf("%s: unable to register reset button\n",
163 sc->sc_dev.dv_xname);
164 }
165
166 reg = GETREG(sc, GPIO_CR);
167
168 for (i = 0; i < sc->sc_npins; i++) {
169 gpio_pin_t *pp;
170
171 pp = &sc->sc_pins[i];
172
173 if (i == rstpin) {
174 /* configure as interrupt for reset */
175 pp->pin_caps = GPIO_PIN_INPUT;
176 reg &= ~SERIAL(i);
177 reg |= INPUT(i);
178 /* only if we were able to set up the handler, tho' */
179 if (sc->sc_ih != NULL)
180 reg |= INTR(i);
181
182 } else if (i == ledpin) {
183 /* configure as output for LED */
184 pp->pin_caps = GPIO_PIN_OUTPUT;
185 reg &= ~SERIAL(i);
186 reg &= ~INPUT(i);
187 reg &= ~INTR(i);
188
189 } else {
190 if (reg & SERIAL(i)) {
191 /* pin multiplexed with serial bit */
192 pp->pin_caps = 0;
193 } else {
194 pp->pin_caps = GPIO_PIN_INPUT |
195 GPIO_PIN_OUTPUT;
196 }
197 }
198 }
199
200 PUTREG(sc, GPIO_CR, reg);
201 FLUSH(sc);
202
203 gba.gba_gc = &sc->sc_gc;
204 gba.gba_pins = sc->sc_pins;
205 gba.gba_npins = sc->sc_npins;
206 config_found_ia(&sc->sc_dev, "gpiobus", &gba, gpiobus_print);
207 }
208
209 void
210 argpio_ctl(void *arg, int pin, int flags)
211 {
212 struct argpio_softc *sc = arg;
213 uint32_t reg;
214
215 reg = GETREG(sc, GPIO_CR);
216 if (reg & (SERIAL(pin) | INTR(pin))) {
217 printf("pin %d cannot be changed!\n", pin);
218 /* don't allow changes to these bits */
219 return;
220 }
221 if (flags & GPIO_PIN_INPUT) {
222 reg |= INPUT(pin);
223 } else {
224 reg &= ~INPUT(pin);
225 }
226
227 PUTREG(sc, GPIO_CR, reg);
228 FLUSH(sc);
229 }
230
231 void
232 argpio_write(void *arg, int pin, int value)
233 {
234 struct argpio_softc *sc = arg;
235 uint32_t reg;
236
237 reg = GETREG(sc, GPIO_DO);
238 if (value)
239 reg &= ~(1 << pin);
240 else
241 reg |= (1 << pin);
242 PUTREG(sc, GPIO_DO, reg);
243 FLUSH(sc);
244 }
245
246 int
247 argpio_read(void *arg, int pin)
248 {
249 struct argpio_softc *sc = arg;
250
251 return ((GETREG(sc, GPIO_DI) & (1 << pin)) ?
252 GPIO_PIN_HIGH : GPIO_PIN_LOW);
253 }
254
255 void
256 argpio_reset_pressed(void *arg)
257 {
258 struct argpio_softc *sc = arg;
259 int x;
260
261 sysmon_pswitch_event(&sc->sc_resetbtn, PSWITCH_EVENT_PRESSED);
262
263 /* reenable the interrupt */
264 x = splhigh();
265 PUTREG(sc, GPIO_CR,
266 GETREG(sc, GPIO_CR) | INTR(sc->sc_rstpin));
267 splx(x);
268 }
269
270 int
271 argpio_intr(void *arg)
272 {
273 struct argpio_softc *sc = arg;
274
275 if (sc->sc_rstpin < 0)
276 return 0;
277
278 /* this is an edge triggered interrupt, so disable it for now */
279 PUTREG(sc, GPIO_CR, GETREG(sc, GPIO_CR) & ~INTR(sc->sc_rstpin));
280
281 /* no other interrupt on this, so we have to claim it */
282 sysmon_task_queue_sched(0, argpio_reset_pressed, sc);
283
284 return 1;
285 }
286