if_cnmac.c revision 1.13 1 1.13 msaitoh /* $NetBSD: if_cnmac.c,v 1.13 2019/05/29 07:46:08 msaitoh Exp $ */
2 1.1 hikaru
3 1.1 hikaru #include <sys/cdefs.h>
4 1.1 hikaru #if 0
5 1.13 msaitoh __KERNEL_RCSID(0, "$NetBSD: if_cnmac.c,v 1.13 2019/05/29 07:46:08 msaitoh Exp $");
6 1.1 hikaru #endif
7 1.1 hikaru
8 1.1 hikaru #include "opt_octeon.h"
9 1.1 hikaru
10 1.1 hikaru #ifdef OCTEON_ETH_DEBUG
11 1.1 hikaru
12 1.1 hikaru #ifndef DIAGNOSTIC
13 1.1 hikaru #define DIAGNOSTIC
14 1.1 hikaru #endif
15 1.1 hikaru
16 1.1 hikaru #ifndef DEBUG
17 1.1 hikaru #define DEBUG
18 1.1 hikaru #endif
19 1.1 hikaru
20 1.1 hikaru #endif
21 1.1 hikaru
22 1.1 hikaru /*
23 1.1 hikaru * If no free send buffer is available, free all the sent buffer and bail out.
24 1.1 hikaru */
25 1.1 hikaru #define OCTEON_ETH_SEND_QUEUE_CHECK
26 1.1 hikaru
27 1.1 hikaru /* XXX XXX XXX XXX XXX XXX */
28 1.1 hikaru
29 1.1 hikaru #include <sys/param.h>
30 1.1 hikaru #include <sys/systm.h>
31 1.1 hikaru #include <sys/pool.h>
32 1.1 hikaru #include <sys/mbuf.h>
33 1.1 hikaru #include <sys/malloc.h>
34 1.1 hikaru #include <sys/kernel.h>
35 1.1 hikaru #include <sys/socket.h>
36 1.1 hikaru #include <sys/ioctl.h>
37 1.1 hikaru #include <sys/errno.h>
38 1.1 hikaru #include <sys/device.h>
39 1.1 hikaru #include <sys/queue.h>
40 1.1 hikaru #include <sys/conf.h>
41 1.1 hikaru #include <sys/sysctl.h>
42 1.1 hikaru #include <sys/syslog.h>
43 1.1 hikaru
44 1.1 hikaru #include <net/if.h>
45 1.1 hikaru #include <net/if_dl.h>
46 1.1 hikaru #include <net/if_media.h>
47 1.1 hikaru #include <net/if_ether.h>
48 1.1 hikaru #include <net/route.h>
49 1.1 hikaru #include <net/bpf.h>
50 1.1 hikaru
51 1.1 hikaru #include <netinet/in.h>
52 1.1 hikaru #include <netinet/in_systm.h>
53 1.1 hikaru #include <netinet/in_var.h>
54 1.1 hikaru #include <netinet/ip.h>
55 1.1 hikaru
56 1.1 hikaru #include <sys/bus.h>
57 1.1 hikaru #include <machine/intr.h>
58 1.1 hikaru #include <machine/endian.h>
59 1.1 hikaru #include <machine/locore.h>
60 1.1 hikaru
61 1.1 hikaru #include <dev/mii/mii.h>
62 1.1 hikaru #include <dev/mii/miivar.h>
63 1.1 hikaru
64 1.1 hikaru #include <mips/cpuregs.h>
65 1.1 hikaru
66 1.1 hikaru #include <mips/cavium/dev/octeon_asxreg.h>
67 1.1 hikaru #include <mips/cavium/dev/octeon_ciureg.h>
68 1.1 hikaru #include <mips/cavium/dev/octeon_npireg.h>
69 1.1 hikaru #include <mips/cavium/dev/octeon_gmxreg.h>
70 1.1 hikaru #include <mips/cavium/dev/octeon_ipdreg.h>
71 1.1 hikaru #include <mips/cavium/dev/octeon_pipreg.h>
72 1.1 hikaru #include <mips/cavium/dev/octeon_powreg.h>
73 1.1 hikaru #include <mips/cavium/dev/octeon_faureg.h>
74 1.1 hikaru #include <mips/cavium/dev/octeon_fpareg.h>
75 1.1 hikaru #include <mips/cavium/dev/octeon_bootbusreg.h>
76 1.1 hikaru #include <mips/cavium/include/iobusvar.h>
77 1.1 hikaru #include <mips/cavium/octeonvar.h>
78 1.1 hikaru #include <mips/cavium/dev/octeon_fpavar.h>
79 1.1 hikaru #include <mips/cavium/dev/octeon_gmxvar.h>
80 1.1 hikaru #include <mips/cavium/dev/octeon_fauvar.h>
81 1.1 hikaru #include <mips/cavium/dev/octeon_powvar.h>
82 1.1 hikaru #include <mips/cavium/dev/octeon_ipdvar.h>
83 1.1 hikaru #include <mips/cavium/dev/octeon_pipvar.h>
84 1.1 hikaru #include <mips/cavium/dev/octeon_pkovar.h>
85 1.1 hikaru #include <mips/cavium/dev/octeon_asxvar.h>
86 1.1 hikaru #include <mips/cavium/dev/octeon_smivar.h>
87 1.1 hikaru #include <mips/cavium/dev/if_cnmacvar.h>
88 1.1 hikaru
89 1.1 hikaru #ifdef OCTEON_ETH_DEBUG
90 1.1 hikaru #define OCTEON_ETH_KASSERT(x) KASSERT(x)
91 1.1 hikaru #define OCTEON_ETH_KDASSERT(x) KDASSERT(x)
92 1.1 hikaru #else
93 1.1 hikaru #define OCTEON_ETH_KASSERT(x)
94 1.1 hikaru #define OCTEON_ETH_KDASSERT(x)
95 1.1 hikaru #endif
96 1.1 hikaru
97 1.1 hikaru /*
98 1.1 hikaru * Set the PKO to think command buffers are an odd length. This makes it so we
99 1.1 hikaru * never have to divide a comamnd across two buffers.
100 1.1 hikaru */
101 1.1 hikaru #define OCTEON_POOL_NWORDS_CMD \
102 1.1 hikaru (((uint32_t)OCTEON_POOL_SIZE_CMD / sizeof(uint64_t)) - 1)
103 1.1 hikaru #define FPA_COMMAND_BUFFER_POOL_NWORDS OCTEON_POOL_NWORDS_CMD /* XXX */
104 1.1 hikaru
105 1.12 msaitoh static void octeon_eth_buf_init(struct octeon_eth_softc *);
106 1.1 hikaru
107 1.1 hikaru static int octeon_eth_match(device_t, struct cfdata *, void *);
108 1.1 hikaru static void octeon_eth_attach(device_t, device_t, void *);
109 1.1 hikaru static void octeon_eth_pip_init(struct octeon_eth_softc *);
110 1.1 hikaru static void octeon_eth_ipd_init(struct octeon_eth_softc *);
111 1.1 hikaru static void octeon_eth_pko_init(struct octeon_eth_softc *);
112 1.1 hikaru static void octeon_eth_asx_init(struct octeon_eth_softc *);
113 1.1 hikaru static void octeon_eth_smi_init(struct octeon_eth_softc *);
114 1.1 hikaru
115 1.12 msaitoh static void octeon_eth_board_mac_addr(uint8_t *, size_t,
116 1.12 msaitoh struct octeon_eth_softc *);
117 1.1 hikaru
118 1.11 msaitoh static int octeon_eth_mii_readreg(device_t, int, int, uint16_t *);
119 1.11 msaitoh static int octeon_eth_mii_writereg(device_t, int, int, uint16_t);
120 1.1 hikaru static void octeon_eth_mii_statchg(struct ifnet *);
121 1.1 hikaru
122 1.1 hikaru static int octeon_eth_mediainit(struct octeon_eth_softc *);
123 1.1 hikaru static void octeon_eth_mediastatus(struct ifnet *, struct ifmediareq *);
124 1.1 hikaru static int octeon_eth_mediachange(struct ifnet *);
125 1.1 hikaru
126 1.12 msaitoh static inline void octeon_eth_send_queue_flush_prefetch(struct octeon_eth_softc *);
127 1.12 msaitoh static inline void octeon_eth_send_queue_flush_fetch(struct octeon_eth_softc *);
128 1.12 msaitoh static inline void octeon_eth_send_queue_flush(struct octeon_eth_softc *);
129 1.12 msaitoh static inline void octeon_eth_send_queue_flush_sync(struct octeon_eth_softc *);
130 1.12 msaitoh static inline int octeon_eth_send_queue_is_full(struct octeon_eth_softc *);
131 1.12 msaitoh static inline void octeon_eth_send_queue_add(struct octeon_eth_softc *,
132 1.12 msaitoh struct mbuf *, uint64_t *);
133 1.12 msaitoh static inline void octeon_eth_send_queue_del(struct octeon_eth_softc *,
134 1.12 msaitoh struct mbuf **, uint64_t **);
135 1.12 msaitoh static inline int octeon_eth_buf_free_work(struct octeon_eth_softc *,
136 1.12 msaitoh uint64_t *, uint64_t);
137 1.12 msaitoh static inline void octeon_eth_buf_ext_free_m(struct mbuf *, void *, size_t,
138 1.12 msaitoh void *);
139 1.12 msaitoh static inline void octeon_eth_buf_ext_free_ext(struct mbuf *, void *, size_t,
140 1.12 msaitoh void *);
141 1.1 hikaru
142 1.1 hikaru static int octeon_eth_ioctl(struct ifnet *, u_long, void *);
143 1.1 hikaru static void octeon_eth_watchdog(struct ifnet *);
144 1.1 hikaru static int octeon_eth_init(struct ifnet *);
145 1.1 hikaru static void octeon_eth_stop(struct ifnet *, int);
146 1.1 hikaru static void octeon_eth_start(struct ifnet *);
147 1.1 hikaru
148 1.12 msaitoh static inline int octeon_eth_send_cmd(struct octeon_eth_softc *, uint64_t,
149 1.12 msaitoh uint64_t, int *);
150 1.1 hikaru static inline uint64_t octeon_eth_send_makecmd_w1(int, paddr_t);
151 1.12 msaitoh static inline uint64_t octeon_eth_send_makecmd_w0(uint64_t, uint64_t, size_t,
152 1.12 msaitoh int);
153 1.12 msaitoh static inline int octeon_eth_send_makecmd_gbuf(struct octeon_eth_softc *,
154 1.12 msaitoh struct mbuf *, uint64_t *, int *);
155 1.12 msaitoh static inline int octeon_eth_send_makecmd(struct octeon_eth_softc *,
156 1.12 msaitoh struct mbuf *, uint64_t *, uint64_t *, uint64_t *);
157 1.12 msaitoh static inline int octeon_eth_send_buf(struct octeon_eth_softc *,
158 1.12 msaitoh struct mbuf *, uint64_t *, int *);
159 1.12 msaitoh static inline int octeon_eth_send(struct octeon_eth_softc *,
160 1.12 msaitoh struct mbuf *, int *);
161 1.1 hikaru
162 1.1 hikaru static int octeon_eth_reset(struct octeon_eth_softc *);
163 1.1 hikaru static int octeon_eth_configure(struct octeon_eth_softc *);
164 1.1 hikaru static int octeon_eth_configure_common(struct octeon_eth_softc *);
165 1.1 hikaru
166 1.12 msaitoh static void octeon_eth_tick_free(void *);
167 1.1 hikaru static void octeon_eth_tick_misc(void *);
168 1.1 hikaru
169 1.12 msaitoh static inline int octeon_eth_recv_mbuf(struct octeon_eth_softc *,
170 1.12 msaitoh uint64_t *, struct mbuf **);
171 1.12 msaitoh static inline int octeon_eth_recv_check_code(struct octeon_eth_softc *,
172 1.12 msaitoh uint64_t);
173 1.12 msaitoh static inline int octeon_eth_recv_check_jumbo(struct octeon_eth_softc *,
174 1.12 msaitoh uint64_t);
175 1.12 msaitoh static inline int octeon_eth_recv_check_link(struct octeon_eth_softc *,
176 1.12 msaitoh uint64_t);
177 1.12 msaitoh static inline int octeon_eth_recv_check(struct octeon_eth_softc *,
178 1.12 msaitoh uint64_t);
179 1.12 msaitoh static inline int octeon_eth_recv(struct octeon_eth_softc *, uint64_t *);
180 1.12 msaitoh static void octeon_eth_recv_redir(struct ifnet *, struct mbuf *);
181 1.12 msaitoh static inline void octeon_eth_recv_intr(void *, uint64_t *);
182 1.1 hikaru
183 1.12 msaitoh /* Device driver context */
184 1.1 hikaru static struct octeon_eth_softc *octeon_eth_gsc[GMX_PORT_NUNITS];
185 1.1 hikaru static void *octeon_eth_pow_recv_ih;
186 1.1 hikaru
187 1.1 hikaru /* sysctl'able parameters */
188 1.1 hikaru int octeon_eth_param_pko_cmd_w0_n2 = 1;
189 1.1 hikaru int octeon_eth_param_pip_dyn_rs = 1;
190 1.1 hikaru int octeon_eth_param_redir = 0;
191 1.1 hikaru int octeon_eth_param_pktbuf = 0;
192 1.1 hikaru int octeon_eth_param_rate = 0;
193 1.1 hikaru int octeon_eth_param_intr = 0;
194 1.1 hikaru
195 1.1 hikaru CFATTACH_DECL_NEW(cnmac, sizeof(struct octeon_eth_softc),
196 1.1 hikaru octeon_eth_match, octeon_eth_attach, NULL, NULL);
197 1.1 hikaru
198 1.1 hikaru #ifdef OCTEON_ETH_DEBUG
199 1.1 hikaru
200 1.1 hikaru static const struct octeon_evcnt_entry octeon_evcnt_entries[] = {
201 1.1 hikaru #define _ENTRY(name, type, parent, descr) \
202 1.1 hikaru OCTEON_EVCNT_ENTRY(struct octeon_eth_softc, name, type, parent, descr)
203 1.1 hikaru _ENTRY(rx, MISC, NULL, "rx"),
204 1.1 hikaru _ENTRY(rxint, INTR, NULL, "rx intr"),
205 1.1 hikaru _ENTRY(rxrs, MISC, NULL, "rx dynamic short"),
206 1.1 hikaru _ENTRY(rxbufpkalloc, MISC, NULL, "rx buf pkt alloc"),
207 1.1 hikaru _ENTRY(rxbufpkput, MISC, NULL, "rx buf pkt put"),
208 1.1 hikaru _ENTRY(rxbufwqalloc, MISC, NULL, "rx buf wqe alloc"),
209 1.1 hikaru _ENTRY(rxbufwqput, MISC, NULL, "rx buf wqe put"),
210 1.1 hikaru _ENTRY(rxerrcode, MISC, NULL, "rx code error"),
211 1.1 hikaru _ENTRY(rxerrfix, MISC, NULL, "rx fixup error"),
212 1.1 hikaru _ENTRY(rxerrjmb, MISC, NULL, "rx jmb error"),
213 1.1 hikaru _ENTRY(rxerrlink, MISC, NULL, "rx link error"),
214 1.1 hikaru _ENTRY(rxerroff, MISC, NULL, "rx offload error"),
215 1.1 hikaru _ENTRY(rxonperrshort, MISC, NULL, "rx onp fixup short error"),
216 1.1 hikaru _ENTRY(rxonperrpreamble, MISC, NULL, "rx onp fixup preamble error"),
217 1.1 hikaru _ENTRY(rxonperrcrc, MISC, NULL, "rx onp fixup crc error"),
218 1.1 hikaru _ENTRY(rxonperraddress, MISC, NULL, "rx onp fixup address error"),
219 1.1 hikaru _ENTRY(rxonponp, MISC, NULL, "rx onp fixup onp packets"),
220 1.1 hikaru _ENTRY(rxonpok, MISC, NULL, "rx onp fixup success packets"),
221 1.1 hikaru _ENTRY(tx, MISC, NULL, "tx"),
222 1.1 hikaru _ENTRY(txadd, MISC, NULL, "tx add"),
223 1.1 hikaru _ENTRY(txbufcballoc, MISC, NULL, "tx buf cb alloc"),
224 1.1 hikaru _ENTRY(txbufcbget, MISC, NULL, "tx buf cb get"),
225 1.1 hikaru _ENTRY(txbufgballoc, MISC, NULL, "tx buf gb alloc"),
226 1.1 hikaru _ENTRY(txbufgbget, MISC, NULL, "tx buf gb get"),
227 1.1 hikaru _ENTRY(txbufgbput, MISC, NULL, "tx buf gb put"),
228 1.1 hikaru _ENTRY(txdel, MISC, NULL, "tx del"),
229 1.1 hikaru _ENTRY(txerr, MISC, NULL, "tx error"),
230 1.1 hikaru _ENTRY(txerrcmd, MISC, NULL, "tx cmd error"),
231 1.1 hikaru _ENTRY(txerrgbuf, MISC, NULL, "tx gbuf error"),
232 1.1 hikaru _ENTRY(txerrlink, MISC, NULL, "tx link error"),
233 1.1 hikaru _ENTRY(txerrmkcmd, MISC, NULL, "tx makecmd error"),
234 1.1 hikaru #undef _ENTRY
235 1.1 hikaru };
236 1.1 hikaru #endif
237 1.1 hikaru
238 1.1 hikaru /* ---- buffer management */
239 1.1 hikaru
240 1.1 hikaru static const struct octeon_eth_pool_param {
241 1.1 hikaru int poolno;
242 1.1 hikaru size_t size;
243 1.1 hikaru size_t nelems;
244 1.1 hikaru } octeon_eth_pool_params[] = {
245 1.1 hikaru #define _ENTRY(x) { OCTEON_POOL_NO_##x, OCTEON_POOL_SIZE_##x, OCTEON_POOL_NELEMS_##x }
246 1.1 hikaru _ENTRY(PKT),
247 1.1 hikaru _ENTRY(WQE),
248 1.1 hikaru _ENTRY(CMD),
249 1.1 hikaru _ENTRY(SG)
250 1.1 hikaru #undef _ENTRY
251 1.1 hikaru };
252 1.1 hikaru struct octeon_fpa_buf *octeon_eth_pools[8/* XXX */];
253 1.1 hikaru #define octeon_eth_fb_pkt octeon_eth_pools[OCTEON_POOL_NO_PKT]
254 1.1 hikaru #define octeon_eth_fb_wqe octeon_eth_pools[OCTEON_POOL_NO_WQE]
255 1.1 hikaru #define octeon_eth_fb_cmd octeon_eth_pools[OCTEON_POOL_NO_CMD]
256 1.1 hikaru #define octeon_eth_fb_sg octeon_eth_pools[OCTEON_POOL_NO_SG]
257 1.1 hikaru
258 1.1 hikaru static void
259 1.1 hikaru octeon_eth_buf_init(struct octeon_eth_softc *sc)
260 1.1 hikaru {
261 1.1 hikaru static int once;
262 1.1 hikaru int i;
263 1.1 hikaru const struct octeon_eth_pool_param *pp;
264 1.1 hikaru struct octeon_fpa_buf *fb;
265 1.1 hikaru
266 1.1 hikaru if (once == 1)
267 1.1 hikaru return;
268 1.1 hikaru once = 1;
269 1.1 hikaru
270 1.1 hikaru for (i = 0; i < (int)__arraycount(octeon_eth_pool_params); i++) {
271 1.1 hikaru pp = &octeon_eth_pool_params[i];
272 1.1 hikaru octeon_fpa_buf_init(pp->poolno, pp->size, pp->nelems, &fb);
273 1.1 hikaru octeon_eth_pools[i] = fb;
274 1.1 hikaru }
275 1.1 hikaru }
276 1.1 hikaru
277 1.1 hikaru /* ---- autoconf */
278 1.1 hikaru
279 1.1 hikaru static int
280 1.1 hikaru octeon_eth_match(device_t parent, struct cfdata *match, void *aux)
281 1.1 hikaru {
282 1.1 hikaru struct octeon_gmx_attach_args *ga = aux;
283 1.1 hikaru
284 1.1 hikaru if (strcmp(match->cf_name, ga->ga_name) != 0) {
285 1.1 hikaru return 0;
286 1.1 hikaru }
287 1.1 hikaru return 1;
288 1.1 hikaru }
289 1.1 hikaru
290 1.1 hikaru static void
291 1.1 hikaru octeon_eth_attach(device_t parent, device_t self, void *aux)
292 1.1 hikaru {
293 1.1 hikaru struct octeon_eth_softc *sc = device_private(self);
294 1.1 hikaru struct octeon_gmx_attach_args *ga = aux;
295 1.1 hikaru struct ifnet *ifp = &sc->sc_ethercom.ec_if;
296 1.1 hikaru uint8_t enaddr[ETHER_ADDR_LEN];
297 1.1 hikaru
298 1.1 hikaru sc->sc_dev = self;
299 1.1 hikaru sc->sc_regt = ga->ga_regt;
300 1.1 hikaru sc->sc_port = ga->ga_portno;
301 1.1 hikaru sc->sc_port_type = ga->ga_port_type;
302 1.1 hikaru sc->sc_gmx = ga->ga_gmx;
303 1.1 hikaru sc->sc_gmx_port = ga->ga_gmx_port;
304 1.1 hikaru
305 1.1 hikaru sc->sc_init_flag = 0;
306 1.1 hikaru /*
307 1.1 hikaru * XXXUEBAYASI
308 1.1 hikaru * Setting PIP_IP_OFFSET[OFFSET] to 8 causes panic ... why???
309 1.1 hikaru */
310 1.1 hikaru sc->sc_ip_offset = 0/* XXX */;
311 1.1 hikaru
312 1.1 hikaru if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) <= MIPS_CN30XX) {
313 1.1 hikaru SET(sc->sc_quirks, OCTEON_ETH_QUIRKS_NO_PRE_ALIGN);
314 1.1 hikaru SET(sc->sc_quirks, OCTEON_ETH_QUIRKS_NO_RX_INBND);
315 1.1 hikaru }
316 1.1 hikaru
317 1.1 hikaru octeon_eth_board_mac_addr(enaddr, sizeof(enaddr), sc);
318 1.1 hikaru printf("%s: Ethernet address %s\n", device_xname(sc->sc_dev),
319 1.1 hikaru ether_sprintf(enaddr));
320 1.1 hikaru
321 1.1 hikaru octeon_eth_gsc[sc->sc_port] = sc;
322 1.1 hikaru
323 1.1 hikaru SIMPLEQ_INIT(&sc->sc_sendq);
324 1.1 hikaru sc->sc_soft_req_thresh = 15/* XXX */;
325 1.1 hikaru sc->sc_ext_callback_cnt = 0;
326 1.1 hikaru
327 1.1 hikaru octeon_gmx_stats_init(sc->sc_gmx_port);
328 1.1 hikaru
329 1.1 hikaru callout_init(&sc->sc_tick_misc_ch, 0);
330 1.1 hikaru callout_init(&sc->sc_tick_free_ch, 0);
331 1.1 hikaru
332 1.1 hikaru octeon_fau_op_init(&sc->sc_fau_done,
333 1.1 hikaru OCTEON_CVMSEG_ETHER_OFFSET(sc->sc_port, csm_ether_fau_done),
334 1.1 hikaru OCT_FAU_REG_ADDR_END - (8 * (sc->sc_port + 1))/* XXX */);
335 1.1 hikaru octeon_fau_op_set_8(&sc->sc_fau_done, 0);
336 1.1 hikaru
337 1.1 hikaru octeon_eth_pip_init(sc);
338 1.1 hikaru octeon_eth_ipd_init(sc);
339 1.1 hikaru octeon_eth_pko_init(sc);
340 1.1 hikaru octeon_eth_asx_init(sc);
341 1.1 hikaru octeon_eth_smi_init(sc);
342 1.1 hikaru
343 1.1 hikaru sc->sc_gmx_port->sc_ipd = sc->sc_ipd;
344 1.1 hikaru sc->sc_gmx_port->sc_port_asx = sc->sc_asx;
345 1.1 hikaru sc->sc_gmx_port->sc_port_mii = &sc->sc_mii;
346 1.1 hikaru sc->sc_gmx_port->sc_port_ec = &sc->sc_ethercom;
347 1.1 hikaru /* XXX */
348 1.1 hikaru sc->sc_gmx_port->sc_quirks = sc->sc_quirks;
349 1.1 hikaru
350 1.1 hikaru /* XXX */
351 1.1 hikaru sc->sc_pow = &octeon_pow_softc;
352 1.1 hikaru
353 1.1 hikaru octeon_eth_mediainit(sc);
354 1.1 hikaru
355 1.1 hikaru strncpy(ifp->if_xname, device_xname(sc->sc_dev), sizeof(ifp->if_xname));
356 1.1 hikaru ifp->if_softc = sc;
357 1.1 hikaru ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
358 1.1 hikaru ifp->if_ioctl = octeon_eth_ioctl;
359 1.1 hikaru ifp->if_start = octeon_eth_start;
360 1.1 hikaru ifp->if_watchdog = octeon_eth_watchdog;
361 1.1 hikaru ifp->if_init = octeon_eth_init;
362 1.1 hikaru ifp->if_stop = octeon_eth_stop;
363 1.10 riastrad IFQ_SET_MAXLEN(&ifp->if_snd, uimax(GATHER_QUEUE_SIZE, IFQ_MAXLEN));
364 1.1 hikaru IFQ_SET_READY(&ifp->if_snd);
365 1.1 hikaru
366 1.1 hikaru /* XXX: not yet tx checksum */
367 1.1 hikaru ifp->if_capabilities =
368 1.12 msaitoh IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
369 1.12 msaitoh IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
370 1.1 hikaru
371 1.7 jmcneill /* 802.1Q VLAN-sized frames are supported */
372 1.7 jmcneill sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
373 1.7 jmcneill
374 1.1 hikaru octeon_gmx_set_mac_addr(sc->sc_gmx_port, enaddr);
375 1.1 hikaru octeon_gmx_set_filter(sc->sc_gmx_port);
376 1.1 hikaru
377 1.1 hikaru if_attach(ifp);
378 1.1 hikaru ether_ifattach(ifp, enaddr);
379 1.1 hikaru
380 1.1 hikaru /* XXX */
381 1.1 hikaru sc->sc_rate_recv_check_link_cap.tv_sec = 1;
382 1.1 hikaru sc->sc_rate_recv_check_jumbo_cap.tv_sec = 1;
383 1.1 hikaru sc->sc_rate_recv_check_code_cap.tv_sec = 1;
384 1.1 hikaru sc->sc_rate_recv_fixup_odd_nibble_short_cap.tv_sec = 1;
385 1.1 hikaru sc->sc_rate_recv_fixup_odd_nibble_preamble_cap.tv_sec = 1;
386 1.1 hikaru sc->sc_rate_recv_fixup_odd_nibble_crc_cap.tv_sec = 1;
387 1.1 hikaru #ifdef OCTEON_ETH_DEBUG
388 1.1 hikaru sc->sc_rate_recv_fixup_odd_nibble_addr_cap.tv_sec = 1;
389 1.1 hikaru #endif
390 1.1 hikaru /* XXX */
391 1.1 hikaru
392 1.1 hikaru #if 1
393 1.1 hikaru octeon_eth_buf_init(sc);
394 1.1 hikaru #endif
395 1.1 hikaru
396 1.1 hikaru if (octeon_eth_pow_recv_ih == NULL)
397 1.12 msaitoh octeon_eth_pow_recv_ih
398 1.12 msaitoh = octeon_pow_intr_establish(OCTEON_POW_GROUP_PIP,
399 1.12 msaitoh IPL_NET, octeon_eth_recv_intr, NULL, NULL);
400 1.1 hikaru
401 1.1 hikaru OCTEON_EVCNT_ATTACH_EVCNTS(sc, octeon_evcnt_entries,
402 1.1 hikaru device_xname(sc->sc_dev));
403 1.1 hikaru }
404 1.1 hikaru
405 1.1 hikaru /* ---- submodules */
406 1.1 hikaru
407 1.1 hikaru /* XXX */
408 1.1 hikaru static void
409 1.1 hikaru octeon_eth_pip_init(struct octeon_eth_softc *sc)
410 1.1 hikaru {
411 1.1 hikaru struct octeon_pip_attach_args pip_aa;
412 1.1 hikaru
413 1.1 hikaru pip_aa.aa_port = sc->sc_port;
414 1.1 hikaru pip_aa.aa_regt = sc->sc_regt;
415 1.1 hikaru pip_aa.aa_tag_type = POW_TAG_TYPE_ORDERED/* XXX */;
416 1.1 hikaru pip_aa.aa_receive_group = OCTEON_POW_GROUP_PIP;
417 1.1 hikaru pip_aa.aa_ip_offset = sc->sc_ip_offset;
418 1.1 hikaru octeon_pip_init(&pip_aa, &sc->sc_pip);
419 1.1 hikaru }
420 1.1 hikaru
421 1.1 hikaru /* XXX */
422 1.1 hikaru static void
423 1.1 hikaru octeon_eth_ipd_init(struct octeon_eth_softc *sc)
424 1.1 hikaru {
425 1.1 hikaru struct octeon_ipd_attach_args ipd_aa;
426 1.1 hikaru
427 1.1 hikaru ipd_aa.aa_port = sc->sc_port;
428 1.1 hikaru ipd_aa.aa_regt = sc->sc_regt;
429 1.1 hikaru ipd_aa.aa_first_mbuff_skip = 184/* XXX */;
430 1.1 hikaru ipd_aa.aa_not_first_mbuff_skip = 0/* XXX */;
431 1.1 hikaru octeon_ipd_init(&ipd_aa, &sc->sc_ipd);
432 1.1 hikaru }
433 1.1 hikaru
434 1.1 hikaru /* XXX */
435 1.1 hikaru static void
436 1.1 hikaru octeon_eth_pko_init(struct octeon_eth_softc *sc)
437 1.1 hikaru {
438 1.1 hikaru struct octeon_pko_attach_args pko_aa;
439 1.1 hikaru
440 1.1 hikaru pko_aa.aa_port = sc->sc_port;
441 1.1 hikaru pko_aa.aa_regt = sc->sc_regt;
442 1.1 hikaru pko_aa.aa_cmdptr = &sc->sc_cmdptr;
443 1.1 hikaru pko_aa.aa_cmd_buf_pool = OCTEON_POOL_NO_CMD;
444 1.1 hikaru pko_aa.aa_cmd_buf_size = OCTEON_POOL_NWORDS_CMD;
445 1.1 hikaru octeon_pko_init(&pko_aa, &sc->sc_pko);
446 1.1 hikaru }
447 1.1 hikaru
448 1.1 hikaru /* XXX */
449 1.1 hikaru static void
450 1.1 hikaru octeon_eth_asx_init(struct octeon_eth_softc *sc)
451 1.1 hikaru {
452 1.1 hikaru struct octeon_asx_attach_args asx_aa;
453 1.1 hikaru
454 1.1 hikaru asx_aa.aa_port = sc->sc_port;
455 1.1 hikaru asx_aa.aa_regt = sc->sc_regt;
456 1.1 hikaru octeon_asx_init(&asx_aa, &sc->sc_asx);
457 1.1 hikaru }
458 1.1 hikaru
459 1.1 hikaru static void
460 1.1 hikaru octeon_eth_smi_init(struct octeon_eth_softc *sc)
461 1.1 hikaru {
462 1.1 hikaru struct octeon_smi_attach_args smi_aa;
463 1.1 hikaru
464 1.1 hikaru smi_aa.aa_port = sc->sc_port;
465 1.1 hikaru smi_aa.aa_regt = sc->sc_regt;
466 1.1 hikaru octeon_smi_init(&smi_aa, &sc->sc_smi);
467 1.1 hikaru octeon_smi_set_clock(sc->sc_smi, 0x1464ULL); /* XXX */
468 1.1 hikaru }
469 1.1 hikaru
470 1.1 hikaru /* ---- XXX */
471 1.1 hikaru
472 1.1 hikaru #define ADDR2UINT64(u, a) \
473 1.1 hikaru do { \
474 1.1 hikaru u = \
475 1.1 hikaru (((uint64_t)a[0] << 40) | ((uint64_t)a[1] << 32) | \
476 1.1 hikaru ((uint64_t)a[2] << 24) | ((uint64_t)a[3] << 16) | \
477 1.12 msaitoh ((uint64_t)a[4] << 8) | ((uint64_t)a[5] << 0)); \
478 1.1 hikaru } while (0)
479 1.1 hikaru #define UINT642ADDR(a, u) \
480 1.1 hikaru do { \
481 1.1 hikaru a[0] = (uint8_t)((u) >> 40); a[1] = (uint8_t)((u) >> 32); \
482 1.1 hikaru a[2] = (uint8_t)((u) >> 24); a[3] = (uint8_t)((u) >> 16); \
483 1.12 msaitoh a[4] = (uint8_t)((u) >> 8); a[5] = (uint8_t)((u) >> 0); \
484 1.1 hikaru } while (0)
485 1.1 hikaru
486 1.1 hikaru static void
487 1.12 msaitoh octeon_eth_board_mac_addr(uint8_t *enaddr, size_t size,
488 1.12 msaitoh struct octeon_eth_softc *sc)
489 1.1 hikaru {
490 1.1 hikaru prop_dictionary_t dict;
491 1.1 hikaru prop_data_t ea;
492 1.1 hikaru
493 1.1 hikaru dict = device_properties(sc->sc_dev);
494 1.1 hikaru KASSERT(dict != NULL);
495 1.1 hikaru ea = prop_dictionary_get(dict, "mac-address");
496 1.1 hikaru KASSERT(ea != NULL);
497 1.1 hikaru memcpy(enaddr, prop_data_data_nocopy(ea), size);
498 1.1 hikaru }
499 1.1 hikaru
500 1.1 hikaru /* ---- media */
501 1.1 hikaru
502 1.1 hikaru static int
503 1.11 msaitoh octeon_eth_mii_readreg(device_t self, int phy_addr, int reg, uint16_t *val)
504 1.1 hikaru {
505 1.1 hikaru struct octeon_eth_softc *sc = device_private(self);
506 1.1 hikaru
507 1.11 msaitoh return octeon_smi_read(sc->sc_smi, phy_addr, reg, val);
508 1.1 hikaru }
509 1.1 hikaru
510 1.11 msaitoh static int
511 1.11 msaitoh octeon_eth_mii_writereg(device_t self, int phy_addr, int reg, uint16_t val)
512 1.1 hikaru {
513 1.1 hikaru struct octeon_eth_softc *sc = device_private(self);
514 1.1 hikaru
515 1.11 msaitoh return octeon_smi_write(sc->sc_smi, phy_addr, reg, val);
516 1.1 hikaru }
517 1.1 hikaru
518 1.1 hikaru static void
519 1.1 hikaru octeon_eth_mii_statchg(struct ifnet *ifp)
520 1.1 hikaru {
521 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
522 1.1 hikaru
523 1.1 hikaru octeon_pko_port_enable(sc->sc_pko, 0);
524 1.1 hikaru octeon_gmx_port_enable(sc->sc_gmx_port, 0);
525 1.1 hikaru
526 1.1 hikaru octeon_eth_reset(sc);
527 1.1 hikaru
528 1.1 hikaru if (ISSET(ifp->if_flags, IFF_RUNNING))
529 1.1 hikaru octeon_gmx_set_filter(sc->sc_gmx_port);
530 1.1 hikaru
531 1.1 hikaru octeon_pko_port_enable(sc->sc_pko, 1);
532 1.1 hikaru octeon_gmx_port_enable(sc->sc_gmx_port, 1);
533 1.1 hikaru }
534 1.1 hikaru
535 1.1 hikaru static int
536 1.1 hikaru octeon_eth_mediainit(struct octeon_eth_softc *sc)
537 1.1 hikaru {
538 1.1 hikaru struct ifnet *ifp = &sc->sc_ethercom.ec_if;
539 1.13 msaitoh struct mii_data *mii = &sc->sc_mii;
540 1.1 hikaru prop_object_t phy;
541 1.1 hikaru
542 1.13 msaitoh mii->mii_ifp = ifp;
543 1.13 msaitoh mii->mii_readreg = octeon_eth_mii_readreg;
544 1.13 msaitoh mii->mii_writereg = octeon_eth_mii_writereg;
545 1.13 msaitoh mii->mii_statchg = octeon_eth_mii_statchg;
546 1.13 msaitoh sc->sc_ethercom.ec_mii = mii;
547 1.13 msaitoh
548 1.13 msaitoh /* Initialize ifmedia structures. */
549 1.13 msaitoh ifmedia_init(&mii->mii_media, 0, octeon_eth_mediachange,
550 1.1 hikaru octeon_eth_mediastatus);
551 1.1 hikaru
552 1.1 hikaru phy = prop_dictionary_get(device_properties(sc->sc_dev), "phy-addr");
553 1.1 hikaru KASSERT(phy != NULL);
554 1.1 hikaru
555 1.13 msaitoh mii_attach(sc->sc_dev, mii, 0xffffffff, prop_number_integer_value(phy),
556 1.1 hikaru MII_OFFSET_ANY, MIIF_DOPAUSE);
557 1.1 hikaru
558 1.1 hikaru /* XXX XXX XXX */
559 1.13 msaitoh if (LIST_FIRST(&mii->mii_phys) != NULL) {
560 1.1 hikaru /* XXX XXX XXX */
561 1.13 msaitoh ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
562 1.1 hikaru /* XXX XXX XXX */
563 1.1 hikaru } else {
564 1.1 hikaru /* XXX XXX XXX */
565 1.13 msaitoh ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE,
566 1.1 hikaru MII_MEDIA_NONE, NULL);
567 1.1 hikaru /* XXX XXX XXX */
568 1.13 msaitoh ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
569 1.1 hikaru /* XXX XXX XXX */
570 1.1 hikaru }
571 1.1 hikaru /* XXX XXX XXX */
572 1.1 hikaru
573 1.1 hikaru return 0;
574 1.1 hikaru }
575 1.1 hikaru
576 1.1 hikaru static void
577 1.1 hikaru octeon_eth_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
578 1.1 hikaru {
579 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
580 1.1 hikaru
581 1.1 hikaru mii_pollstat(&sc->sc_mii);
582 1.1 hikaru
583 1.1 hikaru ifmr->ifm_status = sc->sc_mii.mii_media_status;
584 1.1 hikaru ifmr->ifm_active = sc->sc_mii.mii_media_active;
585 1.1 hikaru ifmr->ifm_active = (sc->sc_mii.mii_media_active & ~IFM_ETH_FMASK) |
586 1.1 hikaru sc->sc_gmx_port->sc_port_flowflags;
587 1.1 hikaru }
588 1.1 hikaru
589 1.1 hikaru static int
590 1.1 hikaru octeon_eth_mediachange(struct ifnet *ifp)
591 1.1 hikaru {
592 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
593 1.1 hikaru
594 1.1 hikaru mii_mediachg(&sc->sc_mii);
595 1.1 hikaru
596 1.1 hikaru return 0;
597 1.1 hikaru }
598 1.1 hikaru
599 1.1 hikaru /* ---- send buffer garbage collection */
600 1.1 hikaru
601 1.1 hikaru static inline void
602 1.1 hikaru octeon_eth_send_queue_flush_prefetch(struct octeon_eth_softc *sc)
603 1.1 hikaru {
604 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_prefetch == 0);
605 1.1 hikaru octeon_fau_op_inc_fetch_8(&sc->sc_fau_done, 0);
606 1.1 hikaru sc->sc_prefetch = 1;
607 1.1 hikaru }
608 1.1 hikaru
609 1.1 hikaru static inline void
610 1.1 hikaru octeon_eth_send_queue_flush_fetch(struct octeon_eth_softc *sc)
611 1.1 hikaru {
612 1.12 msaitoh #ifndef OCTEON_ETH_DEBUG
613 1.1 hikaru if (!sc->sc_prefetch)
614 1.1 hikaru return;
615 1.1 hikaru #endif
616 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_prefetch == 1);
617 1.1 hikaru sc->sc_hard_done_cnt = octeon_fau_op_inc_read_8(&sc->sc_fau_done);
618 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_hard_done_cnt <= 0);
619 1.1 hikaru sc->sc_prefetch = 0;
620 1.1 hikaru }
621 1.1 hikaru
622 1.1 hikaru static inline void
623 1.1 hikaru octeon_eth_send_queue_flush(struct octeon_eth_softc *sc)
624 1.1 hikaru {
625 1.8 jmcneill struct ifnet *ifp = &sc->sc_ethercom.ec_if;
626 1.1 hikaru const int64_t sent_count = sc->sc_hard_done_cnt;
627 1.1 hikaru int i;
628 1.1 hikaru
629 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_flush == 0);
630 1.1 hikaru OCTEON_ETH_KASSERT(sent_count <= 0);
631 1.1 hikaru
632 1.1 hikaru for (i = 0; i < 0 - sent_count; i++) {
633 1.1 hikaru struct mbuf *m;
634 1.1 hikaru uint64_t *gbuf;
635 1.1 hikaru
636 1.1 hikaru octeon_eth_send_queue_del(sc, &m, &gbuf);
637 1.1 hikaru
638 1.1 hikaru octeon_fpa_buf_put(octeon_eth_fb_sg, gbuf);
639 1.1 hikaru OCTEON_EVCNT_INC(sc, txbufgbput);
640 1.1 hikaru
641 1.1 hikaru m_freem(m);
642 1.8 jmcneill
643 1.8 jmcneill CLR(ifp->if_flags, IFF_OACTIVE);
644 1.1 hikaru }
645 1.1 hikaru
646 1.1 hikaru octeon_fau_op_inc_fetch_8(&sc->sc_fau_done, i);
647 1.1 hikaru sc->sc_flush = i;
648 1.1 hikaru }
649 1.1 hikaru
650 1.1 hikaru static inline void
651 1.1 hikaru octeon_eth_send_queue_flush_sync(struct octeon_eth_softc *sc)
652 1.1 hikaru {
653 1.1 hikaru if (sc->sc_flush == 0)
654 1.1 hikaru return;
655 1.1 hikaru
656 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_flush > 0);
657 1.1 hikaru
658 1.1 hikaru /* XXX XXX XXX */
659 1.1 hikaru octeon_fau_op_inc_read_8(&sc->sc_fau_done);
660 1.1 hikaru sc->sc_soft_req_cnt -= sc->sc_flush;
661 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_soft_req_cnt >= 0);
662 1.1 hikaru /* XXX XXX XXX */
663 1.1 hikaru
664 1.1 hikaru sc->sc_flush = 0;
665 1.1 hikaru }
666 1.1 hikaru
667 1.1 hikaru static inline int
668 1.1 hikaru octeon_eth_send_queue_is_full(struct octeon_eth_softc *sc)
669 1.1 hikaru {
670 1.1 hikaru #ifdef OCTEON_ETH_SEND_QUEUE_CHECK
671 1.1 hikaru int64_t nofree_cnt;
672 1.1 hikaru
673 1.12 msaitoh nofree_cnt = sc->sc_soft_req_cnt + sc->sc_hard_done_cnt;
674 1.1 hikaru
675 1.1 hikaru if (__predict_false(nofree_cnt == GATHER_QUEUE_SIZE - 1)) {
676 1.1 hikaru octeon_eth_send_queue_flush(sc);
677 1.1 hikaru OCTEON_EVCNT_INC(sc, txerrgbuf);
678 1.1 hikaru octeon_eth_send_queue_flush_sync(sc);
679 1.1 hikaru return 1;
680 1.1 hikaru }
681 1.1 hikaru
682 1.1 hikaru #endif
683 1.1 hikaru return 0;
684 1.1 hikaru }
685 1.1 hikaru
686 1.1 hikaru /*
687 1.1 hikaru * (Ab)use m_nextpkt and m_paddr to maintain mbuf chain and pointer to gather
688 1.1 hikaru * buffer. Other mbuf members may be used by m_freem(), so don't touch them!
689 1.1 hikaru */
690 1.1 hikaru
691 1.1 hikaru struct _send_queue_entry {
692 1.1 hikaru union {
693 1.1 hikaru struct mbuf _sqe_s_mbuf;
694 1.1 hikaru struct {
695 1.1 hikaru char _sqe_s_entry_pad[offsetof(struct mbuf, m_nextpkt)];
696 1.1 hikaru SIMPLEQ_ENTRY(_send_queue_entry) _sqe_s_entry_entry;
697 1.1 hikaru } _sqe_s_entry;
698 1.1 hikaru struct {
699 1.1 hikaru char _sqe_s_gbuf_pad[offsetof(struct mbuf, m_paddr)];
700 1.1 hikaru uint64_t *_sqe_s_gbuf_gbuf;
701 1.1 hikaru } _sqe_s_gbuf;
702 1.1 hikaru } _sqe_u;
703 1.1 hikaru #define _sqe_entry _sqe_u._sqe_s_entry._sqe_s_entry_entry
704 1.1 hikaru #define _sqe_gbuf _sqe_u._sqe_s_gbuf._sqe_s_gbuf_gbuf
705 1.1 hikaru };
706 1.1 hikaru
707 1.1 hikaru static inline void
708 1.1 hikaru octeon_eth_send_queue_add(struct octeon_eth_softc *sc, struct mbuf *m,
709 1.1 hikaru uint64_t *gbuf)
710 1.1 hikaru {
711 1.1 hikaru struct _send_queue_entry *sqe = (struct _send_queue_entry *)m;
712 1.1 hikaru
713 1.1 hikaru sqe->_sqe_gbuf = gbuf;
714 1.1 hikaru SIMPLEQ_INSERT_TAIL(&sc->sc_sendq, sqe, _sqe_entry);
715 1.1 hikaru
716 1.1 hikaru if ((m->m_flags & M_EXT) && m->m_ext.ext_free != NULL)
717 1.1 hikaru sc->sc_ext_callback_cnt++;
718 1.1 hikaru
719 1.1 hikaru OCTEON_EVCNT_INC(sc, txadd);
720 1.1 hikaru }
721 1.1 hikaru
722 1.1 hikaru static inline void
723 1.1 hikaru octeon_eth_send_queue_del(struct octeon_eth_softc *sc, struct mbuf **rm,
724 1.1 hikaru uint64_t **rgbuf)
725 1.1 hikaru {
726 1.1 hikaru struct _send_queue_entry *sqe;
727 1.1 hikaru
728 1.1 hikaru sqe = SIMPLEQ_FIRST(&sc->sc_sendq);
729 1.1 hikaru OCTEON_ETH_KASSERT(sqe != NULL);
730 1.1 hikaru SIMPLEQ_REMOVE_HEAD(&sc->sc_sendq, _sqe_entry);
731 1.1 hikaru
732 1.1 hikaru *rm = (void *)sqe;
733 1.1 hikaru *rgbuf = sqe->_sqe_gbuf;
734 1.1 hikaru
735 1.1 hikaru if (((*rm)->m_flags & M_EXT) && (*rm)->m_ext.ext_free != NULL) {
736 1.1 hikaru sc->sc_ext_callback_cnt--;
737 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_ext_callback_cnt >= 0);
738 1.1 hikaru }
739 1.1 hikaru
740 1.1 hikaru OCTEON_EVCNT_INC(sc, txdel);
741 1.1 hikaru }
742 1.1 hikaru
743 1.1 hikaru static inline int
744 1.1 hikaru octeon_eth_buf_free_work(struct octeon_eth_softc *sc, uint64_t *work,
745 1.1 hikaru uint64_t word2)
746 1.1 hikaru {
747 1.1 hikaru /* XXX when jumbo frame */
748 1.1 hikaru if (ISSET(word2, PIP_WQE_WORD2_IP_BUFS)) {
749 1.1 hikaru paddr_t addr;
750 1.1 hikaru paddr_t start_buffer;
751 1.1 hikaru
752 1.1 hikaru addr = work[3] & PIP_WQE_WORD3_ADDR;
753 1.1 hikaru start_buffer = addr & ~(2048 - 1);
754 1.1 hikaru
755 1.1 hikaru octeon_fpa_buf_put_paddr(octeon_eth_fb_pkt, start_buffer);
756 1.1 hikaru OCTEON_EVCNT_INC(sc, rxbufpkput);
757 1.1 hikaru }
758 1.1 hikaru
759 1.1 hikaru octeon_fpa_buf_put(octeon_eth_fb_wqe, work);
760 1.1 hikaru OCTEON_EVCNT_INC(sc, rxbufwqput);
761 1.1 hikaru
762 1.1 hikaru return 0;
763 1.1 hikaru }
764 1.1 hikaru
765 1.1 hikaru static inline void
766 1.1 hikaru octeon_eth_buf_ext_free_m(struct mbuf *m, void *buf, size_t size, void *arg)
767 1.1 hikaru {
768 1.1 hikaru uint64_t *work = (void *)arg;
769 1.1 hikaru #ifdef OCTEON_ETH_DEBUG
770 1.1 hikaru struct octeon_eth_softc *sc = (void *)(uintptr_t)work[0];
771 1.1 hikaru #endif
772 1.1 hikaru int s = splnet();
773 1.1 hikaru
774 1.1 hikaru OCTEON_EVCNT_INC(sc, rxrs);
775 1.1 hikaru
776 1.1 hikaru octeon_fpa_buf_put(octeon_eth_fb_wqe, work);
777 1.1 hikaru OCTEON_EVCNT_INC(sc, rxbufwqput);
778 1.1 hikaru
779 1.1 hikaru OCTEON_ETH_KASSERT(m != NULL);
780 1.1 hikaru
781 1.1 hikaru pool_cache_put(mb_cache, m);
782 1.1 hikaru
783 1.1 hikaru splx(s);
784 1.1 hikaru }
785 1.1 hikaru
786 1.1 hikaru static inline void
787 1.12 msaitoh octeon_eth_buf_ext_free_ext(struct mbuf *m, void *buf, size_t size, void *arg)
788 1.1 hikaru {
789 1.1 hikaru uint64_t *work = (void *)arg;
790 1.1 hikaru #ifdef OCTEON_ETH_DEBUG
791 1.1 hikaru struct octeon_eth_softc *sc = (void *)(uintptr_t)work[0];
792 1.1 hikaru #endif
793 1.1 hikaru int s = splnet();
794 1.1 hikaru
795 1.1 hikaru octeon_fpa_buf_put(octeon_eth_fb_wqe, work);
796 1.1 hikaru OCTEON_EVCNT_INC(sc, rxbufwqput);
797 1.1 hikaru
798 1.1 hikaru octeon_fpa_buf_put(octeon_eth_fb_pkt, buf);
799 1.1 hikaru OCTEON_EVCNT_INC(sc, rxbufpkput);
800 1.1 hikaru
801 1.1 hikaru OCTEON_ETH_KASSERT(m != NULL);
802 1.1 hikaru
803 1.1 hikaru pool_cache_put(mb_cache, m);
804 1.1 hikaru
805 1.1 hikaru splx(s);
806 1.1 hikaru }
807 1.1 hikaru
808 1.1 hikaru /* ---- ifnet interfaces */
809 1.1 hikaru
810 1.1 hikaru static int
811 1.1 hikaru octeon_eth_ioctl(struct ifnet *ifp, u_long cmd, void *data)
812 1.1 hikaru {
813 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
814 1.1 hikaru struct ifreq *ifr = (struct ifreq *)data;
815 1.1 hikaru int s, error;
816 1.1 hikaru
817 1.1 hikaru s = splnet();
818 1.1 hikaru switch (cmd) {
819 1.1 hikaru case SIOCSIFMEDIA:
820 1.1 hikaru /* Flow control requires full-duplex mode. */
821 1.1 hikaru if (IFM_SUBTYPE(ifr->ifr_media) == IFM_AUTO ||
822 1.1 hikaru (ifr->ifr_media & IFM_FDX) == 0) {
823 1.1 hikaru ifr->ifr_media &= ~IFM_ETH_FMASK;
824 1.1 hikaru }
825 1.1 hikaru if (IFM_SUBTYPE(ifr->ifr_media) != IFM_AUTO) {
826 1.1 hikaru if ((ifr->ifr_media & IFM_ETH_FMASK) == IFM_FLOW) {
827 1.1 hikaru ifr->ifr_media |=
828 1.1 hikaru IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
829 1.1 hikaru }
830 1.12 msaitoh sc->sc_gmx_port->sc_port_flowflags =
831 1.1 hikaru ifr->ifr_media & IFM_ETH_FMASK;
832 1.1 hikaru }
833 1.1 hikaru error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
834 1.1 hikaru break;
835 1.1 hikaru default:
836 1.1 hikaru error = ether_ioctl(ifp, cmd, data);
837 1.1 hikaru if (error == ENETRESET) {
838 1.1 hikaru /*
839 1.1 hikaru * Multicast list has changed; set the hardware filter
840 1.1 hikaru * accordingly.
841 1.1 hikaru */
842 1.1 hikaru if (ISSET(ifp->if_flags, IFF_RUNNING))
843 1.1 hikaru octeon_gmx_set_filter(sc->sc_gmx_port);
844 1.1 hikaru error = 0;
845 1.1 hikaru }
846 1.1 hikaru break;
847 1.1 hikaru }
848 1.1 hikaru octeon_eth_start(ifp);
849 1.1 hikaru splx(s);
850 1.1 hikaru
851 1.12 msaitoh return error;
852 1.1 hikaru }
853 1.1 hikaru
854 1.1 hikaru /* ---- send (output) */
855 1.1 hikaru
856 1.1 hikaru static inline uint64_t
857 1.1 hikaru octeon_eth_send_makecmd_w0(uint64_t fau0, uint64_t fau1, size_t len, int segs)
858 1.1 hikaru {
859 1.1 hikaru return octeon_pko_cmd_word0(
860 1.1 hikaru OCT_FAU_OP_SIZE_64, /* sz1 */
861 1.1 hikaru OCT_FAU_OP_SIZE_64, /* sz0 */
862 1.1 hikaru 1, fau1, 1, fau0, /* s1, reg1, s0, reg0 */
863 1.1 hikaru 0, /* le */
864 1.1 hikaru octeon_eth_param_pko_cmd_w0_n2, /* n2 */
865 1.1 hikaru 1, 0, /* q, r */
866 1.1 hikaru (segs == 1) ? 0 : 1, /* g */
867 1.1 hikaru 0, 0, 1, /* ipoffp1, ii, df */
868 1.1 hikaru segs, (int)len); /* segs, totalbytes */
869 1.1 hikaru }
870 1.1 hikaru
871 1.12 msaitoh static inline uint64_t
872 1.1 hikaru octeon_eth_send_makecmd_w1(int size, paddr_t addr)
873 1.1 hikaru {
874 1.1 hikaru return octeon_pko_cmd_word1(
875 1.1 hikaru 0, 0, /* i, back */
876 1.1 hikaru FPA_GATHER_BUFFER_POOL, /* pool */
877 1.1 hikaru size, addr); /* size, addr */
878 1.1 hikaru }
879 1.1 hikaru
880 1.1 hikaru static inline int
881 1.1 hikaru octeon_eth_send_makecmd_gbuf(struct octeon_eth_softc *sc, struct mbuf *m0,
882 1.1 hikaru uint64_t *gbuf, int *rsegs)
883 1.1 hikaru {
884 1.1 hikaru struct mbuf *m;
885 1.1 hikaru int segs = 0;
886 1.1 hikaru uintptr_t laddr, rlen, nlen;
887 1.1 hikaru
888 1.1 hikaru for (m = m0; m != NULL; m = m->m_next) {
889 1.1 hikaru
890 1.1 hikaru if (__predict_false(m->m_len == 0))
891 1.1 hikaru continue;
892 1.1 hikaru
893 1.12 msaitoh #if 0
894 1.1 hikaru OCTEON_ETH_KASSERT(((uint32_t)m->m_data & (PAGE_SIZE - 1))
895 1.1 hikaru == (kvtophys((vaddr_t)m->m_data) & (PAGE_SIZE - 1)));
896 1.1 hikaru #endif
897 1.1 hikaru
898 1.12 msaitoh /* Aligned 4k */
899 1.1 hikaru laddr = (uintptr_t)m->m_data & (PAGE_SIZE - 1);
900 1.1 hikaru
901 1.1 hikaru if (laddr + m->m_len > PAGE_SIZE) {
902 1.1 hikaru /* XXX XXX XXX */
903 1.1 hikaru rlen = PAGE_SIZE - laddr;
904 1.1 hikaru nlen = m->m_len - rlen;
905 1.1 hikaru *(gbuf + segs) = octeon_eth_send_makecmd_w1(rlen,
906 1.1 hikaru kvtophys((vaddr_t)m->m_data));
907 1.1 hikaru segs++;
908 1.1 hikaru if (segs > 63) {
909 1.1 hikaru return 1;
910 1.1 hikaru }
911 1.1 hikaru /* XXX XXX XXX */
912 1.1 hikaru } else {
913 1.1 hikaru rlen = 0;
914 1.1 hikaru nlen = m->m_len;
915 1.1 hikaru }
916 1.1 hikaru
917 1.1 hikaru *(gbuf + segs) = octeon_eth_send_makecmd_w1(nlen,
918 1.1 hikaru kvtophys((vaddr_t)(m->m_data + rlen)));
919 1.1 hikaru segs++;
920 1.1 hikaru if (segs > 63) {
921 1.1 hikaru return 1;
922 1.1 hikaru }
923 1.1 hikaru }
924 1.1 hikaru
925 1.1 hikaru OCTEON_ETH_KASSERT(m == NULL);
926 1.1 hikaru
927 1.1 hikaru *rsegs = segs;
928 1.1 hikaru
929 1.1 hikaru return 0;
930 1.1 hikaru }
931 1.1 hikaru
932 1.1 hikaru static inline int
933 1.1 hikaru octeon_eth_send_makecmd(struct octeon_eth_softc *sc, struct mbuf *m,
934 1.1 hikaru uint64_t *gbuf, uint64_t *rpko_cmd_w0, uint64_t *rpko_cmd_w1)
935 1.1 hikaru {
936 1.1 hikaru uint64_t pko_cmd_w0, pko_cmd_w1;
937 1.1 hikaru int segs;
938 1.1 hikaru int result = 0;
939 1.1 hikaru
940 1.1 hikaru if (octeon_eth_send_makecmd_gbuf(sc, m, gbuf, &segs)) {
941 1.1 hikaru log(LOG_WARNING, "%s: there are a lot of number of segments"
942 1.1 hikaru " of transmission data", device_xname(sc->sc_dev));
943 1.1 hikaru result = 1;
944 1.1 hikaru goto done;
945 1.1 hikaru }
946 1.1 hikaru
947 1.1 hikaru /*
948 1.1 hikaru * segs == 1 -> link mode (single continuous buffer)
949 1.1 hikaru * WORD1[size] is number of bytes pointed by segment
950 1.1 hikaru *
951 1.1 hikaru * segs > 1 -> gather mode (scatter-gather buffer)
952 1.1 hikaru * WORD1[size] is number of segments
953 1.1 hikaru */
954 1.1 hikaru pko_cmd_w0 = octeon_eth_send_makecmd_w0(sc->sc_fau_done.fd_regno,
955 1.1 hikaru 0, m->m_pkthdr.len, segs);
956 1.4 matt if (segs == 1) {
957 1.4 matt pko_cmd_w1 = octeon_eth_send_makecmd_w1(
958 1.4 matt m->m_pkthdr.len, kvtophys((vaddr_t)m->m_data));
959 1.4 matt } else {
960 1.4 matt #ifdef __mips_n32
961 1.4 matt KASSERT(MIPS_KSEG0_P(gbuf));
962 1.4 matt pko_cmd_w1 = octeon_eth_send_makecmd_w1(segs,
963 1.4 matt MIPS_KSEG0_TO_PHYS(gbuf));
964 1.4 matt #else
965 1.4 matt pko_cmd_w1 = octeon_eth_send_makecmd_w1(segs,
966 1.4 matt MIPS_XKPHYS_TO_PHYS(gbuf));
967 1.4 matt #endif
968 1.4 matt }
969 1.1 hikaru
970 1.1 hikaru *rpko_cmd_w0 = pko_cmd_w0;
971 1.1 hikaru *rpko_cmd_w1 = pko_cmd_w1;
972 1.1 hikaru
973 1.1 hikaru done:
974 1.1 hikaru return result;
975 1.1 hikaru }
976 1.1 hikaru
977 1.1 hikaru static inline int
978 1.1 hikaru octeon_eth_send_cmd(struct octeon_eth_softc *sc, uint64_t pko_cmd_w0,
979 1.8 jmcneill uint64_t pko_cmd_w1, int *pwdc)
980 1.1 hikaru {
981 1.1 hikaru uint64_t *cmdptr;
982 1.1 hikaru int result = 0;
983 1.1 hikaru
984 1.4 matt #ifdef __mips_n32
985 1.4 matt KASSERT((sc->sc_cmdptr.cmdptr & ~MIPS_PHYS_MASK) == 0);
986 1.4 matt cmdptr = (uint64_t *)MIPS_PHYS_TO_KSEG0(sc->sc_cmdptr.cmdptr);
987 1.4 matt #else
988 1.1 hikaru cmdptr = (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(sc->sc_cmdptr.cmdptr);
989 1.4 matt #endif
990 1.1 hikaru cmdptr += sc->sc_cmdptr.cmdptr_idx;
991 1.1 hikaru
992 1.1 hikaru OCTEON_ETH_KASSERT(cmdptr != NULL);
993 1.1 hikaru
994 1.1 hikaru *cmdptr++ = pko_cmd_w0;
995 1.1 hikaru *cmdptr++ = pko_cmd_w1;
996 1.1 hikaru
997 1.1 hikaru OCTEON_ETH_KASSERT(sc->sc_cmdptr.cmdptr_idx + 2 <= FPA_COMMAND_BUFFER_POOL_NWORDS - 1);
998 1.1 hikaru
999 1.1 hikaru if (sc->sc_cmdptr.cmdptr_idx + 2 == FPA_COMMAND_BUFFER_POOL_NWORDS - 1) {
1000 1.1 hikaru paddr_t buf;
1001 1.1 hikaru
1002 1.1 hikaru buf = octeon_fpa_buf_get_paddr(octeon_eth_fb_cmd);
1003 1.1 hikaru if (buf == 0) {
1004 1.1 hikaru log(LOG_WARNING,
1005 1.1 hikaru "%s: can not allocate command buffer from free pool allocator\n",
1006 1.1 hikaru device_xname(sc->sc_dev));
1007 1.1 hikaru result = 1;
1008 1.1 hikaru goto done;
1009 1.1 hikaru }
1010 1.1 hikaru OCTEON_EVCNT_INC(sc, txbufcbget);
1011 1.1 hikaru *cmdptr++ = buf;
1012 1.1 hikaru sc->sc_cmdptr.cmdptr = (uint64_t)buf;
1013 1.1 hikaru sc->sc_cmdptr.cmdptr_idx = 0;
1014 1.1 hikaru } else {
1015 1.1 hikaru sc->sc_cmdptr.cmdptr_idx += 2;
1016 1.1 hikaru }
1017 1.1 hikaru
1018 1.8 jmcneill *pwdc += 2;
1019 1.1 hikaru
1020 1.1 hikaru done:
1021 1.1 hikaru return result;
1022 1.1 hikaru }
1023 1.1 hikaru
1024 1.1 hikaru static inline int
1025 1.1 hikaru octeon_eth_send_buf(struct octeon_eth_softc *sc, struct mbuf *m,
1026 1.8 jmcneill uint64_t *gbuf, int *pwdc)
1027 1.1 hikaru {
1028 1.1 hikaru int result = 0, error;
1029 1.1 hikaru uint64_t pko_cmd_w0, pko_cmd_w1;
1030 1.1 hikaru
1031 1.1 hikaru error = octeon_eth_send_makecmd(sc, m, gbuf, &pko_cmd_w0, &pko_cmd_w1);
1032 1.1 hikaru if (error != 0) {
1033 1.12 msaitoh /* Already logging */
1034 1.1 hikaru OCTEON_EVCNT_INC(sc, txerrmkcmd);
1035 1.1 hikaru result = error;
1036 1.1 hikaru goto done;
1037 1.1 hikaru }
1038 1.1 hikaru
1039 1.8 jmcneill error = octeon_eth_send_cmd(sc, pko_cmd_w0, pko_cmd_w1, pwdc);
1040 1.1 hikaru if (error != 0) {
1041 1.12 msaitoh /* Already logging */
1042 1.1 hikaru OCTEON_EVCNT_INC(sc, txerrcmd);
1043 1.1 hikaru result = error;
1044 1.1 hikaru }
1045 1.1 hikaru
1046 1.1 hikaru done:
1047 1.1 hikaru return result;
1048 1.1 hikaru }
1049 1.1 hikaru
1050 1.1 hikaru static inline int
1051 1.8 jmcneill octeon_eth_send(struct octeon_eth_softc *sc, struct mbuf *m, int *pwdc)
1052 1.1 hikaru {
1053 1.1 hikaru paddr_t gaddr = 0;
1054 1.1 hikaru uint64_t *gbuf = NULL;
1055 1.1 hikaru int result = 0, error;
1056 1.1 hikaru
1057 1.1 hikaru OCTEON_EVCNT_INC(sc, tx);
1058 1.1 hikaru
1059 1.1 hikaru gaddr = octeon_fpa_buf_get_paddr(octeon_eth_fb_sg);
1060 1.1 hikaru if (gaddr == 0) {
1061 1.12 msaitoh log(LOG_WARNING, "%s: can not allocate gather buffer from "
1062 1.12 msaitoh "free pool allocator\n", device_xname(sc->sc_dev));
1063 1.1 hikaru OCTEON_EVCNT_INC(sc, txerrgbuf);
1064 1.1 hikaru result = 1;
1065 1.1 hikaru goto done;
1066 1.1 hikaru }
1067 1.1 hikaru OCTEON_EVCNT_INC(sc, txbufgbget);
1068 1.1 hikaru
1069 1.4 matt #ifdef __mips_n32
1070 1.4 matt KASSERT((gaddr & ~MIPS_PHYS_MASK) == 0);
1071 1.4 matt gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_KSEG0(gaddr);
1072 1.4 matt #else
1073 1.1 hikaru gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_XKPHYS_CACHED(gaddr);
1074 1.4 matt #endif
1075 1.1 hikaru
1076 1.1 hikaru OCTEON_ETH_KASSERT(gbuf != NULL);
1077 1.1 hikaru
1078 1.8 jmcneill error = octeon_eth_send_buf(sc, m, gbuf, pwdc);
1079 1.1 hikaru if (error != 0) {
1080 1.12 msaitoh /* Already logging */
1081 1.1 hikaru octeon_fpa_buf_put_paddr(octeon_eth_fb_sg, gaddr);
1082 1.1 hikaru OCTEON_EVCNT_INC(sc, txbufgbput);
1083 1.1 hikaru result = error;
1084 1.1 hikaru goto done;
1085 1.1 hikaru }
1086 1.1 hikaru
1087 1.1 hikaru octeon_eth_send_queue_add(sc, m, gbuf);
1088 1.1 hikaru
1089 1.1 hikaru done:
1090 1.1 hikaru return result;
1091 1.1 hikaru }
1092 1.1 hikaru
1093 1.1 hikaru static void
1094 1.1 hikaru octeon_eth_start(struct ifnet *ifp)
1095 1.1 hikaru {
1096 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
1097 1.1 hikaru struct mbuf *m;
1098 1.8 jmcneill int wdc = 0;
1099 1.1 hikaru
1100 1.1 hikaru /*
1101 1.12 msaitoh * Performance tuning
1102 1.12 msaitoh * presend iobdma request
1103 1.1 hikaru */
1104 1.1 hikaru octeon_eth_send_queue_flush_prefetch(sc);
1105 1.1 hikaru
1106 1.1 hikaru if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1107 1.1 hikaru goto last;
1108 1.1 hikaru
1109 1.1 hikaru /* XXX assume that OCTEON doesn't buffer packets */
1110 1.1 hikaru if (__predict_false(!octeon_gmx_link_status(sc->sc_gmx_port))) {
1111 1.12 msaitoh /* Dequeue and drop them */
1112 1.1 hikaru while (1) {
1113 1.1 hikaru IFQ_DEQUEUE(&ifp->if_snd, m);
1114 1.1 hikaru if (m == NULL)
1115 1.1 hikaru break;
1116 1.1 hikaru
1117 1.1 hikaru m_freem(m);
1118 1.1 hikaru IF_DROP(&ifp->if_snd);
1119 1.1 hikaru OCTEON_EVCNT_INC(sc, txerrlink);
1120 1.1 hikaru }
1121 1.1 hikaru goto last;
1122 1.1 hikaru }
1123 1.1 hikaru
1124 1.1 hikaru for (;;) {
1125 1.1 hikaru IFQ_POLL(&ifp->if_snd, m);
1126 1.1 hikaru if (__predict_false(m == NULL))
1127 1.1 hikaru break;
1128 1.1 hikaru
1129 1.1 hikaru /* XXX XXX XXX */
1130 1.1 hikaru octeon_eth_send_queue_flush_fetch(sc);
1131 1.1 hikaru
1132 1.1 hikaru /*
1133 1.12 msaitoh * If no free send buffer is available, free all the sent
1134 1.12 msaitoh * buffer and bail out.
1135 1.1 hikaru */
1136 1.1 hikaru if (octeon_eth_send_queue_is_full(sc)) {
1137 1.8 jmcneill SET(ifp->if_flags, IFF_OACTIVE);
1138 1.8 jmcneill if (wdc > 0)
1139 1.8 jmcneill octeon_pko_op_doorbell_write(sc->sc_port,
1140 1.8 jmcneill sc->sc_port, wdc);
1141 1.1 hikaru return;
1142 1.1 hikaru }
1143 1.1 hikaru /* XXX XXX XXX */
1144 1.1 hikaru
1145 1.1 hikaru IFQ_DEQUEUE(&ifp->if_snd, m);
1146 1.1 hikaru
1147 1.9 msaitoh bpf_mtap(ifp, m, BPF_D_OUT);
1148 1.1 hikaru
1149 1.1 hikaru /* XXX XXX XXX */
1150 1.1 hikaru if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh)
1151 1.1 hikaru octeon_eth_send_queue_flush(sc);
1152 1.8 jmcneill if (octeon_eth_send(sc, m, &wdc)) {
1153 1.1 hikaru IF_DROP(&ifp->if_snd);
1154 1.1 hikaru m_freem(m);
1155 1.1 hikaru log(LOG_WARNING,
1156 1.12 msaitoh "%s: failed in the transmission of the packet\n",
1157 1.12 msaitoh device_xname(sc->sc_dev));
1158 1.1 hikaru OCTEON_EVCNT_INC(sc, txerr);
1159 1.12 msaitoh } else
1160 1.1 hikaru sc->sc_soft_req_cnt++;
1161 1.12 msaitoh
1162 1.1 hikaru if (sc->sc_flush)
1163 1.1 hikaru octeon_eth_send_queue_flush_sync(sc);
1164 1.1 hikaru /* XXX XXX XXX */
1165 1.1 hikaru
1166 1.12 msaitoh /* Send next iobdma request */
1167 1.1 hikaru octeon_eth_send_queue_flush_prefetch(sc);
1168 1.1 hikaru }
1169 1.1 hikaru
1170 1.8 jmcneill if (wdc > 0)
1171 1.8 jmcneill octeon_pko_op_doorbell_write(sc->sc_port, sc->sc_port, wdc);
1172 1.8 jmcneill
1173 1.1 hikaru /*
1174 1.1 hikaru * Don't schedule send-buffer-free callout every time - those buffers are freed
1175 1.1 hikaru * by "free tick". This makes some packets like NFS slower.
1176 1.1 hikaru */
1177 1.1 hikaru #ifdef OCTEON_ETH_USENFS
1178 1.1 hikaru if (__predict_false(sc->sc_ext_callback_cnt > 0)) {
1179 1.1 hikaru int timo;
1180 1.1 hikaru
1181 1.1 hikaru /* ??? */
1182 1.1 hikaru timo = hz - (100 * sc->sc_ext_callback_cnt);
1183 1.1 hikaru if (timo < 10)
1184 1.1 hikaru timo = 10;
1185 1.1 hikaru callout_schedule(&sc->sc_tick_free_ch, timo);
1186 1.1 hikaru }
1187 1.1 hikaru #endif
1188 1.1 hikaru
1189 1.1 hikaru last:
1190 1.1 hikaru octeon_eth_send_queue_flush_fetch(sc);
1191 1.1 hikaru }
1192 1.1 hikaru
1193 1.1 hikaru static void
1194 1.1 hikaru octeon_eth_watchdog(struct ifnet *ifp)
1195 1.1 hikaru {
1196 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
1197 1.1 hikaru
1198 1.1 hikaru printf("%s: device timeout\n", device_xname(sc->sc_dev));
1199 1.1 hikaru
1200 1.1 hikaru octeon_eth_configure(sc);
1201 1.1 hikaru
1202 1.1 hikaru SET(ifp->if_flags, IFF_RUNNING);
1203 1.1 hikaru CLR(ifp->if_flags, IFF_OACTIVE);
1204 1.1 hikaru ifp->if_timer = 0;
1205 1.1 hikaru
1206 1.1 hikaru octeon_eth_start(ifp);
1207 1.1 hikaru }
1208 1.1 hikaru
1209 1.1 hikaru static int
1210 1.1 hikaru octeon_eth_init(struct ifnet *ifp)
1211 1.1 hikaru {
1212 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
1213 1.1 hikaru
1214 1.1 hikaru /* XXX don't disable commonly used parts!!! XXX */
1215 1.1 hikaru if (sc->sc_init_flag == 0) {
1216 1.1 hikaru /* Cancel any pending I/O. */
1217 1.1 hikaru octeon_eth_stop(ifp, 0);
1218 1.1 hikaru
1219 1.1 hikaru /* Initialize the device */
1220 1.1 hikaru octeon_eth_configure(sc);
1221 1.1 hikaru
1222 1.1 hikaru octeon_pko_enable(sc->sc_pko);
1223 1.1 hikaru octeon_ipd_enable(sc->sc_ipd);
1224 1.1 hikaru
1225 1.1 hikaru sc->sc_init_flag = 1;
1226 1.1 hikaru } else {
1227 1.1 hikaru octeon_gmx_port_enable(sc->sc_gmx_port, 1);
1228 1.1 hikaru }
1229 1.1 hikaru octeon_eth_mediachange(ifp);
1230 1.1 hikaru
1231 1.1 hikaru octeon_gmx_set_filter(sc->sc_gmx_port);
1232 1.1 hikaru
1233 1.1 hikaru callout_reset(&sc->sc_tick_misc_ch, hz, octeon_eth_tick_misc, sc);
1234 1.1 hikaru callout_reset(&sc->sc_tick_free_ch, hz, octeon_eth_tick_free, sc);
1235 1.1 hikaru
1236 1.1 hikaru SET(ifp->if_flags, IFF_RUNNING);
1237 1.1 hikaru CLR(ifp->if_flags, IFF_OACTIVE);
1238 1.1 hikaru
1239 1.1 hikaru return 0;
1240 1.1 hikaru }
1241 1.1 hikaru
1242 1.1 hikaru static void
1243 1.1 hikaru octeon_eth_stop(struct ifnet *ifp, int disable)
1244 1.1 hikaru {
1245 1.1 hikaru struct octeon_eth_softc *sc = ifp->if_softc;
1246 1.1 hikaru
1247 1.1 hikaru callout_stop(&sc->sc_tick_misc_ch);
1248 1.1 hikaru callout_stop(&sc->sc_tick_free_ch);
1249 1.1 hikaru
1250 1.1 hikaru mii_down(&sc->sc_mii);
1251 1.1 hikaru
1252 1.1 hikaru octeon_gmx_port_enable(sc->sc_gmx_port, 0);
1253 1.1 hikaru
1254 1.1 hikaru /* Mark the interface as down and cancel the watchdog timer. */
1255 1.1 hikaru CLR(ifp->if_flags, IFF_RUNNING | IFF_OACTIVE);
1256 1.1 hikaru ifp->if_timer = 0;
1257 1.1 hikaru }
1258 1.1 hikaru
1259 1.1 hikaru /* ---- misc */
1260 1.1 hikaru
1261 1.1 hikaru #define PKO_INDEX_MASK ((1ULL << 12/* XXX */) - 1)
1262 1.1 hikaru
1263 1.1 hikaru static int
1264 1.1 hikaru octeon_eth_reset(struct octeon_eth_softc *sc)
1265 1.1 hikaru {
1266 1.1 hikaru octeon_gmx_reset_speed(sc->sc_gmx_port);
1267 1.1 hikaru octeon_gmx_reset_flowctl(sc->sc_gmx_port);
1268 1.1 hikaru octeon_gmx_reset_timing(sc->sc_gmx_port);
1269 1.1 hikaru
1270 1.1 hikaru return 0;
1271 1.1 hikaru }
1272 1.1 hikaru
1273 1.1 hikaru static int
1274 1.1 hikaru octeon_eth_configure(struct octeon_eth_softc *sc)
1275 1.1 hikaru {
1276 1.1 hikaru octeon_gmx_port_enable(sc->sc_gmx_port, 0);
1277 1.1 hikaru
1278 1.1 hikaru octeon_eth_reset(sc);
1279 1.1 hikaru
1280 1.1 hikaru octeon_eth_configure_common(sc);
1281 1.1 hikaru
1282 1.1 hikaru octeon_pko_port_config(sc->sc_pko);
1283 1.1 hikaru octeon_pko_port_enable(sc->sc_pko, 1);
1284 1.1 hikaru octeon_pip_port_config(sc->sc_pip);
1285 1.1 hikaru
1286 1.1 hikaru octeon_gmx_tx_stats_rd_clr(sc->sc_gmx_port, 1);
1287 1.1 hikaru octeon_gmx_rx_stats_rd_clr(sc->sc_gmx_port, 1);
1288 1.1 hikaru
1289 1.1 hikaru octeon_gmx_port_enable(sc->sc_gmx_port, 1);
1290 1.1 hikaru
1291 1.1 hikaru return 0;
1292 1.1 hikaru }
1293 1.1 hikaru
1294 1.1 hikaru static int
1295 1.1 hikaru octeon_eth_configure_common(struct octeon_eth_softc *sc)
1296 1.1 hikaru {
1297 1.1 hikaru static int once;
1298 1.1 hikaru
1299 1.1 hikaru if (once == 1)
1300 1.1 hikaru return 0;
1301 1.1 hikaru once = 1;
1302 1.1 hikaru
1303 1.1 hikaru octeon_ipd_config(sc->sc_ipd);
1304 1.1 hikaru #ifdef OCTEON_ETH_IPD_RED
1305 1.1 hikaru octeon_ipd_red(sc->sc_ipd, RECV_QUEUE_SIZE >> 2, RECV_QUEUE_SIZE >> 3);
1306 1.1 hikaru #endif
1307 1.1 hikaru octeon_pko_config(sc->sc_pko);
1308 1.1 hikaru
1309 1.1 hikaru octeon_pow_config(sc->sc_pow, OCTEON_POW_GROUP_PIP);
1310 1.1 hikaru
1311 1.1 hikaru return 0;
1312 1.1 hikaru }
1313 1.1 hikaru
1314 1.1 hikaru /* ---- receive (input) */
1315 1.1 hikaru
1316 1.1 hikaru static inline int
1317 1.1 hikaru octeon_eth_recv_mbuf(struct octeon_eth_softc *sc, uint64_t *work,
1318 1.1 hikaru struct mbuf **rm)
1319 1.1 hikaru {
1320 1.1 hikaru struct mbuf *m;
1321 1.1 hikaru void (*ext_free)(struct mbuf *, void *, size_t, void *);
1322 1.1 hikaru void *ext_buf;
1323 1.1 hikaru size_t ext_size;
1324 1.1 hikaru void *data;
1325 1.1 hikaru uint64_t word1 = work[1];
1326 1.1 hikaru uint64_t word2 = work[2];
1327 1.1 hikaru uint64_t word3 = work[3];
1328 1.1 hikaru
1329 1.1 hikaru MGETHDR(m, M_NOWAIT, MT_DATA);
1330 1.1 hikaru if (m == NULL)
1331 1.1 hikaru return 1;
1332 1.1 hikaru OCTEON_ETH_KASSERT(m != NULL);
1333 1.1 hikaru
1334 1.1 hikaru if ((word2 & PIP_WQE_WORD2_IP_BUFS) == 0) {
1335 1.1 hikaru /* Dynamic short */
1336 1.1 hikaru ext_free = octeon_eth_buf_ext_free_m;
1337 1.1 hikaru ext_buf = &work[4];
1338 1.1 hikaru ext_size = 96;
1339 1.1 hikaru
1340 1.1 hikaru data = &work[4 + sc->sc_ip_offset / sizeof(uint64_t)];
1341 1.1 hikaru } else {
1342 1.1 hikaru vaddr_t addr;
1343 1.1 hikaru vaddr_t start_buffer;
1344 1.1 hikaru
1345 1.4 matt #ifdef __mips_n32
1346 1.4 matt KASSERT((word3 & ~MIPS_PHYS_MASK) == 0);
1347 1.4 matt addr = MIPS_PHYS_TO_KSEG0(word3 & PIP_WQE_WORD3_ADDR);
1348 1.4 matt #else
1349 1.1 hikaru addr = MIPS_PHYS_TO_XKPHYS_CACHED(word3 & PIP_WQE_WORD3_ADDR);
1350 1.4 matt #endif
1351 1.1 hikaru start_buffer = addr & ~(2048 - 1);
1352 1.1 hikaru
1353 1.1 hikaru ext_free = octeon_eth_buf_ext_free_ext;
1354 1.1 hikaru ext_buf = (void *)start_buffer;
1355 1.1 hikaru ext_size = 2048;
1356 1.1 hikaru
1357 1.1 hikaru data = (void *)addr;
1358 1.1 hikaru }
1359 1.1 hikaru
1360 1.12 msaitoh /* Embed sc pointer into work[0] for _ext_free evcnt */
1361 1.1 hikaru work[0] = (uintptr_t)sc;
1362 1.1 hikaru
1363 1.1 hikaru MEXTADD(m, ext_buf, ext_size, 0, ext_free, work);
1364 1.1 hikaru OCTEON_ETH_KASSERT(ISSET(m->m_flags, M_EXT));
1365 1.1 hikaru
1366 1.1 hikaru m->m_data = data;
1367 1.1 hikaru m->m_len = m->m_pkthdr.len = (word1 & PIP_WQE_WORD1_LEN) >> 48;
1368 1.3 ozaki m_set_rcvif(m, &sc->sc_ethercom.ec_if);
1369 1.12 msaitoh
1370 1.12 msaitoh /* Not readonly buffer */
1371 1.1 hikaru m->m_flags |= M_EXT_RW;
1372 1.1 hikaru
1373 1.1 hikaru *rm = m;
1374 1.1 hikaru
1375 1.1 hikaru OCTEON_ETH_KASSERT(*rm != NULL);
1376 1.1 hikaru
1377 1.1 hikaru return 0;
1378 1.1 hikaru }
1379 1.1 hikaru
1380 1.1 hikaru static inline int
1381 1.1 hikaru octeon_eth_recv_check_code(struct octeon_eth_softc *sc, uint64_t word2)
1382 1.1 hikaru {
1383 1.1 hikaru uint64_t opecode = word2 & PIP_WQE_WORD2_NOIP_OPECODE;
1384 1.1 hikaru
1385 1.1 hikaru if (__predict_true(!ISSET(word2, PIP_WQE_WORD2_NOIP_RE)))
1386 1.1 hikaru return 0;
1387 1.1 hikaru
1388 1.12 msaitoh /* This error is harmless */
1389 1.1 hikaru if (opecode == PIP_OVER_ERR)
1390 1.1 hikaru return 0;
1391 1.1 hikaru
1392 1.1 hikaru return 1;
1393 1.1 hikaru }
1394 1.1 hikaru
1395 1.1 hikaru static inline int
1396 1.1 hikaru octeon_eth_recv_check_jumbo(struct octeon_eth_softc *sc, uint64_t word2)
1397 1.1 hikaru {
1398 1.1 hikaru if (__predict_false((word2 & PIP_WQE_WORD2_IP_BUFS) > (1ULL << 56)))
1399 1.1 hikaru return 1;
1400 1.1 hikaru return 0;
1401 1.1 hikaru }
1402 1.1 hikaru
1403 1.1 hikaru static inline int
1404 1.1 hikaru octeon_eth_recv_check_link(struct octeon_eth_softc *sc, uint64_t word2)
1405 1.1 hikaru {
1406 1.1 hikaru if (__predict_false(!octeon_gmx_link_status(sc->sc_gmx_port)))
1407 1.1 hikaru return 1;
1408 1.1 hikaru return 0;
1409 1.1 hikaru }
1410 1.1 hikaru
1411 1.1 hikaru static inline int
1412 1.1 hikaru octeon_eth_recv_check(struct octeon_eth_softc *sc, uint64_t word2)
1413 1.1 hikaru {
1414 1.1 hikaru if (__predict_false(octeon_eth_recv_check_link(sc, word2)) != 0) {
1415 1.1 hikaru if (ratecheck(&sc->sc_rate_recv_check_link_last,
1416 1.1 hikaru &sc->sc_rate_recv_check_link_cap))
1417 1.1 hikaru log(LOG_DEBUG,
1418 1.1 hikaru "%s: link is not up, the packet was dropped\n",
1419 1.1 hikaru device_xname(sc->sc_dev));
1420 1.1 hikaru OCTEON_EVCNT_INC(sc, rxerrlink);
1421 1.1 hikaru return 1;
1422 1.1 hikaru }
1423 1.1 hikaru
1424 1.1 hikaru #if 0 /* XXX Performance tunig (Jumbo-frame is not supported yet!) */
1425 1.1 hikaru if (__predict_false(octeon_eth_recv_check_jumbo(sc, word2)) != 0) {
1426 1.1 hikaru /* XXX jumbo frame */
1427 1.1 hikaru if (ratecheck(&sc->sc_rate_recv_check_jumbo_last,
1428 1.1 hikaru &sc->sc_rate_recv_check_jumbo_cap))
1429 1.1 hikaru log(LOG_DEBUG,
1430 1.1 hikaru "jumbo frame was received\n");
1431 1.1 hikaru OCTEON_EVCNT_INC(sc, rxerrjmb);
1432 1.1 hikaru return 1;
1433 1.1 hikaru }
1434 1.1 hikaru #endif
1435 1.1 hikaru
1436 1.1 hikaru if (__predict_false(octeon_eth_recv_check_code(sc, word2)) != 0) {
1437 1.1 hikaru
1438 1.1 hikaru if ((word2 & PIP_WQE_WORD2_NOIP_OPECODE) ==
1439 1.1 hikaru PIP_WQE_WORD2_RE_OPCODE_LENGTH) {
1440 1.12 msaitoh /* No logging */
1441 1.1 hikaru /* XXX inclement special error count */
1442 1.12 msaitoh } else if ((word2 & PIP_WQE_WORD2_NOIP_OPECODE) ==
1443 1.1 hikaru PIP_WQE_WORD2_RE_OPCODE_PARTIAL) {
1444 1.12 msaitoh /* Not an erorr. it's because of overload */
1445 1.1 hikaru } else {
1446 1.1 hikaru
1447 1.1 hikaru if (ratecheck(&sc->sc_rate_recv_check_code_last,
1448 1.12 msaitoh &sc->sc_rate_recv_check_code_cap))
1449 1.1 hikaru log(LOG_WARNING,
1450 1.6 maya "%s: reception error, packet dropped "
1451 1.6 maya "(error code = %" PRId64 ")\n",
1452 1.1 hikaru device_xname(sc->sc_dev), word2 & PIP_WQE_WORD2_NOIP_OPECODE);
1453 1.1 hikaru }
1454 1.1 hikaru OCTEON_EVCNT_INC(sc, rxerrcode);
1455 1.1 hikaru return 1;
1456 1.1 hikaru }
1457 1.1 hikaru
1458 1.1 hikaru return 0;
1459 1.1 hikaru }
1460 1.1 hikaru
1461 1.1 hikaru static inline int
1462 1.1 hikaru octeon_eth_recv(struct octeon_eth_softc *sc, uint64_t *work)
1463 1.1 hikaru {
1464 1.1 hikaru int result = 0;
1465 1.1 hikaru struct ifnet *ifp;
1466 1.1 hikaru struct mbuf *m;
1467 1.1 hikaru uint64_t word2;
1468 1.1 hikaru
1469 1.1 hikaru /* XXX XXX XXX */
1470 1.1 hikaru /*
1471 1.12 msaitoh * Performance tuning
1472 1.1 hikaru * presend iobdma request
1473 1.1 hikaru */
1474 1.1 hikaru if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh) {
1475 1.1 hikaru octeon_eth_send_queue_flush_prefetch(sc);
1476 1.1 hikaru }
1477 1.1 hikaru /* XXX XXX XXX */
1478 1.1 hikaru
1479 1.1 hikaru OCTEON_ETH_KASSERT(sc != NULL);
1480 1.1 hikaru OCTEON_ETH_KASSERT(work != NULL);
1481 1.1 hikaru
1482 1.1 hikaru OCTEON_EVCNT_INC(sc, rx);
1483 1.1 hikaru
1484 1.1 hikaru word2 = work[2];
1485 1.1 hikaru ifp = &sc->sc_ethercom.ec_if;
1486 1.1 hikaru
1487 1.1 hikaru OCTEON_ETH_KASSERT(ifp != NULL);
1488 1.1 hikaru
1489 1.1 hikaru if (__predict_false(octeon_eth_recv_check(sc, word2) != 0)) {
1490 1.1 hikaru ifp->if_ierrors++;
1491 1.1 hikaru result = 1;
1492 1.1 hikaru octeon_eth_buf_free_work(sc, work, word2);
1493 1.1 hikaru goto drop;
1494 1.1 hikaru }
1495 1.1 hikaru
1496 1.1 hikaru if (__predict_false(octeon_eth_recv_mbuf(sc, work, &m) != 0)) {
1497 1.1 hikaru ifp->if_ierrors++;
1498 1.1 hikaru result = 1;
1499 1.1 hikaru octeon_eth_buf_free_work(sc, work, word2);
1500 1.1 hikaru goto drop;
1501 1.1 hikaru }
1502 1.1 hikaru
1503 1.1 hikaru /* work[0] .. work[3] may not be valid any more */
1504 1.1 hikaru
1505 1.1 hikaru OCTEON_ETH_KASSERT(m != NULL);
1506 1.1 hikaru
1507 1.1 hikaru octeon_ipd_offload(word2, m->m_data, &m->m_pkthdr.csum_flags);
1508 1.1 hikaru
1509 1.1 hikaru /* XXX XXX XXX */
1510 1.1 hikaru if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh) {
1511 1.1 hikaru octeon_eth_send_queue_flush_fetch(sc);
1512 1.1 hikaru octeon_eth_send_queue_flush(sc);
1513 1.1 hikaru }
1514 1.1 hikaru
1515 1.1 hikaru /* XXX XXX XXX */
1516 1.1 hikaru if (sc->sc_flush)
1517 1.1 hikaru octeon_eth_send_queue_flush_sync(sc);
1518 1.1 hikaru /* XXX XXX XXX */
1519 1.1 hikaru
1520 1.2 ozaki if_percpuq_enqueue(ifp->if_percpuq, m);
1521 1.1 hikaru
1522 1.1 hikaru return 0;
1523 1.1 hikaru
1524 1.1 hikaru drop:
1525 1.1 hikaru /* XXX XXX XXX */
1526 1.1 hikaru if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh) {
1527 1.1 hikaru octeon_eth_send_queue_flush_fetch(sc);
1528 1.1 hikaru }
1529 1.1 hikaru /* XXX XXX XXX */
1530 1.1 hikaru
1531 1.1 hikaru return result;
1532 1.1 hikaru }
1533 1.1 hikaru
1534 1.1 hikaru static void
1535 1.1 hikaru octeon_eth_recv_redir(struct ifnet *ifp, struct mbuf *m)
1536 1.1 hikaru {
1537 1.1 hikaru struct octeon_eth_softc *rsc = ifp->if_softc;
1538 1.1 hikaru struct octeon_eth_softc *sc = NULL;
1539 1.8 jmcneill int i, wdc = 0;
1540 1.1 hikaru
1541 1.1 hikaru for (i = 0; i < 3 /* XXX */; i++) {
1542 1.1 hikaru if (rsc->sc_redir & (1 << i))
1543 1.1 hikaru sc = octeon_eth_gsc[i];
1544 1.1 hikaru }
1545 1.1 hikaru
1546 1.1 hikaru if (sc == NULL) {
1547 1.1 hikaru m_freem(m);
1548 1.1 hikaru return;
1549 1.1 hikaru }
1550 1.1 hikaru octeon_eth_send_queue_flush_prefetch(sc);
1551 1.1 hikaru
1552 1.1 hikaru octeon_eth_send_queue_flush_fetch(sc);
1553 1.1 hikaru
1554 1.1 hikaru if (octeon_eth_send_queue_is_full(sc)) {
1555 1.1 hikaru m_freem(m);
1556 1.1 hikaru return;
1557 1.1 hikaru }
1558 1.1 hikaru if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh)
1559 1.1 hikaru octeon_eth_send_queue_flush(sc);
1560 1.1 hikaru
1561 1.8 jmcneill if (octeon_eth_send(sc, m, &wdc)) {
1562 1.1 hikaru IF_DROP(&ifp->if_snd);
1563 1.1 hikaru m_freem(m);
1564 1.1 hikaru } else {
1565 1.8 jmcneill octeon_pko_op_doorbell_write(sc->sc_port, sc->sc_port, wdc);
1566 1.1 hikaru sc->sc_soft_req_cnt++;
1567 1.1 hikaru }
1568 1.1 hikaru
1569 1.1 hikaru if (sc->sc_flush)
1570 1.1 hikaru octeon_eth_send_queue_flush_sync(sc);
1571 1.1 hikaru }
1572 1.1 hikaru
1573 1.1 hikaru static inline void
1574 1.1 hikaru octeon_eth_recv_intr(void *data, uint64_t *work)
1575 1.1 hikaru {
1576 1.1 hikaru struct octeon_eth_softc *sc;
1577 1.1 hikaru int port;
1578 1.1 hikaru
1579 1.1 hikaru OCTEON_ETH_KASSERT(work != NULL);
1580 1.1 hikaru
1581 1.1 hikaru port = (work[1] & PIP_WQE_WORD1_IPRT) >> 42;
1582 1.1 hikaru
1583 1.1 hikaru OCTEON_ETH_KASSERT(port < GMX_PORT_NUNITS);
1584 1.1 hikaru
1585 1.1 hikaru sc = octeon_eth_gsc[port];
1586 1.1 hikaru
1587 1.1 hikaru OCTEON_ETH_KASSERT(sc != NULL);
1588 1.1 hikaru OCTEON_ETH_KASSERT(port == sc->sc_port);
1589 1.1 hikaru
1590 1.1 hikaru /* XXX process all work queue entries anyway */
1591 1.1 hikaru
1592 1.1 hikaru (void)octeon_eth_recv(sc, work);
1593 1.1 hikaru }
1594 1.1 hikaru
1595 1.1 hikaru /* ---- tick */
1596 1.1 hikaru
1597 1.1 hikaru /*
1598 1.1 hikaru * octeon_eth_tick_free
1599 1.1 hikaru *
1600 1.1 hikaru * => garbage collect send gather buffer / mbuf
1601 1.1 hikaru * => called at softclock
1602 1.1 hikaru */
1603 1.1 hikaru static void
1604 1.1 hikaru octeon_eth_tick_free(void *arg)
1605 1.1 hikaru {
1606 1.1 hikaru struct octeon_eth_softc *sc = arg;
1607 1.1 hikaru int timo;
1608 1.1 hikaru int s;
1609 1.1 hikaru
1610 1.1 hikaru s = splnet();
1611 1.1 hikaru /* XXX XXX XXX */
1612 1.1 hikaru if (sc->sc_soft_req_cnt > 0) {
1613 1.1 hikaru octeon_eth_send_queue_flush_prefetch(sc);
1614 1.1 hikaru octeon_eth_send_queue_flush_fetch(sc);
1615 1.1 hikaru octeon_eth_send_queue_flush(sc);
1616 1.1 hikaru octeon_eth_send_queue_flush_sync(sc);
1617 1.1 hikaru }
1618 1.1 hikaru /* XXX XXX XXX */
1619 1.1 hikaru
1620 1.1 hikaru /* XXX XXX XXX */
1621 1.1 hikaru /* ??? */
1622 1.1 hikaru timo = hz - (100 * sc->sc_ext_callback_cnt);
1623 1.1 hikaru if (timo < 10)
1624 1.1 hikaru timo = 10;
1625 1.1 hikaru callout_schedule(&sc->sc_tick_free_ch, timo);
1626 1.1 hikaru /* XXX XXX XXX */
1627 1.1 hikaru splx(s);
1628 1.1 hikaru }
1629 1.1 hikaru
1630 1.1 hikaru /*
1631 1.1 hikaru * octeon_eth_tick_misc
1632 1.1 hikaru *
1633 1.1 hikaru * => collect statistics
1634 1.1 hikaru * => check link status
1635 1.1 hikaru * => called at softclock
1636 1.1 hikaru */
1637 1.1 hikaru static void
1638 1.1 hikaru octeon_eth_tick_misc(void *arg)
1639 1.1 hikaru {
1640 1.1 hikaru struct octeon_eth_softc *sc = arg;
1641 1.1 hikaru struct ifnet *ifp;
1642 1.1 hikaru int s;
1643 1.1 hikaru
1644 1.1 hikaru s = splnet();
1645 1.1 hikaru
1646 1.1 hikaru ifp = &sc->sc_ethercom.ec_if;
1647 1.1 hikaru
1648 1.1 hikaru octeon_gmx_stats(sc->sc_gmx_port);
1649 1.1 hikaru octeon_pip_stats(sc->sc_pip, ifp, sc->sc_port);
1650 1.1 hikaru mii_tick(&sc->sc_mii);
1651 1.1 hikaru
1652 1.1 hikaru splx(s);
1653 1.1 hikaru
1654 1.1 hikaru callout_schedule(&sc->sc_tick_misc_ch, hz);
1655 1.1 hikaru }
1656 1.1 hikaru
1657 1.12 msaitoh /* ---- Odd nibble preamble workaround (software CRC processing) */
1658 1.1 hikaru
1659 1.1 hikaru /* ---- sysctl */
1660 1.1 hikaru
1661 1.1 hikaru static int octeon_eth_sysctl_verify(SYSCTLFN_ARGS);
1662 1.1 hikaru static int octeon_eth_sysctl_pool(SYSCTLFN_ARGS);
1663 1.1 hikaru static int octeon_eth_sysctl_rd(SYSCTLFN_ARGS);
1664 1.1 hikaru
1665 1.1 hikaru static int octeon_eth_sysctl_pkocmdw0n2_num;
1666 1.1 hikaru static int octeon_eth_sysctl_pipdynrs_num;
1667 1.1 hikaru static int octeon_eth_sysctl_redir_num;
1668 1.1 hikaru static int octeon_eth_sysctl_pkt_pool_num;
1669 1.1 hikaru static int octeon_eth_sysctl_wqe_pool_num;
1670 1.1 hikaru static int octeon_eth_sysctl_cmd_pool_num;
1671 1.1 hikaru static int octeon_eth_sysctl_sg_pool_num;
1672 1.1 hikaru static int octeon_eth_sysctl_pktbuf_num;
1673 1.1 hikaru
1674 1.1 hikaru /*
1675 1.1 hikaru * Set up sysctl(3) MIB, hw.cnmac.*.
1676 1.1 hikaru */
1677 1.1 hikaru SYSCTL_SETUP(sysctl_octeon_eth, "sysctl cnmac subtree setup")
1678 1.1 hikaru {
1679 1.1 hikaru int rc;
1680 1.1 hikaru int octeon_eth_sysctl_root_num;
1681 1.1 hikaru const struct sysctlnode *node;
1682 1.1 hikaru
1683 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, NULL,
1684 1.12 msaitoh 0, CTLTYPE_NODE, "hw", NULL,
1685 1.12 msaitoh NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) {
1686 1.1 hikaru goto err;
1687 1.1 hikaru }
1688 1.1 hikaru
1689 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1690 1.12 msaitoh 0, CTLTYPE_NODE, "cnmac",
1691 1.12 msaitoh SYSCTL_DESCR("cnmac interface controls"),
1692 1.12 msaitoh NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) {
1693 1.1 hikaru goto err;
1694 1.1 hikaru }
1695 1.1 hikaru
1696 1.1 hikaru octeon_eth_sysctl_root_num = node->sysctl_num;
1697 1.1 hikaru
1698 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1699 1.12 msaitoh CTLFLAG_PERMANENT | CTLFLAG_READWRITE,
1700 1.12 msaitoh CTLTYPE_INT, "pko_cmd_w0_n2",
1701 1.12 msaitoh SYSCTL_DESCR("PKO command WORD0 N2 bit"),
1702 1.12 msaitoh octeon_eth_sysctl_verify, 0,
1703 1.12 msaitoh &octeon_eth_param_pko_cmd_w0_n2,
1704 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1705 1.12 msaitoh CTL_EOL)) != 0) {
1706 1.12 msaitoh goto err;
1707 1.1 hikaru }
1708 1.1 hikaru
1709 1.1 hikaru octeon_eth_sysctl_pkocmdw0n2_num = node->sysctl_num;
1710 1.1 hikaru
1711 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1712 1.12 msaitoh CTLFLAG_PERMANENT | CTLFLAG_READWRITE,
1713 1.12 msaitoh CTLTYPE_INT, "pip_dyn_rs",
1714 1.12 msaitoh SYSCTL_DESCR("PIP dynamic short in WQE"),
1715 1.12 msaitoh octeon_eth_sysctl_verify, 0,
1716 1.12 msaitoh &octeon_eth_param_pip_dyn_rs,
1717 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1718 1.12 msaitoh CTL_EOL)) != 0) {
1719 1.12 msaitoh goto err;
1720 1.1 hikaru }
1721 1.1 hikaru
1722 1.1 hikaru octeon_eth_sysctl_pipdynrs_num = node->sysctl_num;
1723 1.1 hikaru
1724 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1725 1.12 msaitoh CTLFLAG_PERMANENT | CTLFLAG_READWRITE,
1726 1.12 msaitoh CTLTYPE_INT, "redir",
1727 1.12 msaitoh SYSCTL_DESCR("input port redirection"),
1728 1.12 msaitoh octeon_eth_sysctl_verify, 0,
1729 1.12 msaitoh &octeon_eth_param_redir,
1730 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1731 1.12 msaitoh CTL_EOL)) != 0) {
1732 1.12 msaitoh goto err;
1733 1.1 hikaru }
1734 1.1 hikaru
1735 1.1 hikaru octeon_eth_sysctl_redir_num = node->sysctl_num;
1736 1.1 hikaru
1737 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1738 1.12 msaitoh CTLFLAG_PERMANENT,
1739 1.12 msaitoh CTLTYPE_INT, "pkt_pool",
1740 1.12 msaitoh SYSCTL_DESCR("packet pool available"),
1741 1.12 msaitoh octeon_eth_sysctl_pool, 0, NULL,
1742 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1743 1.12 msaitoh CTL_EOL)) != 0) {
1744 1.12 msaitoh goto err;
1745 1.1 hikaru }
1746 1.1 hikaru
1747 1.1 hikaru octeon_eth_sysctl_pkt_pool_num = node->sysctl_num;
1748 1.1 hikaru
1749 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1750 1.12 msaitoh CTLFLAG_PERMANENT,
1751 1.12 msaitoh CTLTYPE_INT, "wqe_pool",
1752 1.12 msaitoh SYSCTL_DESCR("wqe pool available"),
1753 1.12 msaitoh octeon_eth_sysctl_pool, 0, NULL,
1754 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1755 1.12 msaitoh CTL_EOL)) != 0) {
1756 1.12 msaitoh goto err;
1757 1.1 hikaru }
1758 1.1 hikaru
1759 1.1 hikaru octeon_eth_sysctl_wqe_pool_num = node->sysctl_num;
1760 1.1 hikaru
1761 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1762 1.12 msaitoh CTLFLAG_PERMANENT,
1763 1.12 msaitoh CTLTYPE_INT, "cmd_pool",
1764 1.12 msaitoh SYSCTL_DESCR("cmd pool available"),
1765 1.12 msaitoh octeon_eth_sysctl_pool, 0, NULL,
1766 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1767 1.12 msaitoh CTL_EOL)) != 0) {
1768 1.12 msaitoh goto err;
1769 1.1 hikaru }
1770 1.1 hikaru
1771 1.1 hikaru octeon_eth_sysctl_cmd_pool_num = node->sysctl_num;
1772 1.1 hikaru
1773 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1774 1.12 msaitoh CTLFLAG_PERMANENT,
1775 1.12 msaitoh CTLTYPE_INT, "sg_pool",
1776 1.12 msaitoh SYSCTL_DESCR("sg pool available"),
1777 1.12 msaitoh octeon_eth_sysctl_pool, 0, NULL,
1778 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1779 1.12 msaitoh CTL_EOL)) != 0) {
1780 1.12 msaitoh goto err;
1781 1.1 hikaru }
1782 1.1 hikaru
1783 1.1 hikaru octeon_eth_sysctl_sg_pool_num = node->sysctl_num;
1784 1.1 hikaru
1785 1.1 hikaru if ((rc = sysctl_createv(clog, 0, NULL, &node,
1786 1.12 msaitoh CTLFLAG_PERMANENT | CTLFLAG_READONLY,
1787 1.12 msaitoh CTLTYPE_INT, "pktbuf",
1788 1.12 msaitoh SYSCTL_DESCR("input packet buffer size on POW"),
1789 1.12 msaitoh octeon_eth_sysctl_rd, 0,
1790 1.12 msaitoh &octeon_eth_param_pktbuf,
1791 1.12 msaitoh 0, CTL_HW, octeon_eth_sysctl_root_num, CTL_CREATE,
1792 1.12 msaitoh CTL_EOL)) != 0) {
1793 1.12 msaitoh goto err;
1794 1.1 hikaru }
1795 1.1 hikaru
1796 1.1 hikaru octeon_eth_sysctl_pktbuf_num = node->sysctl_num;
1797 1.1 hikaru
1798 1.1 hikaru return;
1799 1.1 hikaru
1800 1.1 hikaru err:
1801 1.1 hikaru aprint_error("%s: syctl_createv failed (rc = %d)\n", __func__, rc);
1802 1.1 hikaru }
1803 1.1 hikaru
1804 1.1 hikaru static int
1805 1.1 hikaru octeon_eth_sysctl_verify(SYSCTLFN_ARGS)
1806 1.1 hikaru {
1807 1.1 hikaru int error, v;
1808 1.1 hikaru struct sysctlnode node;
1809 1.1 hikaru struct octeon_eth_softc *sc;
1810 1.1 hikaru int i;
1811 1.1 hikaru int s;
1812 1.1 hikaru
1813 1.1 hikaru node = *rnode;
1814 1.1 hikaru v = *(int *)rnode->sysctl_data;
1815 1.1 hikaru node.sysctl_data = &v;
1816 1.1 hikaru error = sysctl_lookup(SYSCTLFN_CALL(&node));
1817 1.1 hikaru if (error || newp == NULL)
1818 1.1 hikaru return error;
1819 1.1 hikaru
1820 1.1 hikaru if (node.sysctl_num == octeon_eth_sysctl_pkocmdw0n2_num) {
1821 1.1 hikaru if (v < 0 || v > 1)
1822 1.1 hikaru return EINVAL;
1823 1.1 hikaru *(int *)rnode->sysctl_data = v;
1824 1.1 hikaru return 0;
1825 1.1 hikaru }
1826 1.1 hikaru
1827 1.1 hikaru if (node.sysctl_num == octeon_eth_sysctl_pipdynrs_num) {
1828 1.1 hikaru if (v < 0 || v > 1)
1829 1.1 hikaru return EINVAL;
1830 1.1 hikaru *(int *)rnode->sysctl_data = v;
1831 1.1 hikaru s = splnet();
1832 1.1 hikaru for (i = 0; i < 3/* XXX */; i++) {
1833 1.1 hikaru sc = octeon_eth_gsc[i]; /* XXX */
1834 1.12 msaitoh octeon_pip_prt_cfg_enable(sc->sc_pip,
1835 1.12 msaitoh PIP_PRT_CFGN_DYN_RS, v);
1836 1.1 hikaru }
1837 1.1 hikaru splx(s);
1838 1.1 hikaru return 0;
1839 1.1 hikaru }
1840 1.1 hikaru
1841 1.1 hikaru if (node.sysctl_num == octeon_eth_sysctl_redir_num) {
1842 1.1 hikaru if (v & ~((0x7 << (4 * 0)) | (0x7 << (4 * 1)) | (0x7 << (4 * 2))))
1843 1.1 hikaru return EINVAL;
1844 1.1 hikaru *(int *)rnode->sysctl_data = v;
1845 1.1 hikaru s = splnet();
1846 1.1 hikaru for (i = 0; i < 3/* XXX */; i++) {
1847 1.1 hikaru struct ifnet *ifp;
1848 1.1 hikaru
1849 1.1 hikaru sc = octeon_eth_gsc[i]; /* XXX */
1850 1.1 hikaru ifp = &sc->sc_ethercom.ec_if;
1851 1.1 hikaru
1852 1.12 msaitoh sc->sc_redir
1853 1.12 msaitoh = (octeon_eth_param_redir >> (4 * i)) & 0x7;
1854 1.1 hikaru if (sc->sc_redir == 0) {
1855 1.1 hikaru if (ISSET(ifp->if_flags, IFF_PROMISC)) {
1856 1.1 hikaru CLR(ifp->if_flags, IFF_PROMISC);
1857 1.1 hikaru octeon_eth_mii_statchg(ifp);
1858 1.1 hikaru /* octeon_gmx_set_filter(sc->sc_gmx_port); */
1859 1.1 hikaru }
1860 1.2 ozaki ifp->_if_input = ether_input;
1861 1.1 hikaru }
1862 1.1 hikaru else {
1863 1.1 hikaru if (!ISSET(ifp->if_flags, IFF_PROMISC)) {
1864 1.1 hikaru SET(ifp->if_flags, IFF_PROMISC);
1865 1.1 hikaru octeon_eth_mii_statchg(ifp);
1866 1.1 hikaru /* octeon_gmx_set_filter(sc->sc_gmx_port); */
1867 1.1 hikaru }
1868 1.2 ozaki ifp->_if_input = octeon_eth_recv_redir;
1869 1.1 hikaru }
1870 1.1 hikaru }
1871 1.1 hikaru splx(s);
1872 1.1 hikaru return 0;
1873 1.1 hikaru }
1874 1.1 hikaru
1875 1.1 hikaru return EINVAL;
1876 1.1 hikaru }
1877 1.1 hikaru
1878 1.1 hikaru static int
1879 1.1 hikaru octeon_eth_sysctl_pool(SYSCTLFN_ARGS)
1880 1.1 hikaru {
1881 1.1 hikaru int error, newval = 0;
1882 1.1 hikaru struct sysctlnode node;
1883 1.1 hikaru int s;
1884 1.1 hikaru
1885 1.1 hikaru node = *rnode;
1886 1.1 hikaru node.sysctl_data = &newval;
1887 1.1 hikaru s = splnet();
1888 1.1 hikaru if (node.sysctl_num == octeon_eth_sysctl_pkt_pool_num) {
1889 1.12 msaitoh error = octeon_fpa_available_fpa_pool(&newval,
1890 1.12 msaitoh OCTEON_POOL_NO_PKT);
1891 1.1 hikaru } else if (node.sysctl_num == octeon_eth_sysctl_wqe_pool_num) {
1892 1.12 msaitoh error = octeon_fpa_available_fpa_pool(&newval,
1893 1.12 msaitoh OCTEON_POOL_NO_WQE);
1894 1.1 hikaru } else if (node.sysctl_num == octeon_eth_sysctl_cmd_pool_num) {
1895 1.12 msaitoh error = octeon_fpa_available_fpa_pool(&newval,
1896 1.12 msaitoh OCTEON_POOL_NO_CMD);
1897 1.1 hikaru } else if (node.sysctl_num == octeon_eth_sysctl_sg_pool_num) {
1898 1.12 msaitoh error = octeon_fpa_available_fpa_pool(&newval,
1899 1.12 msaitoh OCTEON_POOL_NO_SG);
1900 1.1 hikaru } else {
1901 1.1 hikaru splx(s);
1902 1.1 hikaru return EINVAL;
1903 1.1 hikaru }
1904 1.1 hikaru splx(s);
1905 1.1 hikaru if (error)
1906 1.1 hikaru return error;
1907 1.1 hikaru error = sysctl_lookup(SYSCTLFN_CALL(&node));
1908 1.1 hikaru if (error || newp == NULL)
1909 1.1 hikaru return error;
1910 1.1 hikaru
1911 1.1 hikaru return 0;
1912 1.1 hikaru }
1913 1.1 hikaru
1914 1.1 hikaru static int
1915 1.1 hikaru octeon_eth_sysctl_rd(SYSCTLFN_ARGS)
1916 1.1 hikaru {
1917 1.1 hikaru int error, v;
1918 1.1 hikaru struct sysctlnode node;
1919 1.1 hikaru int s;
1920 1.1 hikaru
1921 1.1 hikaru node = *rnode;
1922 1.1 hikaru v = *(int *)rnode->sysctl_data;
1923 1.1 hikaru node.sysctl_data = &v;
1924 1.1 hikaru error = sysctl_lookup(SYSCTLFN_CALL(&node));
1925 1.1 hikaru if (error || newp != NULL)
1926 1.1 hikaru return error;
1927 1.1 hikaru
1928 1.1 hikaru if (node.sysctl_num == octeon_eth_sysctl_pktbuf_num) {
1929 1.1 hikaru uint64_t tmp;
1930 1.1 hikaru int n;
1931 1.1 hikaru
1932 1.1 hikaru s = splnet();
1933 1.1 hikaru tmp = octeon_fpa_query(0);
1934 1.1 hikaru n = (int)tmp;
1935 1.1 hikaru splx(s);
1936 1.1 hikaru *(int *)rnode->sysctl_data = n;
1937 1.1 hikaru octeon_eth_param_pktbuf = n;
1938 1.1 hikaru *(int *)oldp = n;
1939 1.1 hikaru return 0;
1940 1.1 hikaru }
1941 1.1 hikaru
1942 1.1 hikaru return EINVAL;
1943 1.1 hikaru }
1944