if_cnmac.c revision 1.26 1 1.26 simonb /* $NetBSD: if_cnmac.c,v 1.26 2021/05/27 03:23:29 simonb Exp $ */
2 1.24 simonb
3 1.24 simonb /*
4 1.24 simonb * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 1.24 simonb * All rights reserved.
6 1.24 simonb *
7 1.24 simonb * Redistribution and use in source and binary forms, with or without
8 1.24 simonb * modification, are permitted provided that the following conditions
9 1.24 simonb * are met:
10 1.24 simonb * 1. Redistributions of source code must retain the above copyright
11 1.24 simonb * notice, this list of conditions and the following disclaimer.
12 1.24 simonb * 2. Redistributions in binary form must reproduce the above copyright
13 1.24 simonb * notice, this list of conditions and the following disclaimer in the
14 1.24 simonb * documentation and/or other materials provided with the distribution.
15 1.24 simonb *
16 1.24 simonb * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.24 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.24 simonb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.24 simonb * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.24 simonb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.24 simonb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.24 simonb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.24 simonb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.24 simonb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.24 simonb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.24 simonb * SUCH DAMAGE.
27 1.24 simonb */
28 1.1 hikaru
29 1.1 hikaru #include <sys/cdefs.h>
30 1.26 simonb __KERNEL_RCSID(0, "$NetBSD: if_cnmac.c,v 1.26 2021/05/27 03:23:29 simonb Exp $");
31 1.1 hikaru
32 1.1 hikaru /*
33 1.15 gutterid * If no free send buffer is available, free all the sent buffers and bail out.
34 1.1 hikaru */
35 1.19 simonb #define CNMAC_SEND_QUEUE_CHECK
36 1.1 hikaru
37 1.1 hikaru /* XXX XXX XXX XXX XXX XXX */
38 1.1 hikaru
39 1.1 hikaru #include <sys/param.h>
40 1.1 hikaru #include <sys/systm.h>
41 1.1 hikaru #include <sys/pool.h>
42 1.1 hikaru #include <sys/mbuf.h>
43 1.1 hikaru #include <sys/malloc.h>
44 1.1 hikaru #include <sys/kernel.h>
45 1.1 hikaru #include <sys/socket.h>
46 1.1 hikaru #include <sys/ioctl.h>
47 1.1 hikaru #include <sys/errno.h>
48 1.1 hikaru #include <sys/device.h>
49 1.1 hikaru #include <sys/queue.h>
50 1.1 hikaru #include <sys/conf.h>
51 1.1 hikaru #include <sys/sysctl.h>
52 1.1 hikaru #include <sys/syslog.h>
53 1.1 hikaru
54 1.1 hikaru #include <net/if.h>
55 1.1 hikaru #include <net/if_media.h>
56 1.1 hikaru #include <net/if_ether.h>
57 1.1 hikaru #include <net/route.h>
58 1.1 hikaru #include <net/bpf.h>
59 1.1 hikaru
60 1.1 hikaru #include <netinet/in.h>
61 1.1 hikaru #include <netinet/in_systm.h>
62 1.1 hikaru #include <netinet/in_var.h>
63 1.1 hikaru #include <netinet/ip.h>
64 1.1 hikaru
65 1.1 hikaru #include <sys/bus.h>
66 1.1 hikaru #include <machine/intr.h>
67 1.1 hikaru #include <machine/endian.h>
68 1.1 hikaru #include <machine/locore.h>
69 1.1 hikaru
70 1.1 hikaru #include <dev/mii/mii.h>
71 1.1 hikaru #include <dev/mii/miivar.h>
72 1.1 hikaru
73 1.1 hikaru #include <mips/cpuregs.h>
74 1.1 hikaru
75 1.22 simonb #include <mips/cavium/octeonreg.h>
76 1.24 simonb #include <mips/cavium/octeonvar.h>
77 1.22 simonb #include <mips/cavium/include/iobusvar.h>
78 1.22 simonb
79 1.1 hikaru #include <mips/cavium/dev/octeon_ciureg.h>
80 1.24 simonb #include <mips/cavium/dev/octeon_faureg.h>
81 1.24 simonb #include <mips/cavium/dev/octeon_fpareg.h>
82 1.1 hikaru #include <mips/cavium/dev/octeon_gmxreg.h>
83 1.1 hikaru #include <mips/cavium/dev/octeon_pipreg.h>
84 1.1 hikaru #include <mips/cavium/dev/octeon_powreg.h>
85 1.24 simonb #include <mips/cavium/dev/octeon_fauvar.h>
86 1.1 hikaru #include <mips/cavium/dev/octeon_fpavar.h>
87 1.1 hikaru #include <mips/cavium/dev/octeon_gmxvar.h>
88 1.1 hikaru #include <mips/cavium/dev/octeon_ipdvar.h>
89 1.1 hikaru #include <mips/cavium/dev/octeon_pipvar.h>
90 1.1 hikaru #include <mips/cavium/dev/octeon_pkovar.h>
91 1.24 simonb #include <mips/cavium/dev/octeon_powvar.h>
92 1.1 hikaru #include <mips/cavium/dev/octeon_smivar.h>
93 1.24 simonb
94 1.1 hikaru #include <mips/cavium/dev/if_cnmacvar.h>
95 1.1 hikaru
96 1.1 hikaru /*
97 1.1 hikaru * Set the PKO to think command buffers are an odd length. This makes it so we
98 1.1 hikaru * never have to divide a comamnd across two buffers.
99 1.1 hikaru */
100 1.1 hikaru #define OCTEON_POOL_NWORDS_CMD \
101 1.1 hikaru (((uint32_t)OCTEON_POOL_SIZE_CMD / sizeof(uint64_t)) - 1)
102 1.1 hikaru #define FPA_COMMAND_BUFFER_POOL_NWORDS OCTEON_POOL_NWORDS_CMD /* XXX */
103 1.1 hikaru
104 1.19 simonb static void cnmac_buf_init(struct cnmac_softc *);
105 1.1 hikaru
106 1.19 simonb static int cnmac_match(device_t, struct cfdata *, void *);
107 1.19 simonb static void cnmac_attach(device_t, device_t, void *);
108 1.19 simonb static void cnmac_pip_init(struct cnmac_softc *);
109 1.19 simonb static void cnmac_ipd_init(struct cnmac_softc *);
110 1.19 simonb static void cnmac_pko_init(struct cnmac_softc *);
111 1.19 simonb
112 1.19 simonb static void cnmac_board_mac_addr(uint8_t *, size_t, struct cnmac_softc *);
113 1.19 simonb
114 1.19 simonb static int cnmac_mii_readreg(device_t, int, int, uint16_t *);
115 1.19 simonb static int cnmac_mii_writereg(device_t, int, int, uint16_t);
116 1.19 simonb static void cnmac_mii_statchg(struct ifnet *);
117 1.19 simonb
118 1.19 simonb static int cnmac_mediainit(struct cnmac_softc *);
119 1.19 simonb static void cnmac_mediastatus(struct ifnet *, struct ifmediareq *);
120 1.19 simonb
121 1.19 simonb static inline void cnmac_send_queue_flush_prefetch(struct cnmac_softc *);
122 1.19 simonb static inline void cnmac_send_queue_flush_fetch(struct cnmac_softc *);
123 1.19 simonb static inline void cnmac_send_queue_flush(struct cnmac_softc *);
124 1.19 simonb static inline void cnmac_send_queue_flush_sync(struct cnmac_softc *);
125 1.26 simonb static void cnmac_send_queue_check_and_flush(struct cnmac_softc *);
126 1.19 simonb static inline int cnmac_send_queue_is_full(struct cnmac_softc *);
127 1.19 simonb static inline void cnmac_send_queue_add(struct cnmac_softc *, struct mbuf *,
128 1.19 simonb uint64_t *);
129 1.19 simonb static inline void cnmac_send_queue_del(struct cnmac_softc *, struct mbuf **,
130 1.19 simonb uint64_t **);
131 1.24 simonb static inline int cnmac_buf_free_work(struct cnmac_softc *, uint64_t *);
132 1.24 simonb static inline void cnmac_buf_ext_free(struct mbuf *, void *, size_t, void *);
133 1.1 hikaru
134 1.19 simonb static int cnmac_ioctl(struct ifnet *, u_long, void *);
135 1.19 simonb static void cnmac_watchdog(struct ifnet *);
136 1.19 simonb static int cnmac_init(struct ifnet *);
137 1.19 simonb static void cnmac_stop(struct ifnet *, int);
138 1.19 simonb static void cnmac_start(struct ifnet *);
139 1.19 simonb
140 1.19 simonb static inline int cnmac_send_cmd(struct cnmac_softc *, uint64_t, uint64_t,
141 1.19 simonb int *);
142 1.19 simonb static inline uint64_t cnmac_send_makecmd_w1(int, paddr_t);
143 1.24 simonb static inline uint64_t cnmac_send_makecmd_w0(uint64_t, uint64_t, size_t, int,
144 1.24 simonb int);
145 1.19 simonb static inline int cnmac_send_makecmd_gbuf(struct cnmac_softc *, struct mbuf *,
146 1.19 simonb uint64_t *, int *);
147 1.19 simonb static inline int cnmac_send_makecmd(struct cnmac_softc *, struct mbuf *,
148 1.19 simonb uint64_t *, uint64_t *, uint64_t *);
149 1.19 simonb static inline int cnmac_send_buf(struct cnmac_softc *, struct mbuf *,
150 1.19 simonb uint64_t *, int *);
151 1.19 simonb static inline int cnmac_send(struct cnmac_softc *, struct mbuf *, int *);
152 1.19 simonb
153 1.19 simonb static int cnmac_reset(struct cnmac_softc *);
154 1.19 simonb static int cnmac_configure(struct cnmac_softc *);
155 1.19 simonb static int cnmac_configure_common(struct cnmac_softc *);
156 1.19 simonb
157 1.19 simonb static void cnmac_tick_free(void *);
158 1.19 simonb static void cnmac_tick_misc(void *);
159 1.19 simonb
160 1.19 simonb static inline int cnmac_recv_mbuf(struct cnmac_softc *, uint64_t *,
161 1.19 simonb struct mbuf **);
162 1.19 simonb static inline int cnmac_recv_check(struct cnmac_softc *, uint64_t);
163 1.19 simonb static inline int cnmac_recv(struct cnmac_softc *, uint64_t *);
164 1.24 simonb static int cnmac_intr(void *);
165 1.1 hikaru
166 1.24 simonb /* device parameters */
167 1.19 simonb int cnmac_param_pko_cmd_w0_n2 = 1;
168 1.1 hikaru
169 1.19 simonb CFATTACH_DECL_NEW(cnmac, sizeof(struct cnmac_softc),
170 1.19 simonb cnmac_match, cnmac_attach, NULL, NULL);
171 1.1 hikaru
172 1.1 hikaru /* ---- buffer management */
173 1.1 hikaru
174 1.19 simonb static const struct cnmac_pool_param {
175 1.1 hikaru int poolno;
176 1.1 hikaru size_t size;
177 1.1 hikaru size_t nelems;
178 1.19 simonb } cnmac_pool_params[] = {
179 1.1 hikaru #define _ENTRY(x) { OCTEON_POOL_NO_##x, OCTEON_POOL_SIZE_##x, OCTEON_POOL_NELEMS_##x }
180 1.1 hikaru _ENTRY(PKT),
181 1.1 hikaru _ENTRY(WQE),
182 1.1 hikaru _ENTRY(CMD),
183 1.1 hikaru _ENTRY(SG)
184 1.1 hikaru #undef _ENTRY
185 1.1 hikaru };
186 1.24 simonb struct octfpa_buf *cnmac_pools[FPA_NPOOLS];
187 1.19 simonb #define cnmac_fb_pkt cnmac_pools[OCTEON_POOL_NO_PKT]
188 1.19 simonb #define cnmac_fb_wqe cnmac_pools[OCTEON_POOL_NO_WQE]
189 1.19 simonb #define cnmac_fb_cmd cnmac_pools[OCTEON_POOL_NO_CMD]
190 1.19 simonb #define cnmac_fb_sg cnmac_pools[OCTEON_POOL_NO_SG]
191 1.1 hikaru
192 1.24 simonb static int cnmac_npowgroups = 0;
193 1.24 simonb
194 1.1 hikaru static void
195 1.19 simonb cnmac_buf_init(struct cnmac_softc *sc)
196 1.1 hikaru {
197 1.1 hikaru static int once;
198 1.1 hikaru int i;
199 1.19 simonb const struct cnmac_pool_param *pp;
200 1.19 simonb struct octfpa_buf *fb;
201 1.1 hikaru
202 1.1 hikaru if (once == 1)
203 1.1 hikaru return;
204 1.1 hikaru once = 1;
205 1.1 hikaru
206 1.19 simonb for (i = 0; i < (int)__arraycount(cnmac_pool_params); i++) {
207 1.19 simonb pp = &cnmac_pool_params[i];
208 1.19 simonb octfpa_buf_init(pp->poolno, pp->size, pp->nelems, &fb);
209 1.19 simonb cnmac_pools[i] = fb;
210 1.1 hikaru }
211 1.1 hikaru }
212 1.1 hikaru
213 1.1 hikaru /* ---- autoconf */
214 1.1 hikaru
215 1.1 hikaru static int
216 1.19 simonb cnmac_match(device_t parent, struct cfdata *match, void *aux)
217 1.1 hikaru {
218 1.19 simonb struct octgmx_attach_args *ga = aux;
219 1.1 hikaru
220 1.1 hikaru if (strcmp(match->cf_name, ga->ga_name) != 0) {
221 1.1 hikaru return 0;
222 1.1 hikaru }
223 1.1 hikaru return 1;
224 1.1 hikaru }
225 1.1 hikaru
226 1.1 hikaru static void
227 1.19 simonb cnmac_attach(device_t parent, device_t self, void *aux)
228 1.1 hikaru {
229 1.19 simonb struct cnmac_softc *sc = device_private(self);
230 1.19 simonb struct octgmx_attach_args *ga = aux;
231 1.1 hikaru struct ifnet *ifp = &sc->sc_ethercom.ec_if;
232 1.18 mrg prop_dictionary_t dict;
233 1.18 mrg prop_object_t clk;
234 1.1 hikaru uint8_t enaddr[ETHER_ADDR_LEN];
235 1.1 hikaru
236 1.24 simonb if (cnmac_npowgroups >= OCTEON_POW_GROUP_MAX) {
237 1.24 simonb printf(": out of POW groups\n");
238 1.24 simonb }
239 1.24 simonb
240 1.1 hikaru sc->sc_dev = self;
241 1.1 hikaru sc->sc_regt = ga->ga_regt;
242 1.1 hikaru sc->sc_port = ga->ga_portno;
243 1.1 hikaru sc->sc_port_type = ga->ga_port_type;
244 1.1 hikaru sc->sc_gmx = ga->ga_gmx;
245 1.1 hikaru sc->sc_gmx_port = ga->ga_gmx_port;
246 1.24 simonb sc->sc_smi = ga->ga_smi;
247 1.24 simonb sc->sc_powgroup = cnmac_npowgroups++;
248 1.1 hikaru
249 1.20 simonb if (sc->sc_port >= CVMSEG_LM_ETHER_COUNT) {
250 1.20 simonb /*
251 1.20 simonb * If we got here, increase CVMSEG_LM_ETHER_COUNT
252 1.20 simonb * in octeonvar.h .
253 1.20 simonb */
254 1.20 simonb printf("%s: ERROR out of CVMSEG LM buffers\n",
255 1.20 simonb device_xname(self));
256 1.20 simonb return;
257 1.20 simonb }
258 1.20 simonb
259 1.1 hikaru sc->sc_init_flag = 0;
260 1.1 hikaru /*
261 1.1 hikaru * XXXUEBAYASI
262 1.1 hikaru * Setting PIP_IP_OFFSET[OFFSET] to 8 causes panic ... why???
263 1.1 hikaru */
264 1.1 hikaru sc->sc_ip_offset = 0/* XXX */;
265 1.1 hikaru
266 1.1 hikaru if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) <= MIPS_CN30XX) {
267 1.19 simonb SET(sc->sc_quirks, CNMAC_QUIRKS_NO_PRE_ALIGN);
268 1.19 simonb SET(sc->sc_quirks, CNMAC_QUIRKS_NO_RX_INBND);
269 1.1 hikaru }
270 1.1 hikaru
271 1.19 simonb cnmac_board_mac_addr(enaddr, sizeof(enaddr), sc);
272 1.24 simonb printf("%s: Ethernet address %s\n", device_xname(self),
273 1.1 hikaru ether_sprintf(enaddr));
274 1.1 hikaru
275 1.1 hikaru SIMPLEQ_INIT(&sc->sc_sendq);
276 1.1 hikaru sc->sc_soft_req_thresh = 15/* XXX */;
277 1.1 hikaru sc->sc_ext_callback_cnt = 0;
278 1.1 hikaru
279 1.19 simonb octgmx_stats_init(sc->sc_gmx_port);
280 1.1 hikaru
281 1.1 hikaru callout_init(&sc->sc_tick_misc_ch, 0);
282 1.25 simonb callout_setfunc(&sc->sc_tick_misc_ch, cnmac_tick_misc, sc);
283 1.25 simonb
284 1.1 hikaru callout_init(&sc->sc_tick_free_ch, 0);
285 1.25 simonb callout_setfunc(&sc->sc_tick_free_ch, cnmac_tick_free, sc);
286 1.1 hikaru
287 1.24 simonb const int dv_unit = device_unit(self);
288 1.19 simonb octfau_op_init(&sc->sc_fau_done,
289 1.24 simonb OCTEON_CVMSEG_ETHER_OFFSET(dv_unit, csm_ether_fau_done),
290 1.24 simonb OCT_FAU_REG_ADDR_END - (8 * (dv_unit + 1))/* XXX */);
291 1.19 simonb octfau_op_set_8(&sc->sc_fau_done, 0);
292 1.1 hikaru
293 1.19 simonb cnmac_pip_init(sc);
294 1.19 simonb cnmac_ipd_init(sc);
295 1.19 simonb cnmac_pko_init(sc);
296 1.24 simonb
297 1.24 simonb cnmac_configure_common(sc);
298 1.1 hikaru
299 1.1 hikaru sc->sc_gmx_port->sc_ipd = sc->sc_ipd;
300 1.1 hikaru sc->sc_gmx_port->sc_port_mii = &sc->sc_mii;
301 1.1 hikaru sc->sc_gmx_port->sc_port_ec = &sc->sc_ethercom;
302 1.1 hikaru /* XXX */
303 1.1 hikaru sc->sc_gmx_port->sc_quirks = sc->sc_quirks;
304 1.1 hikaru
305 1.1 hikaru /* XXX */
306 1.19 simonb sc->sc_pow = &octpow_softc;
307 1.1 hikaru
308 1.19 simonb cnmac_mediainit(sc);
309 1.1 hikaru
310 1.24 simonb strncpy(ifp->if_xname, device_xname(self), sizeof(ifp->if_xname));
311 1.1 hikaru ifp->if_softc = sc;
312 1.1 hikaru ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
313 1.19 simonb ifp->if_ioctl = cnmac_ioctl;
314 1.19 simonb ifp->if_start = cnmac_start;
315 1.19 simonb ifp->if_watchdog = cnmac_watchdog;
316 1.19 simonb ifp->if_init = cnmac_init;
317 1.19 simonb ifp->if_stop = cnmac_stop;
318 1.10 riastrad IFQ_SET_MAXLEN(&ifp->if_snd, uimax(GATHER_QUEUE_SIZE, IFQ_MAXLEN));
319 1.1 hikaru IFQ_SET_READY(&ifp->if_snd);
320 1.1 hikaru
321 1.24 simonb
322 1.1 hikaru ifp->if_capabilities =
323 1.24 simonb #if 0 /* XXX: no tx checksum yet */
324 1.24 simonb IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
325 1.24 simonb IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
326 1.24 simonb IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
327 1.24 simonb IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx |
328 1.24 simonb IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx;
329 1.24 simonb #else
330 1.12 msaitoh IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
331 1.12 msaitoh IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
332 1.24 simonb #endif
333 1.1 hikaru
334 1.7 jmcneill /* 802.1Q VLAN-sized frames are supported */
335 1.7 jmcneill sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
336 1.7 jmcneill
337 1.19 simonb octgmx_set_mac_addr(sc->sc_gmx_port, enaddr);
338 1.1 hikaru
339 1.1 hikaru if_attach(ifp);
340 1.1 hikaru ether_ifattach(ifp, enaddr);
341 1.19 simonb octgmx_set_filter(sc->sc_gmx_port);
342 1.1 hikaru
343 1.1 hikaru #if 1
344 1.19 simonb cnmac_buf_init(sc);
345 1.1 hikaru #endif
346 1.1 hikaru
347 1.24 simonb sc->sc_ih = octeon_intr_establish(POW_WORKQ_IRQ(sc->sc_powgroup),
348 1.24 simonb IPL_NET, cnmac_intr, sc);
349 1.24 simonb if (sc->sc_ih == NULL)
350 1.24 simonb panic("%s: could not set up interrupt", device_xname(self));
351 1.1 hikaru
352 1.18 mrg dict = device_properties(sc->sc_gmx->sc_dev);
353 1.18 mrg
354 1.18 mrg clk = prop_dictionary_get(dict, "rgmii-tx");
355 1.24 simonb if (clk)
356 1.24 simonb sc->sc_gmx_port->sc_clk_tx_setting =
357 1.24 simonb prop_number_signed_value(clk);
358 1.18 mrg clk = prop_dictionary_get(dict, "rgmii-rx");
359 1.24 simonb if (clk)
360 1.24 simonb sc->sc_gmx_port->sc_clk_rx_setting =
361 1.24 simonb prop_number_signed_value(clk);
362 1.1 hikaru }
363 1.1 hikaru
364 1.1 hikaru /* ---- submodules */
365 1.1 hikaru
366 1.1 hikaru /* XXX */
367 1.1 hikaru static void
368 1.19 simonb cnmac_pip_init(struct cnmac_softc *sc)
369 1.1 hikaru {
370 1.19 simonb struct octpip_attach_args pip_aa;
371 1.1 hikaru
372 1.1 hikaru pip_aa.aa_port = sc->sc_port;
373 1.1 hikaru pip_aa.aa_regt = sc->sc_regt;
374 1.1 hikaru pip_aa.aa_tag_type = POW_TAG_TYPE_ORDERED/* XXX */;
375 1.24 simonb pip_aa.aa_receive_group = sc->sc_powgroup;
376 1.1 hikaru pip_aa.aa_ip_offset = sc->sc_ip_offset;
377 1.19 simonb octpip_init(&pip_aa, &sc->sc_pip);
378 1.24 simonb octpip_port_config(sc->sc_pip);
379 1.1 hikaru }
380 1.1 hikaru
381 1.1 hikaru /* XXX */
382 1.1 hikaru static void
383 1.19 simonb cnmac_ipd_init(struct cnmac_softc *sc)
384 1.1 hikaru {
385 1.19 simonb struct octipd_attach_args ipd_aa;
386 1.1 hikaru
387 1.1 hikaru ipd_aa.aa_port = sc->sc_port;
388 1.1 hikaru ipd_aa.aa_regt = sc->sc_regt;
389 1.1 hikaru ipd_aa.aa_first_mbuff_skip = 184/* XXX */;
390 1.1 hikaru ipd_aa.aa_not_first_mbuff_skip = 0/* XXX */;
391 1.19 simonb octipd_init(&ipd_aa, &sc->sc_ipd);
392 1.1 hikaru }
393 1.1 hikaru
394 1.1 hikaru /* XXX */
395 1.1 hikaru static void
396 1.19 simonb cnmac_pko_init(struct cnmac_softc *sc)
397 1.1 hikaru {
398 1.19 simonb struct octpko_attach_args pko_aa;
399 1.1 hikaru
400 1.1 hikaru pko_aa.aa_port = sc->sc_port;
401 1.1 hikaru pko_aa.aa_regt = sc->sc_regt;
402 1.1 hikaru pko_aa.aa_cmdptr = &sc->sc_cmdptr;
403 1.1 hikaru pko_aa.aa_cmd_buf_pool = OCTEON_POOL_NO_CMD;
404 1.1 hikaru pko_aa.aa_cmd_buf_size = OCTEON_POOL_NWORDS_CMD;
405 1.19 simonb octpko_init(&pko_aa, &sc->sc_pko);
406 1.1 hikaru }
407 1.1 hikaru
408 1.1 hikaru /* ---- XXX */
409 1.1 hikaru
410 1.1 hikaru #define ADDR2UINT64(u, a) \
411 1.1 hikaru do { \
412 1.1 hikaru u = \
413 1.1 hikaru (((uint64_t)a[0] << 40) | ((uint64_t)a[1] << 32) | \
414 1.1 hikaru ((uint64_t)a[2] << 24) | ((uint64_t)a[3] << 16) | \
415 1.12 msaitoh ((uint64_t)a[4] << 8) | ((uint64_t)a[5] << 0)); \
416 1.1 hikaru } while (0)
417 1.1 hikaru #define UINT642ADDR(a, u) \
418 1.1 hikaru do { \
419 1.1 hikaru a[0] = (uint8_t)((u) >> 40); a[1] = (uint8_t)((u) >> 32); \
420 1.1 hikaru a[2] = (uint8_t)((u) >> 24); a[3] = (uint8_t)((u) >> 16); \
421 1.12 msaitoh a[4] = (uint8_t)((u) >> 8); a[5] = (uint8_t)((u) >> 0); \
422 1.1 hikaru } while (0)
423 1.1 hikaru
424 1.1 hikaru static void
425 1.19 simonb cnmac_board_mac_addr(uint8_t *enaddr, size_t size, struct cnmac_softc *sc)
426 1.1 hikaru {
427 1.1 hikaru prop_dictionary_t dict;
428 1.1 hikaru prop_data_t ea;
429 1.1 hikaru
430 1.1 hikaru dict = device_properties(sc->sc_dev);
431 1.1 hikaru KASSERT(dict != NULL);
432 1.1 hikaru ea = prop_dictionary_get(dict, "mac-address");
433 1.1 hikaru KASSERT(ea != NULL);
434 1.21 simonb memcpy(enaddr, prop_data_value(ea), size);
435 1.1 hikaru }
436 1.1 hikaru
437 1.1 hikaru /* ---- media */
438 1.1 hikaru
439 1.1 hikaru static int
440 1.19 simonb cnmac_mii_readreg(device_t self, int phy_addr, int reg, uint16_t *val)
441 1.1 hikaru {
442 1.19 simonb struct cnmac_softc *sc = device_private(self);
443 1.1 hikaru
444 1.19 simonb return octsmi_read(sc->sc_smi, phy_addr, reg, val);
445 1.1 hikaru }
446 1.1 hikaru
447 1.11 msaitoh static int
448 1.19 simonb cnmac_mii_writereg(device_t self, int phy_addr, int reg, uint16_t val)
449 1.1 hikaru {
450 1.19 simonb struct cnmac_softc *sc = device_private(self);
451 1.1 hikaru
452 1.19 simonb return octsmi_write(sc->sc_smi, phy_addr, reg, val);
453 1.1 hikaru }
454 1.1 hikaru
455 1.1 hikaru static void
456 1.19 simonb cnmac_mii_statchg(struct ifnet *ifp)
457 1.1 hikaru {
458 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
459 1.1 hikaru
460 1.19 simonb octpko_port_enable(sc->sc_pko, 0);
461 1.19 simonb octgmx_port_enable(sc->sc_gmx_port, 0);
462 1.1 hikaru
463 1.19 simonb cnmac_reset(sc);
464 1.1 hikaru
465 1.1 hikaru if (ISSET(ifp->if_flags, IFF_RUNNING))
466 1.19 simonb octgmx_set_filter(sc->sc_gmx_port);
467 1.1 hikaru
468 1.19 simonb octpko_port_enable(sc->sc_pko, 1);
469 1.19 simonb octgmx_port_enable(sc->sc_gmx_port, 1);
470 1.1 hikaru }
471 1.1 hikaru
472 1.1 hikaru static int
473 1.19 simonb cnmac_mediainit(struct cnmac_softc *sc)
474 1.1 hikaru {
475 1.1 hikaru struct ifnet *ifp = &sc->sc_ethercom.ec_if;
476 1.13 msaitoh struct mii_data *mii = &sc->sc_mii;
477 1.1 hikaru prop_object_t phy;
478 1.1 hikaru
479 1.13 msaitoh mii->mii_ifp = ifp;
480 1.19 simonb mii->mii_readreg = cnmac_mii_readreg;
481 1.19 simonb mii->mii_writereg = cnmac_mii_writereg;
482 1.19 simonb mii->mii_statchg = cnmac_mii_statchg;
483 1.13 msaitoh sc->sc_ethercom.ec_mii = mii;
484 1.13 msaitoh
485 1.13 msaitoh /* Initialize ifmedia structures. */
486 1.19 simonb ifmedia_init(&mii->mii_media, 0, ether_mediachange, cnmac_mediastatus);
487 1.1 hikaru
488 1.1 hikaru phy = prop_dictionary_get(device_properties(sc->sc_dev), "phy-addr");
489 1.1 hikaru KASSERT(phy != NULL);
490 1.1 hikaru
491 1.21 simonb mii_attach(sc->sc_dev, mii, 0xffffffff, prop_number_signed_value(phy),
492 1.1 hikaru MII_OFFSET_ANY, MIIF_DOPAUSE);
493 1.1 hikaru
494 1.1 hikaru /* XXX XXX XXX */
495 1.13 msaitoh if (LIST_FIRST(&mii->mii_phys) != NULL) {
496 1.1 hikaru /* XXX XXX XXX */
497 1.13 msaitoh ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
498 1.1 hikaru /* XXX XXX XXX */
499 1.1 hikaru } else {
500 1.1 hikaru /* XXX XXX XXX */
501 1.13 msaitoh ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE,
502 1.1 hikaru MII_MEDIA_NONE, NULL);
503 1.1 hikaru /* XXX XXX XXX */
504 1.13 msaitoh ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
505 1.1 hikaru /* XXX XXX XXX */
506 1.1 hikaru }
507 1.1 hikaru /* XXX XXX XXX */
508 1.1 hikaru
509 1.1 hikaru return 0;
510 1.1 hikaru }
511 1.1 hikaru
512 1.1 hikaru static void
513 1.19 simonb cnmac_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
514 1.1 hikaru {
515 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
516 1.1 hikaru
517 1.1 hikaru mii_pollstat(&sc->sc_mii);
518 1.1 hikaru
519 1.1 hikaru ifmr->ifm_status = sc->sc_mii.mii_media_status;
520 1.1 hikaru ifmr->ifm_active = sc->sc_mii.mii_media_active;
521 1.1 hikaru ifmr->ifm_active = (sc->sc_mii.mii_media_active & ~IFM_ETH_FMASK) |
522 1.1 hikaru sc->sc_gmx_port->sc_port_flowflags;
523 1.1 hikaru }
524 1.1 hikaru
525 1.1 hikaru /* ---- send buffer garbage collection */
526 1.1 hikaru
527 1.1 hikaru static inline void
528 1.19 simonb cnmac_send_queue_flush_prefetch(struct cnmac_softc *sc)
529 1.1 hikaru {
530 1.23 simonb
531 1.23 simonb KASSERT(sc->sc_prefetch == 0);
532 1.19 simonb octfau_op_inc_fetch_8(&sc->sc_fau_done, 0);
533 1.1 hikaru sc->sc_prefetch = 1;
534 1.1 hikaru }
535 1.1 hikaru
536 1.1 hikaru static inline void
537 1.19 simonb cnmac_send_queue_flush_fetch(struct cnmac_softc *sc)
538 1.1 hikaru {
539 1.23 simonb
540 1.23 simonb KASSERT(sc->sc_prefetch == 1);
541 1.19 simonb sc->sc_hard_done_cnt = octfau_op_inc_read_8(&sc->sc_fau_done);
542 1.23 simonb KASSERT(sc->sc_hard_done_cnt <= 0);
543 1.1 hikaru sc->sc_prefetch = 0;
544 1.1 hikaru }
545 1.1 hikaru
546 1.1 hikaru static inline void
547 1.19 simonb cnmac_send_queue_flush(struct cnmac_softc *sc)
548 1.1 hikaru {
549 1.8 jmcneill struct ifnet *ifp = &sc->sc_ethercom.ec_if;
550 1.1 hikaru const int64_t sent_count = sc->sc_hard_done_cnt;
551 1.1 hikaru int i;
552 1.1 hikaru
553 1.23 simonb KASSERT(sc->sc_flush == 0);
554 1.23 simonb KASSERT(sent_count <= 0);
555 1.1 hikaru
556 1.1 hikaru for (i = 0; i < 0 - sent_count; i++) {
557 1.1 hikaru struct mbuf *m;
558 1.1 hikaru uint64_t *gbuf;
559 1.1 hikaru
560 1.19 simonb cnmac_send_queue_del(sc, &m, &gbuf);
561 1.1 hikaru
562 1.19 simonb octfpa_buf_put(cnmac_fb_sg, gbuf);
563 1.1 hikaru
564 1.1 hikaru m_freem(m);
565 1.8 jmcneill
566 1.8 jmcneill CLR(ifp->if_flags, IFF_OACTIVE);
567 1.1 hikaru }
568 1.1 hikaru
569 1.19 simonb octfau_op_inc_fetch_8(&sc->sc_fau_done, i);
570 1.1 hikaru sc->sc_flush = i;
571 1.1 hikaru }
572 1.1 hikaru
573 1.1 hikaru static inline void
574 1.19 simonb cnmac_send_queue_flush_sync(struct cnmac_softc *sc)
575 1.1 hikaru {
576 1.1 hikaru if (sc->sc_flush == 0)
577 1.1 hikaru return;
578 1.1 hikaru
579 1.23 simonb KASSERT(sc->sc_flush > 0);
580 1.1 hikaru
581 1.1 hikaru /* XXX XXX XXX */
582 1.19 simonb octfau_op_inc_read_8(&sc->sc_fau_done);
583 1.1 hikaru sc->sc_soft_req_cnt -= sc->sc_flush;
584 1.23 simonb KASSERT(sc->sc_soft_req_cnt >= 0);
585 1.1 hikaru /* XXX XXX XXX */
586 1.1 hikaru
587 1.1 hikaru sc->sc_flush = 0;
588 1.1 hikaru }
589 1.1 hikaru
590 1.1 hikaru static inline int
591 1.19 simonb cnmac_send_queue_is_full(struct cnmac_softc *sc)
592 1.1 hikaru {
593 1.19 simonb #ifdef CNMAC_SEND_QUEUE_CHECK
594 1.1 hikaru int64_t nofree_cnt;
595 1.1 hikaru
596 1.12 msaitoh nofree_cnt = sc->sc_soft_req_cnt + sc->sc_hard_done_cnt;
597 1.1 hikaru
598 1.1 hikaru if (__predict_false(nofree_cnt == GATHER_QUEUE_SIZE - 1)) {
599 1.19 simonb cnmac_send_queue_flush(sc);
600 1.19 simonb cnmac_send_queue_flush_sync(sc);
601 1.1 hikaru return 1;
602 1.1 hikaru }
603 1.1 hikaru
604 1.1 hikaru #endif
605 1.1 hikaru return 0;
606 1.1 hikaru }
607 1.1 hikaru
608 1.26 simonb static void
609 1.26 simonb cnmac_send_queue_check_and_flush(struct cnmac_softc *sc)
610 1.26 simonb {
611 1.26 simonb int s;
612 1.26 simonb
613 1.26 simonb /* XXX XXX XXX */
614 1.26 simonb s = splnet();
615 1.26 simonb if (sc->sc_soft_req_cnt > 0) {
616 1.26 simonb cnmac_send_queue_flush_prefetch(sc);
617 1.26 simonb cnmac_send_queue_flush_fetch(sc);
618 1.26 simonb cnmac_send_queue_flush(sc);
619 1.26 simonb cnmac_send_queue_flush_sync(sc);
620 1.26 simonb }
621 1.26 simonb splx(s);
622 1.26 simonb /* XXX XXX XXX */
623 1.26 simonb }
624 1.26 simonb
625 1.1 hikaru /*
626 1.1 hikaru * (Ab)use m_nextpkt and m_paddr to maintain mbuf chain and pointer to gather
627 1.1 hikaru * buffer. Other mbuf members may be used by m_freem(), so don't touch them!
628 1.1 hikaru */
629 1.1 hikaru
630 1.1 hikaru struct _send_queue_entry {
631 1.1 hikaru union {
632 1.1 hikaru struct mbuf _sqe_s_mbuf;
633 1.1 hikaru struct {
634 1.1 hikaru char _sqe_s_entry_pad[offsetof(struct mbuf, m_nextpkt)];
635 1.1 hikaru SIMPLEQ_ENTRY(_send_queue_entry) _sqe_s_entry_entry;
636 1.1 hikaru } _sqe_s_entry;
637 1.1 hikaru struct {
638 1.1 hikaru char _sqe_s_gbuf_pad[offsetof(struct mbuf, m_paddr)];
639 1.1 hikaru uint64_t *_sqe_s_gbuf_gbuf;
640 1.1 hikaru } _sqe_s_gbuf;
641 1.1 hikaru } _sqe_u;
642 1.1 hikaru #define _sqe_entry _sqe_u._sqe_s_entry._sqe_s_entry_entry
643 1.1 hikaru #define _sqe_gbuf _sqe_u._sqe_s_gbuf._sqe_s_gbuf_gbuf
644 1.1 hikaru };
645 1.1 hikaru
646 1.1 hikaru static inline void
647 1.19 simonb cnmac_send_queue_add(struct cnmac_softc *sc, struct mbuf *m,
648 1.1 hikaru uint64_t *gbuf)
649 1.1 hikaru {
650 1.1 hikaru struct _send_queue_entry *sqe = (struct _send_queue_entry *)m;
651 1.1 hikaru
652 1.1 hikaru sqe->_sqe_gbuf = gbuf;
653 1.1 hikaru SIMPLEQ_INSERT_TAIL(&sc->sc_sendq, sqe, _sqe_entry);
654 1.1 hikaru
655 1.1 hikaru if ((m->m_flags & M_EXT) && m->m_ext.ext_free != NULL)
656 1.1 hikaru sc->sc_ext_callback_cnt++;
657 1.1 hikaru }
658 1.1 hikaru
659 1.1 hikaru static inline void
660 1.19 simonb cnmac_send_queue_del(struct cnmac_softc *sc, struct mbuf **rm, uint64_t **rgbuf)
661 1.1 hikaru {
662 1.1 hikaru struct _send_queue_entry *sqe;
663 1.1 hikaru
664 1.1 hikaru sqe = SIMPLEQ_FIRST(&sc->sc_sendq);
665 1.23 simonb KASSERT(sqe != NULL);
666 1.1 hikaru SIMPLEQ_REMOVE_HEAD(&sc->sc_sendq, _sqe_entry);
667 1.1 hikaru
668 1.1 hikaru *rm = (void *)sqe;
669 1.1 hikaru *rgbuf = sqe->_sqe_gbuf;
670 1.1 hikaru
671 1.1 hikaru if (((*rm)->m_flags & M_EXT) && (*rm)->m_ext.ext_free != NULL) {
672 1.1 hikaru sc->sc_ext_callback_cnt--;
673 1.23 simonb KASSERT(sc->sc_ext_callback_cnt >= 0);
674 1.1 hikaru }
675 1.1 hikaru }
676 1.1 hikaru
677 1.1 hikaru static inline int
678 1.24 simonb cnmac_buf_free_work(struct cnmac_softc *sc, uint64_t *work)
679 1.1 hikaru {
680 1.24 simonb
681 1.1 hikaru /* XXX when jumbo frame */
682 1.24 simonb if (ISSET(work[2], PIP_WQE_WORD2_IP_BUFS)) {
683 1.1 hikaru paddr_t addr;
684 1.1 hikaru paddr_t start_buffer;
685 1.1 hikaru
686 1.1 hikaru addr = work[3] & PIP_WQE_WORD3_ADDR;
687 1.1 hikaru start_buffer = addr & ~(2048 - 1);
688 1.1 hikaru
689 1.19 simonb octfpa_buf_put_paddr(cnmac_fb_pkt, start_buffer);
690 1.1 hikaru }
691 1.1 hikaru
692 1.19 simonb octfpa_buf_put(cnmac_fb_wqe, work);
693 1.1 hikaru
694 1.1 hikaru return 0;
695 1.1 hikaru }
696 1.1 hikaru
697 1.1 hikaru static inline void
698 1.24 simonb cnmac_buf_ext_free(struct mbuf *m, void *buf, size_t size, void *arg)
699 1.1 hikaru {
700 1.19 simonb octfpa_buf_put(cnmac_fb_pkt, buf);
701 1.1 hikaru
702 1.23 simonb KASSERT(m != NULL);
703 1.1 hikaru
704 1.1 hikaru pool_cache_put(mb_cache, m);
705 1.1 hikaru }
706 1.1 hikaru
707 1.1 hikaru /* ---- ifnet interfaces */
708 1.1 hikaru
709 1.1 hikaru static int
710 1.19 simonb cnmac_ioctl(struct ifnet *ifp, u_long cmd, void *data)
711 1.1 hikaru {
712 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
713 1.1 hikaru struct ifreq *ifr = (struct ifreq *)data;
714 1.1 hikaru int s, error;
715 1.1 hikaru
716 1.1 hikaru s = splnet();
717 1.1 hikaru switch (cmd) {
718 1.1 hikaru case SIOCSIFMEDIA:
719 1.1 hikaru /* Flow control requires full-duplex mode. */
720 1.1 hikaru if (IFM_SUBTYPE(ifr->ifr_media) == IFM_AUTO ||
721 1.1 hikaru (ifr->ifr_media & IFM_FDX) == 0) {
722 1.1 hikaru ifr->ifr_media &= ~IFM_ETH_FMASK;
723 1.1 hikaru }
724 1.1 hikaru if (IFM_SUBTYPE(ifr->ifr_media) != IFM_AUTO) {
725 1.1 hikaru if ((ifr->ifr_media & IFM_ETH_FMASK) == IFM_FLOW) {
726 1.1 hikaru ifr->ifr_media |=
727 1.1 hikaru IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
728 1.1 hikaru }
729 1.12 msaitoh sc->sc_gmx_port->sc_port_flowflags =
730 1.1 hikaru ifr->ifr_media & IFM_ETH_FMASK;
731 1.1 hikaru }
732 1.1 hikaru error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
733 1.1 hikaru break;
734 1.1 hikaru default:
735 1.1 hikaru error = ether_ioctl(ifp, cmd, data);
736 1.1 hikaru break;
737 1.1 hikaru }
738 1.24 simonb
739 1.24 simonb if (error == ENETRESET) {
740 1.24 simonb if (ISSET(ifp->if_flags, IFF_RUNNING))
741 1.24 simonb octgmx_set_filter(sc->sc_gmx_port);
742 1.24 simonb error = 0;
743 1.24 simonb }
744 1.24 simonb
745 1.19 simonb cnmac_start(ifp);
746 1.24 simonb
747 1.1 hikaru splx(s);
748 1.1 hikaru
749 1.12 msaitoh return error;
750 1.1 hikaru }
751 1.1 hikaru
752 1.1 hikaru /* ---- send (output) */
753 1.1 hikaru
754 1.1 hikaru static inline uint64_t
755 1.24 simonb cnmac_send_makecmd_w0(uint64_t fau0, uint64_t fau1, size_t len, int segs,
756 1.24 simonb int ipoffp1)
757 1.1 hikaru {
758 1.24 simonb
759 1.19 simonb return octpko_cmd_word0(
760 1.1 hikaru OCT_FAU_OP_SIZE_64, /* sz1 */
761 1.1 hikaru OCT_FAU_OP_SIZE_64, /* sz0 */
762 1.1 hikaru 1, fau1, 1, fau0, /* s1, reg1, s0, reg0 */
763 1.1 hikaru 0, /* le */
764 1.19 simonb cnmac_param_pko_cmd_w0_n2, /* n2 */
765 1.1 hikaru 1, 0, /* q, r */
766 1.1 hikaru (segs == 1) ? 0 : 1, /* g */
767 1.1 hikaru 0, 0, 1, /* ipoffp1, ii, df */
768 1.1 hikaru segs, (int)len); /* segs, totalbytes */
769 1.1 hikaru }
770 1.1 hikaru
771 1.12 msaitoh static inline uint64_t
772 1.19 simonb cnmac_send_makecmd_w1(int size, paddr_t addr)
773 1.1 hikaru {
774 1.24 simonb
775 1.19 simonb return octpko_cmd_word1(
776 1.1 hikaru 0, 0, /* i, back */
777 1.24 simonb OCTEON_POOL_NO_SG, /* pool */
778 1.1 hikaru size, addr); /* size, addr */
779 1.1 hikaru }
780 1.1 hikaru
781 1.1 hikaru static inline int
782 1.19 simonb cnmac_send_makecmd_gbuf(struct cnmac_softc *sc, struct mbuf *m0, uint64_t *gbuf,
783 1.19 simonb int *rsegs)
784 1.1 hikaru {
785 1.1 hikaru struct mbuf *m;
786 1.1 hikaru int segs = 0;
787 1.1 hikaru uintptr_t laddr, rlen, nlen;
788 1.1 hikaru
789 1.1 hikaru for (m = m0; m != NULL; m = m->m_next) {
790 1.1 hikaru
791 1.1 hikaru if (__predict_false(m->m_len == 0))
792 1.1 hikaru continue;
793 1.1 hikaru
794 1.12 msaitoh /* Aligned 4k */
795 1.1 hikaru laddr = (uintptr_t)m->m_data & (PAGE_SIZE - 1);
796 1.1 hikaru
797 1.1 hikaru if (laddr + m->m_len > PAGE_SIZE) {
798 1.1 hikaru /* XXX XXX XXX */
799 1.1 hikaru rlen = PAGE_SIZE - laddr;
800 1.1 hikaru nlen = m->m_len - rlen;
801 1.19 simonb *(gbuf + segs) = cnmac_send_makecmd_w1(rlen,
802 1.1 hikaru kvtophys((vaddr_t)m->m_data));
803 1.1 hikaru segs++;
804 1.1 hikaru if (segs > 63) {
805 1.1 hikaru return 1;
806 1.1 hikaru }
807 1.1 hikaru /* XXX XXX XXX */
808 1.1 hikaru } else {
809 1.1 hikaru rlen = 0;
810 1.1 hikaru nlen = m->m_len;
811 1.1 hikaru }
812 1.1 hikaru
813 1.19 simonb *(gbuf + segs) = cnmac_send_makecmd_w1(nlen,
814 1.1 hikaru kvtophys((vaddr_t)(m->m_data + rlen)));
815 1.1 hikaru segs++;
816 1.1 hikaru if (segs > 63) {
817 1.1 hikaru return 1;
818 1.1 hikaru }
819 1.1 hikaru }
820 1.1 hikaru
821 1.23 simonb KASSERT(m == NULL);
822 1.1 hikaru
823 1.1 hikaru *rsegs = segs;
824 1.1 hikaru
825 1.1 hikaru return 0;
826 1.1 hikaru }
827 1.1 hikaru
828 1.1 hikaru static inline int
829 1.19 simonb cnmac_send_makecmd(struct cnmac_softc *sc, struct mbuf *m,
830 1.1 hikaru uint64_t *gbuf, uint64_t *rpko_cmd_w0, uint64_t *rpko_cmd_w1)
831 1.1 hikaru {
832 1.1 hikaru uint64_t pko_cmd_w0, pko_cmd_w1;
833 1.24 simonb int ipoffp1;
834 1.1 hikaru int segs;
835 1.1 hikaru int result = 0;
836 1.1 hikaru
837 1.19 simonb if (cnmac_send_makecmd_gbuf(sc, m, gbuf, &segs)) {
838 1.1 hikaru log(LOG_WARNING, "%s: there are a lot of number of segments"
839 1.1 hikaru " of transmission data", device_xname(sc->sc_dev));
840 1.1 hikaru result = 1;
841 1.1 hikaru goto done;
842 1.1 hikaru }
843 1.1 hikaru
844 1.24 simonb /* Get the IP packet offset for TCP/UDP checksum offloading. */
845 1.24 simonb ipoffp1 = (m->m_pkthdr.csum_flags & (M_CSUM_TCPv4 | M_CSUM_UDPv4))
846 1.24 simonb ? (ETHER_HDR_LEN + 1) : 0;
847 1.24 simonb
848 1.1 hikaru /*
849 1.1 hikaru * segs == 1 -> link mode (single continuous buffer)
850 1.1 hikaru * WORD1[size] is number of bytes pointed by segment
851 1.1 hikaru *
852 1.1 hikaru * segs > 1 -> gather mode (scatter-gather buffer)
853 1.1 hikaru * WORD1[size] is number of segments
854 1.1 hikaru */
855 1.19 simonb pko_cmd_w0 = cnmac_send_makecmd_w0(sc->sc_fau_done.fd_regno,
856 1.24 simonb 0, m->m_pkthdr.len, segs, ipoffp1);
857 1.4 matt if (segs == 1) {
858 1.19 simonb pko_cmd_w1 = cnmac_send_makecmd_w1(
859 1.4 matt m->m_pkthdr.len, kvtophys((vaddr_t)m->m_data));
860 1.4 matt } else {
861 1.4 matt #ifdef __mips_n32
862 1.4 matt KASSERT(MIPS_KSEG0_P(gbuf));
863 1.19 simonb pko_cmd_w1 = cnmac_send_makecmd_w1(segs,
864 1.4 matt MIPS_KSEG0_TO_PHYS(gbuf));
865 1.4 matt #else
866 1.19 simonb pko_cmd_w1 = cnmac_send_makecmd_w1(segs,
867 1.4 matt MIPS_XKPHYS_TO_PHYS(gbuf));
868 1.4 matt #endif
869 1.4 matt }
870 1.1 hikaru
871 1.1 hikaru *rpko_cmd_w0 = pko_cmd_w0;
872 1.1 hikaru *rpko_cmd_w1 = pko_cmd_w1;
873 1.1 hikaru
874 1.1 hikaru done:
875 1.1 hikaru return result;
876 1.1 hikaru }
877 1.1 hikaru
878 1.1 hikaru static inline int
879 1.19 simonb cnmac_send_cmd(struct cnmac_softc *sc, uint64_t pko_cmd_w0,
880 1.8 jmcneill uint64_t pko_cmd_w1, int *pwdc)
881 1.1 hikaru {
882 1.1 hikaru uint64_t *cmdptr;
883 1.1 hikaru int result = 0;
884 1.1 hikaru
885 1.4 matt #ifdef __mips_n32
886 1.4 matt KASSERT((sc->sc_cmdptr.cmdptr & ~MIPS_PHYS_MASK) == 0);
887 1.4 matt cmdptr = (uint64_t *)MIPS_PHYS_TO_KSEG0(sc->sc_cmdptr.cmdptr);
888 1.4 matt #else
889 1.1 hikaru cmdptr = (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(sc->sc_cmdptr.cmdptr);
890 1.4 matt #endif
891 1.1 hikaru cmdptr += sc->sc_cmdptr.cmdptr_idx;
892 1.1 hikaru
893 1.23 simonb KASSERT(cmdptr != NULL);
894 1.1 hikaru
895 1.1 hikaru *cmdptr++ = pko_cmd_w0;
896 1.1 hikaru *cmdptr++ = pko_cmd_w1;
897 1.1 hikaru
898 1.23 simonb KASSERT(sc->sc_cmdptr.cmdptr_idx + 2 <= FPA_COMMAND_BUFFER_POOL_NWORDS - 1);
899 1.1 hikaru
900 1.1 hikaru if (sc->sc_cmdptr.cmdptr_idx + 2 == FPA_COMMAND_BUFFER_POOL_NWORDS - 1) {
901 1.1 hikaru paddr_t buf;
902 1.1 hikaru
903 1.19 simonb buf = octfpa_buf_get_paddr(cnmac_fb_cmd);
904 1.1 hikaru if (buf == 0) {
905 1.1 hikaru log(LOG_WARNING,
906 1.1 hikaru "%s: can not allocate command buffer from free pool allocator\n",
907 1.1 hikaru device_xname(sc->sc_dev));
908 1.1 hikaru result = 1;
909 1.1 hikaru goto done;
910 1.1 hikaru }
911 1.1 hikaru *cmdptr++ = buf;
912 1.1 hikaru sc->sc_cmdptr.cmdptr = (uint64_t)buf;
913 1.1 hikaru sc->sc_cmdptr.cmdptr_idx = 0;
914 1.1 hikaru } else {
915 1.1 hikaru sc->sc_cmdptr.cmdptr_idx += 2;
916 1.1 hikaru }
917 1.1 hikaru
918 1.8 jmcneill *pwdc += 2;
919 1.1 hikaru
920 1.1 hikaru done:
921 1.1 hikaru return result;
922 1.1 hikaru }
923 1.1 hikaru
924 1.1 hikaru static inline int
925 1.19 simonb cnmac_send_buf(struct cnmac_softc *sc, struct mbuf *m, uint64_t *gbuf,
926 1.19 simonb int *pwdc)
927 1.1 hikaru {
928 1.1 hikaru int result = 0, error;
929 1.1 hikaru uint64_t pko_cmd_w0, pko_cmd_w1;
930 1.1 hikaru
931 1.19 simonb error = cnmac_send_makecmd(sc, m, gbuf, &pko_cmd_w0, &pko_cmd_w1);
932 1.1 hikaru if (error != 0) {
933 1.12 msaitoh /* Already logging */
934 1.1 hikaru result = error;
935 1.1 hikaru goto done;
936 1.1 hikaru }
937 1.1 hikaru
938 1.19 simonb error = cnmac_send_cmd(sc, pko_cmd_w0, pko_cmd_w1, pwdc);
939 1.1 hikaru if (error != 0) {
940 1.12 msaitoh /* Already logging */
941 1.1 hikaru result = error;
942 1.1 hikaru }
943 1.1 hikaru
944 1.1 hikaru done:
945 1.1 hikaru return result;
946 1.1 hikaru }
947 1.1 hikaru
948 1.1 hikaru static inline int
949 1.19 simonb cnmac_send(struct cnmac_softc *sc, struct mbuf *m, int *pwdc)
950 1.1 hikaru {
951 1.1 hikaru paddr_t gaddr = 0;
952 1.1 hikaru uint64_t *gbuf = NULL;
953 1.1 hikaru int result = 0, error;
954 1.1 hikaru
955 1.19 simonb gaddr = octfpa_buf_get_paddr(cnmac_fb_sg);
956 1.1 hikaru if (gaddr == 0) {
957 1.12 msaitoh log(LOG_WARNING, "%s: can not allocate gather buffer from "
958 1.12 msaitoh "free pool allocator\n", device_xname(sc->sc_dev));
959 1.1 hikaru result = 1;
960 1.1 hikaru goto done;
961 1.1 hikaru }
962 1.1 hikaru
963 1.4 matt #ifdef __mips_n32
964 1.4 matt KASSERT((gaddr & ~MIPS_PHYS_MASK) == 0);
965 1.4 matt gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_KSEG0(gaddr);
966 1.4 matt #else
967 1.1 hikaru gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_XKPHYS_CACHED(gaddr);
968 1.4 matt #endif
969 1.1 hikaru
970 1.23 simonb KASSERT(gbuf != NULL);
971 1.1 hikaru
972 1.19 simonb error = cnmac_send_buf(sc, m, gbuf, pwdc);
973 1.1 hikaru if (error != 0) {
974 1.12 msaitoh /* Already logging */
975 1.19 simonb octfpa_buf_put_paddr(cnmac_fb_sg, gaddr);
976 1.1 hikaru result = error;
977 1.1 hikaru goto done;
978 1.1 hikaru }
979 1.1 hikaru
980 1.19 simonb cnmac_send_queue_add(sc, m, gbuf);
981 1.1 hikaru
982 1.1 hikaru done:
983 1.1 hikaru return result;
984 1.1 hikaru }
985 1.1 hikaru
986 1.1 hikaru static void
987 1.19 simonb cnmac_start(struct ifnet *ifp)
988 1.1 hikaru {
989 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
990 1.1 hikaru struct mbuf *m;
991 1.8 jmcneill int wdc = 0;
992 1.1 hikaru
993 1.1 hikaru /*
994 1.12 msaitoh * Performance tuning
995 1.15 gutterid * pre-send iobdma request
996 1.1 hikaru */
997 1.19 simonb cnmac_send_queue_flush_prefetch(sc);
998 1.1 hikaru
999 1.1 hikaru if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1000 1.1 hikaru goto last;
1001 1.1 hikaru
1002 1.24 simonb if (__predict_false(!octgmx_link_status(sc->sc_gmx_port)))
1003 1.1 hikaru goto last;
1004 1.1 hikaru
1005 1.1 hikaru for (;;) {
1006 1.1 hikaru IFQ_POLL(&ifp->if_snd, m);
1007 1.1 hikaru if (__predict_false(m == NULL))
1008 1.1 hikaru break;
1009 1.1 hikaru
1010 1.1 hikaru /* XXX XXX XXX */
1011 1.19 simonb cnmac_send_queue_flush_fetch(sc);
1012 1.1 hikaru
1013 1.1 hikaru /*
1014 1.12 msaitoh * If no free send buffer is available, free all the sent
1015 1.15 gutterid * buffers and bail out.
1016 1.1 hikaru */
1017 1.19 simonb if (cnmac_send_queue_is_full(sc)) {
1018 1.8 jmcneill SET(ifp->if_flags, IFF_OACTIVE);
1019 1.8 jmcneill if (wdc > 0)
1020 1.19 simonb octpko_op_doorbell_write(sc->sc_port,
1021 1.8 jmcneill sc->sc_port, wdc);
1022 1.25 simonb callout_schedule(&sc->sc_tick_free_ch, 1);
1023 1.1 hikaru return;
1024 1.1 hikaru }
1025 1.1 hikaru /* XXX XXX XXX */
1026 1.1 hikaru
1027 1.1 hikaru IFQ_DEQUEUE(&ifp->if_snd, m);
1028 1.1 hikaru
1029 1.9 msaitoh bpf_mtap(ifp, m, BPF_D_OUT);
1030 1.1 hikaru
1031 1.1 hikaru /* XXX XXX XXX */
1032 1.1 hikaru if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh)
1033 1.19 simonb cnmac_send_queue_flush(sc);
1034 1.19 simonb if (cnmac_send(sc, m, &wdc)) {
1035 1.1 hikaru IF_DROP(&ifp->if_snd);
1036 1.1 hikaru m_freem(m);
1037 1.1 hikaru log(LOG_WARNING,
1038 1.12 msaitoh "%s: failed in the transmission of the packet\n",
1039 1.12 msaitoh device_xname(sc->sc_dev));
1040 1.12 msaitoh } else
1041 1.1 hikaru sc->sc_soft_req_cnt++;
1042 1.12 msaitoh
1043 1.1 hikaru if (sc->sc_flush)
1044 1.19 simonb cnmac_send_queue_flush_sync(sc);
1045 1.1 hikaru /* XXX XXX XXX */
1046 1.1 hikaru
1047 1.12 msaitoh /* Send next iobdma request */
1048 1.19 simonb cnmac_send_queue_flush_prefetch(sc);
1049 1.1 hikaru }
1050 1.1 hikaru
1051 1.8 jmcneill if (wdc > 0)
1052 1.19 simonb octpko_op_doorbell_write(sc->sc_port, sc->sc_port, wdc);
1053 1.8 jmcneill
1054 1.1 hikaru last:
1055 1.19 simonb cnmac_send_queue_flush_fetch(sc);
1056 1.25 simonb callout_schedule(&sc->sc_tick_free_ch, 1);
1057 1.1 hikaru }
1058 1.1 hikaru
1059 1.1 hikaru static void
1060 1.19 simonb cnmac_watchdog(struct ifnet *ifp)
1061 1.1 hikaru {
1062 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
1063 1.1 hikaru
1064 1.1 hikaru printf("%s: device timeout\n", device_xname(sc->sc_dev));
1065 1.1 hikaru
1066 1.19 simonb cnmac_configure(sc);
1067 1.1 hikaru
1068 1.1 hikaru SET(ifp->if_flags, IFF_RUNNING);
1069 1.1 hikaru CLR(ifp->if_flags, IFF_OACTIVE);
1070 1.1 hikaru ifp->if_timer = 0;
1071 1.1 hikaru
1072 1.19 simonb cnmac_start(ifp);
1073 1.1 hikaru }
1074 1.1 hikaru
1075 1.1 hikaru static int
1076 1.19 simonb cnmac_init(struct ifnet *ifp)
1077 1.1 hikaru {
1078 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
1079 1.1 hikaru
1080 1.1 hikaru /* XXX don't disable commonly used parts!!! XXX */
1081 1.1 hikaru if (sc->sc_init_flag == 0) {
1082 1.1 hikaru /* Cancel any pending I/O. */
1083 1.19 simonb cnmac_stop(ifp, 0);
1084 1.1 hikaru
1085 1.1 hikaru /* Initialize the device */
1086 1.19 simonb cnmac_configure(sc);
1087 1.1 hikaru
1088 1.19 simonb octpko_enable(sc->sc_pko);
1089 1.19 simonb octipd_enable(sc->sc_ipd);
1090 1.1 hikaru
1091 1.1 hikaru sc->sc_init_flag = 1;
1092 1.1 hikaru } else {
1093 1.19 simonb octgmx_port_enable(sc->sc_gmx_port, 1);
1094 1.1 hikaru }
1095 1.17 thorpej mii_ifmedia_change(&sc->sc_mii);
1096 1.1 hikaru
1097 1.19 simonb octgmx_set_filter(sc->sc_gmx_port);
1098 1.1 hikaru
1099 1.25 simonb callout_schedule(&sc->sc_tick_misc_ch, hz);
1100 1.25 simonb callout_schedule(&sc->sc_tick_free_ch, hz);
1101 1.1 hikaru
1102 1.1 hikaru SET(ifp->if_flags, IFF_RUNNING);
1103 1.1 hikaru CLR(ifp->if_flags, IFF_OACTIVE);
1104 1.1 hikaru
1105 1.1 hikaru return 0;
1106 1.1 hikaru }
1107 1.1 hikaru
1108 1.1 hikaru static void
1109 1.19 simonb cnmac_stop(struct ifnet *ifp, int disable)
1110 1.1 hikaru {
1111 1.19 simonb struct cnmac_softc *sc = ifp->if_softc;
1112 1.1 hikaru
1113 1.1 hikaru callout_stop(&sc->sc_tick_misc_ch);
1114 1.1 hikaru callout_stop(&sc->sc_tick_free_ch);
1115 1.1 hikaru
1116 1.1 hikaru mii_down(&sc->sc_mii);
1117 1.1 hikaru
1118 1.19 simonb octgmx_port_enable(sc->sc_gmx_port, 0);
1119 1.1 hikaru
1120 1.1 hikaru /* Mark the interface as down and cancel the watchdog timer. */
1121 1.1 hikaru CLR(ifp->if_flags, IFF_RUNNING | IFF_OACTIVE);
1122 1.1 hikaru ifp->if_timer = 0;
1123 1.1 hikaru }
1124 1.1 hikaru
1125 1.1 hikaru /* ---- misc */
1126 1.1 hikaru
1127 1.1 hikaru static int
1128 1.19 simonb cnmac_reset(struct cnmac_softc *sc)
1129 1.1 hikaru {
1130 1.19 simonb octgmx_reset_speed(sc->sc_gmx_port);
1131 1.19 simonb octgmx_reset_flowctl(sc->sc_gmx_port);
1132 1.19 simonb octgmx_reset_timing(sc->sc_gmx_port);
1133 1.1 hikaru
1134 1.1 hikaru return 0;
1135 1.1 hikaru }
1136 1.1 hikaru
1137 1.1 hikaru static int
1138 1.19 simonb cnmac_configure(struct cnmac_softc *sc)
1139 1.1 hikaru {
1140 1.19 simonb octgmx_port_enable(sc->sc_gmx_port, 0);
1141 1.1 hikaru
1142 1.19 simonb cnmac_reset(sc);
1143 1.1 hikaru
1144 1.19 simonb cnmac_configure_common(sc);
1145 1.1 hikaru
1146 1.19 simonb octpko_port_config(sc->sc_pko);
1147 1.19 simonb octpko_port_enable(sc->sc_pko, 1);
1148 1.24 simonb octpow_config(sc->sc_pow, sc->sc_powgroup);
1149 1.1 hikaru
1150 1.19 simonb octgmx_tx_stats_rd_clr(sc->sc_gmx_port, 1);
1151 1.19 simonb octgmx_rx_stats_rd_clr(sc->sc_gmx_port, 1);
1152 1.1 hikaru
1153 1.19 simonb octgmx_port_enable(sc->sc_gmx_port, 1);
1154 1.1 hikaru
1155 1.1 hikaru return 0;
1156 1.1 hikaru }
1157 1.1 hikaru
1158 1.1 hikaru static int
1159 1.19 simonb cnmac_configure_common(struct cnmac_softc *sc)
1160 1.1 hikaru {
1161 1.1 hikaru static int once;
1162 1.1 hikaru
1163 1.1 hikaru if (once == 1)
1164 1.1 hikaru return 0;
1165 1.1 hikaru once = 1;
1166 1.1 hikaru
1167 1.19 simonb octipd_config(sc->sc_ipd);
1168 1.19 simonb octpko_config(sc->sc_pko);
1169 1.1 hikaru
1170 1.1 hikaru return 0;
1171 1.1 hikaru }
1172 1.1 hikaru
1173 1.1 hikaru /* ---- receive (input) */
1174 1.1 hikaru
1175 1.1 hikaru static inline int
1176 1.19 simonb cnmac_recv_mbuf(struct cnmac_softc *sc, uint64_t *work, struct mbuf **rm)
1177 1.1 hikaru {
1178 1.1 hikaru struct mbuf *m;
1179 1.24 simonb vaddr_t addr;
1180 1.24 simonb vaddr_t ext_buf;
1181 1.1 hikaru size_t ext_size;
1182 1.1 hikaru uint64_t word1 = work[1];
1183 1.1 hikaru uint64_t word2 = work[2];
1184 1.1 hikaru uint64_t word3 = work[3];
1185 1.1 hikaru
1186 1.1 hikaru MGETHDR(m, M_NOWAIT, MT_DATA);
1187 1.1 hikaru if (m == NULL)
1188 1.1 hikaru return 1;
1189 1.1 hikaru
1190 1.24 simonb octfpa_buf_put(cnmac_fb_wqe, work);
1191 1.24 simonb
1192 1.24 simonb if (__SHIFTOUT(word2, PIP_WQE_WORD2_IP_BUFS) != 1)
1193 1.24 simonb panic("%s: expected one buffer, got %" PRId64, __func__,
1194 1.24 simonb __SHIFTOUT(word2, PIP_WQE_WORD2_IP_BUFS));
1195 1.1 hikaru
1196 1.1 hikaru
1197 1.4 matt #ifdef __mips_n32
1198 1.24 simonb KASSERT((word3 & ~MIPS_PHYS_MASK) == 0);
1199 1.24 simonb addr = MIPS_PHYS_TO_KSEG0(word3 & PIP_WQE_WORD3_ADDR);
1200 1.4 matt #else
1201 1.24 simonb addr = MIPS_PHYS_TO_XKPHYS_CACHED(word3 & PIP_WQE_WORD3_ADDR);
1202 1.4 matt #endif
1203 1.1 hikaru
1204 1.24 simonb ext_size = OCTEON_POOL_SIZE_PKT;
1205 1.24 simonb ext_buf = addr & ~(ext_size - 1);
1206 1.24 simonb MEXTADD(m, ext_buf, ext_size, 0, cnmac_buf_ext_free, NULL);
1207 1.1 hikaru
1208 1.24 simonb m->m_data = (void *)addr;
1209 1.1 hikaru m->m_len = m->m_pkthdr.len = (word1 & PIP_WQE_WORD1_LEN) >> 48;
1210 1.3 ozaki m_set_rcvif(m, &sc->sc_ethercom.ec_if);
1211 1.12 msaitoh
1212 1.12 msaitoh /* Not readonly buffer */
1213 1.1 hikaru m->m_flags |= M_EXT_RW;
1214 1.1 hikaru
1215 1.1 hikaru *rm = m;
1216 1.1 hikaru
1217 1.23 simonb KASSERT(*rm != NULL);
1218 1.1 hikaru
1219 1.1 hikaru return 0;
1220 1.1 hikaru }
1221 1.1 hikaru
1222 1.1 hikaru static inline int
1223 1.24 simonb cnmac_recv_check(struct cnmac_softc *sc, uint64_t word2)
1224 1.1 hikaru {
1225 1.24 simonb static struct timeval rxerr_log_interval = { 0, 2500000 };
1226 1.24 simonb uint64_t opecode;
1227 1.1 hikaru
1228 1.1 hikaru if (__predict_true(!ISSET(word2, PIP_WQE_WORD2_NOIP_RE)))
1229 1.1 hikaru return 0;
1230 1.1 hikaru
1231 1.24 simonb opecode = word2 & PIP_WQE_WORD2_NOIP_OPECODE;
1232 1.24 simonb if ((sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) &&
1233 1.24 simonb ratecheck(&sc->sc_rxerr_log_last, &rxerr_log_interval))
1234 1.24 simonb log(LOG_DEBUG, "%s: rx error (%"PRId64")\n",
1235 1.24 simonb device_xname(sc->sc_dev), opecode);
1236 1.24 simonb
1237 1.12 msaitoh /* This error is harmless */
1238 1.24 simonb if (opecode == PIP_WQE_WORD2_RE_OPCODE_OVRRUN)
1239 1.1 hikaru return 0;
1240 1.1 hikaru
1241 1.1 hikaru return 1;
1242 1.1 hikaru }
1243 1.1 hikaru
1244 1.1 hikaru static inline int
1245 1.19 simonb cnmac_recv(struct cnmac_softc *sc, uint64_t *work)
1246 1.1 hikaru {
1247 1.1 hikaru struct ifnet *ifp;
1248 1.1 hikaru struct mbuf *m;
1249 1.1 hikaru uint64_t word2;
1250 1.1 hikaru
1251 1.23 simonb KASSERT(sc != NULL);
1252 1.23 simonb KASSERT(work != NULL);
1253 1.1 hikaru
1254 1.1 hikaru word2 = work[2];
1255 1.1 hikaru ifp = &sc->sc_ethercom.ec_if;
1256 1.1 hikaru
1257 1.23 simonb KASSERT(ifp != NULL);
1258 1.1 hikaru
1259 1.24 simonb if (!ISSET(ifp->if_flags, IFF_RUNNING))
1260 1.24 simonb goto drop;
1261 1.24 simonb
1262 1.19 simonb if (__predict_false(cnmac_recv_check(sc, word2) != 0)) {
1263 1.16 thorpej if_statinc(ifp, if_ierrors);
1264 1.1 hikaru goto drop;
1265 1.1 hikaru }
1266 1.1 hikaru
1267 1.19 simonb if (__predict_false(cnmac_recv_mbuf(sc, work, &m) != 0)) {
1268 1.16 thorpej if_statinc(ifp, if_ierrors);
1269 1.1 hikaru goto drop;
1270 1.1 hikaru }
1271 1.1 hikaru
1272 1.1 hikaru /* work[0] .. work[3] may not be valid any more */
1273 1.1 hikaru
1274 1.23 simonb KASSERT(m != NULL);
1275 1.1 hikaru
1276 1.19 simonb octipd_offload(word2, m->m_data, &m->m_pkthdr.csum_flags);
1277 1.1 hikaru
1278 1.2 ozaki if_percpuq_enqueue(ifp->if_percpuq, m);
1279 1.1 hikaru
1280 1.1 hikaru return 0;
1281 1.1 hikaru
1282 1.1 hikaru drop:
1283 1.24 simonb cnmac_buf_free_work(sc, work);
1284 1.24 simonb return 1;
1285 1.1 hikaru }
1286 1.1 hikaru
1287 1.24 simonb static int
1288 1.24 simonb cnmac_intr(void *arg)
1289 1.1 hikaru {
1290 1.24 simonb struct cnmac_softc *sc = arg;
1291 1.24 simonb uint64_t *work;
1292 1.24 simonb uint64_t wqmask = __BIT(sc->sc_powgroup);
1293 1.24 simonb uint32_t coreid = 0; /* XXX octeon_get_coreid() */
1294 1.24 simonb uint32_t port;
1295 1.24 simonb
1296 1.24 simonb _POW_WR8(sc->sc_pow, POW_PP_GRP_MSK_OFFSET(coreid), wqmask);
1297 1.24 simonb
1298 1.24 simonb octpow_tag_sw_wait();
1299 1.24 simonb octpow_work_request_async(OCTEON_CVMSEG_OFFSET(csm_pow_intr),
1300 1.24 simonb POW_NO_WAIT);
1301 1.1 hikaru
1302 1.24 simonb for (;;) {
1303 1.24 simonb work = (uint64_t *)octpow_work_response_async(
1304 1.24 simonb OCTEON_CVMSEG_OFFSET(csm_pow_intr));
1305 1.24 simonb if (work == NULL)
1306 1.24 simonb break;
1307 1.1 hikaru
1308 1.24 simonb octpow_tag_sw_wait();
1309 1.24 simonb octpow_work_request_async(OCTEON_CVMSEG_OFFSET(csm_pow_intr),
1310 1.24 simonb POW_NO_WAIT);
1311 1.24 simonb
1312 1.24 simonb port = __SHIFTOUT(work[1], PIP_WQE_WORD1_IPRT);
1313 1.24 simonb if (port != sc->sc_port) {
1314 1.24 simonb printf("%s: unexpected wqe port %u, should be %u\n",
1315 1.24 simonb device_xname(sc->sc_dev), port, sc->sc_port);
1316 1.24 simonb goto wqe_error;
1317 1.24 simonb }
1318 1.1 hikaru
1319 1.24 simonb (void)cnmac_recv(sc, work);
1320 1.26 simonb
1321 1.26 simonb cnmac_send_queue_check_and_flush(sc);
1322 1.1 hikaru }
1323 1.1 hikaru
1324 1.24 simonb _POW_WR8(sc->sc_pow, POW_WQ_INT_OFFSET, wqmask);
1325 1.1 hikaru
1326 1.24 simonb return 1;
1327 1.1 hikaru
1328 1.24 simonb wqe_error:
1329 1.24 simonb printf("word0: 0x%016" PRIx64 "\n", work[0]);
1330 1.24 simonb printf("word1: 0x%016" PRIx64 "\n", work[1]);
1331 1.24 simonb printf("word2: 0x%016" PRIx64 "\n", work[2]);
1332 1.24 simonb printf("word3: 0x%016" PRIx64 "\n", work[3]);
1333 1.24 simonb panic("wqe_error");
1334 1.1 hikaru }
1335 1.1 hikaru
1336 1.1 hikaru /* ---- tick */
1337 1.1 hikaru
1338 1.1 hikaru /*
1339 1.19 simonb * cnmac_tick_free
1340 1.1 hikaru *
1341 1.1 hikaru * => garbage collect send gather buffer / mbuf
1342 1.1 hikaru * => called at softclock
1343 1.1 hikaru */
1344 1.1 hikaru static void
1345 1.19 simonb cnmac_tick_free(void *arg)
1346 1.1 hikaru {
1347 1.19 simonb struct cnmac_softc *sc = arg;
1348 1.1 hikaru int timo;
1349 1.1 hikaru
1350 1.26 simonb cnmac_send_queue_check_and_flush(sc);
1351 1.1 hikaru
1352 1.25 simonb timo = (sc->sc_ext_callback_cnt > 0) ? 1 : hz;
1353 1.1 hikaru callout_schedule(&sc->sc_tick_free_ch, timo);
1354 1.1 hikaru }
1355 1.1 hikaru
1356 1.1 hikaru /*
1357 1.19 simonb * cnmac_tick_misc
1358 1.1 hikaru *
1359 1.1 hikaru * => collect statistics
1360 1.1 hikaru * => check link status
1361 1.1 hikaru * => called at softclock
1362 1.1 hikaru */
1363 1.1 hikaru static void
1364 1.19 simonb cnmac_tick_misc(void *arg)
1365 1.1 hikaru {
1366 1.19 simonb struct cnmac_softc *sc = arg;
1367 1.1 hikaru struct ifnet *ifp;
1368 1.1 hikaru int s;
1369 1.1 hikaru
1370 1.1 hikaru s = splnet();
1371 1.1 hikaru
1372 1.1 hikaru ifp = &sc->sc_ethercom.ec_if;
1373 1.1 hikaru
1374 1.19 simonb octgmx_stats(sc->sc_gmx_port);
1375 1.19 simonb octpip_stats(sc->sc_pip, ifp, sc->sc_port);
1376 1.1 hikaru mii_tick(&sc->sc_mii);
1377 1.1 hikaru
1378 1.1 hikaru splx(s);
1379 1.1 hikaru
1380 1.1 hikaru callout_schedule(&sc->sc_tick_misc_ch, hz);
1381 1.1 hikaru }
1382