if_cnmac.c revision 1.26 1 /* $NetBSD: if_cnmac.c,v 1.26 2021/05/27 03:23:29 simonb Exp $ */
2
3 /*
4 * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: if_cnmac.c,v 1.26 2021/05/27 03:23:29 simonb Exp $");
31
32 /*
33 * If no free send buffer is available, free all the sent buffers and bail out.
34 */
35 #define CNMAC_SEND_QUEUE_CHECK
36
37 /* XXX XXX XXX XXX XXX XXX */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/pool.h>
42 #include <sys/mbuf.h>
43 #include <sys/malloc.h>
44 #include <sys/kernel.h>
45 #include <sys/socket.h>
46 #include <sys/ioctl.h>
47 #include <sys/errno.h>
48 #include <sys/device.h>
49 #include <sys/queue.h>
50 #include <sys/conf.h>
51 #include <sys/sysctl.h>
52 #include <sys/syslog.h>
53
54 #include <net/if.h>
55 #include <net/if_media.h>
56 #include <net/if_ether.h>
57 #include <net/route.h>
58 #include <net/bpf.h>
59
60 #include <netinet/in.h>
61 #include <netinet/in_systm.h>
62 #include <netinet/in_var.h>
63 #include <netinet/ip.h>
64
65 #include <sys/bus.h>
66 #include <machine/intr.h>
67 #include <machine/endian.h>
68 #include <machine/locore.h>
69
70 #include <dev/mii/mii.h>
71 #include <dev/mii/miivar.h>
72
73 #include <mips/cpuregs.h>
74
75 #include <mips/cavium/octeonreg.h>
76 #include <mips/cavium/octeonvar.h>
77 #include <mips/cavium/include/iobusvar.h>
78
79 #include <mips/cavium/dev/octeon_ciureg.h>
80 #include <mips/cavium/dev/octeon_faureg.h>
81 #include <mips/cavium/dev/octeon_fpareg.h>
82 #include <mips/cavium/dev/octeon_gmxreg.h>
83 #include <mips/cavium/dev/octeon_pipreg.h>
84 #include <mips/cavium/dev/octeon_powreg.h>
85 #include <mips/cavium/dev/octeon_fauvar.h>
86 #include <mips/cavium/dev/octeon_fpavar.h>
87 #include <mips/cavium/dev/octeon_gmxvar.h>
88 #include <mips/cavium/dev/octeon_ipdvar.h>
89 #include <mips/cavium/dev/octeon_pipvar.h>
90 #include <mips/cavium/dev/octeon_pkovar.h>
91 #include <mips/cavium/dev/octeon_powvar.h>
92 #include <mips/cavium/dev/octeon_smivar.h>
93
94 #include <mips/cavium/dev/if_cnmacvar.h>
95
96 /*
97 * Set the PKO to think command buffers are an odd length. This makes it so we
98 * never have to divide a comamnd across two buffers.
99 */
100 #define OCTEON_POOL_NWORDS_CMD \
101 (((uint32_t)OCTEON_POOL_SIZE_CMD / sizeof(uint64_t)) - 1)
102 #define FPA_COMMAND_BUFFER_POOL_NWORDS OCTEON_POOL_NWORDS_CMD /* XXX */
103
104 static void cnmac_buf_init(struct cnmac_softc *);
105
106 static int cnmac_match(device_t, struct cfdata *, void *);
107 static void cnmac_attach(device_t, device_t, void *);
108 static void cnmac_pip_init(struct cnmac_softc *);
109 static void cnmac_ipd_init(struct cnmac_softc *);
110 static void cnmac_pko_init(struct cnmac_softc *);
111
112 static void cnmac_board_mac_addr(uint8_t *, size_t, struct cnmac_softc *);
113
114 static int cnmac_mii_readreg(device_t, int, int, uint16_t *);
115 static int cnmac_mii_writereg(device_t, int, int, uint16_t);
116 static void cnmac_mii_statchg(struct ifnet *);
117
118 static int cnmac_mediainit(struct cnmac_softc *);
119 static void cnmac_mediastatus(struct ifnet *, struct ifmediareq *);
120
121 static inline void cnmac_send_queue_flush_prefetch(struct cnmac_softc *);
122 static inline void cnmac_send_queue_flush_fetch(struct cnmac_softc *);
123 static inline void cnmac_send_queue_flush(struct cnmac_softc *);
124 static inline void cnmac_send_queue_flush_sync(struct cnmac_softc *);
125 static void cnmac_send_queue_check_and_flush(struct cnmac_softc *);
126 static inline int cnmac_send_queue_is_full(struct cnmac_softc *);
127 static inline void cnmac_send_queue_add(struct cnmac_softc *, struct mbuf *,
128 uint64_t *);
129 static inline void cnmac_send_queue_del(struct cnmac_softc *, struct mbuf **,
130 uint64_t **);
131 static inline int cnmac_buf_free_work(struct cnmac_softc *, uint64_t *);
132 static inline void cnmac_buf_ext_free(struct mbuf *, void *, size_t, void *);
133
134 static int cnmac_ioctl(struct ifnet *, u_long, void *);
135 static void cnmac_watchdog(struct ifnet *);
136 static int cnmac_init(struct ifnet *);
137 static void cnmac_stop(struct ifnet *, int);
138 static void cnmac_start(struct ifnet *);
139
140 static inline int cnmac_send_cmd(struct cnmac_softc *, uint64_t, uint64_t,
141 int *);
142 static inline uint64_t cnmac_send_makecmd_w1(int, paddr_t);
143 static inline uint64_t cnmac_send_makecmd_w0(uint64_t, uint64_t, size_t, int,
144 int);
145 static inline int cnmac_send_makecmd_gbuf(struct cnmac_softc *, struct mbuf *,
146 uint64_t *, int *);
147 static inline int cnmac_send_makecmd(struct cnmac_softc *, struct mbuf *,
148 uint64_t *, uint64_t *, uint64_t *);
149 static inline int cnmac_send_buf(struct cnmac_softc *, struct mbuf *,
150 uint64_t *, int *);
151 static inline int cnmac_send(struct cnmac_softc *, struct mbuf *, int *);
152
153 static int cnmac_reset(struct cnmac_softc *);
154 static int cnmac_configure(struct cnmac_softc *);
155 static int cnmac_configure_common(struct cnmac_softc *);
156
157 static void cnmac_tick_free(void *);
158 static void cnmac_tick_misc(void *);
159
160 static inline int cnmac_recv_mbuf(struct cnmac_softc *, uint64_t *,
161 struct mbuf **);
162 static inline int cnmac_recv_check(struct cnmac_softc *, uint64_t);
163 static inline int cnmac_recv(struct cnmac_softc *, uint64_t *);
164 static int cnmac_intr(void *);
165
166 /* device parameters */
167 int cnmac_param_pko_cmd_w0_n2 = 1;
168
169 CFATTACH_DECL_NEW(cnmac, sizeof(struct cnmac_softc),
170 cnmac_match, cnmac_attach, NULL, NULL);
171
172 /* ---- buffer management */
173
174 static const struct cnmac_pool_param {
175 int poolno;
176 size_t size;
177 size_t nelems;
178 } cnmac_pool_params[] = {
179 #define _ENTRY(x) { OCTEON_POOL_NO_##x, OCTEON_POOL_SIZE_##x, OCTEON_POOL_NELEMS_##x }
180 _ENTRY(PKT),
181 _ENTRY(WQE),
182 _ENTRY(CMD),
183 _ENTRY(SG)
184 #undef _ENTRY
185 };
186 struct octfpa_buf *cnmac_pools[FPA_NPOOLS];
187 #define cnmac_fb_pkt cnmac_pools[OCTEON_POOL_NO_PKT]
188 #define cnmac_fb_wqe cnmac_pools[OCTEON_POOL_NO_WQE]
189 #define cnmac_fb_cmd cnmac_pools[OCTEON_POOL_NO_CMD]
190 #define cnmac_fb_sg cnmac_pools[OCTEON_POOL_NO_SG]
191
192 static int cnmac_npowgroups = 0;
193
194 static void
195 cnmac_buf_init(struct cnmac_softc *sc)
196 {
197 static int once;
198 int i;
199 const struct cnmac_pool_param *pp;
200 struct octfpa_buf *fb;
201
202 if (once == 1)
203 return;
204 once = 1;
205
206 for (i = 0; i < (int)__arraycount(cnmac_pool_params); i++) {
207 pp = &cnmac_pool_params[i];
208 octfpa_buf_init(pp->poolno, pp->size, pp->nelems, &fb);
209 cnmac_pools[i] = fb;
210 }
211 }
212
213 /* ---- autoconf */
214
215 static int
216 cnmac_match(device_t parent, struct cfdata *match, void *aux)
217 {
218 struct octgmx_attach_args *ga = aux;
219
220 if (strcmp(match->cf_name, ga->ga_name) != 0) {
221 return 0;
222 }
223 return 1;
224 }
225
226 static void
227 cnmac_attach(device_t parent, device_t self, void *aux)
228 {
229 struct cnmac_softc *sc = device_private(self);
230 struct octgmx_attach_args *ga = aux;
231 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
232 prop_dictionary_t dict;
233 prop_object_t clk;
234 uint8_t enaddr[ETHER_ADDR_LEN];
235
236 if (cnmac_npowgroups >= OCTEON_POW_GROUP_MAX) {
237 printf(": out of POW groups\n");
238 }
239
240 sc->sc_dev = self;
241 sc->sc_regt = ga->ga_regt;
242 sc->sc_port = ga->ga_portno;
243 sc->sc_port_type = ga->ga_port_type;
244 sc->sc_gmx = ga->ga_gmx;
245 sc->sc_gmx_port = ga->ga_gmx_port;
246 sc->sc_smi = ga->ga_smi;
247 sc->sc_powgroup = cnmac_npowgroups++;
248
249 if (sc->sc_port >= CVMSEG_LM_ETHER_COUNT) {
250 /*
251 * If we got here, increase CVMSEG_LM_ETHER_COUNT
252 * in octeonvar.h .
253 */
254 printf("%s: ERROR out of CVMSEG LM buffers\n",
255 device_xname(self));
256 return;
257 }
258
259 sc->sc_init_flag = 0;
260 /*
261 * XXXUEBAYASI
262 * Setting PIP_IP_OFFSET[OFFSET] to 8 causes panic ... why???
263 */
264 sc->sc_ip_offset = 0/* XXX */;
265
266 if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) <= MIPS_CN30XX) {
267 SET(sc->sc_quirks, CNMAC_QUIRKS_NO_PRE_ALIGN);
268 SET(sc->sc_quirks, CNMAC_QUIRKS_NO_RX_INBND);
269 }
270
271 cnmac_board_mac_addr(enaddr, sizeof(enaddr), sc);
272 printf("%s: Ethernet address %s\n", device_xname(self),
273 ether_sprintf(enaddr));
274
275 SIMPLEQ_INIT(&sc->sc_sendq);
276 sc->sc_soft_req_thresh = 15/* XXX */;
277 sc->sc_ext_callback_cnt = 0;
278
279 octgmx_stats_init(sc->sc_gmx_port);
280
281 callout_init(&sc->sc_tick_misc_ch, 0);
282 callout_setfunc(&sc->sc_tick_misc_ch, cnmac_tick_misc, sc);
283
284 callout_init(&sc->sc_tick_free_ch, 0);
285 callout_setfunc(&sc->sc_tick_free_ch, cnmac_tick_free, sc);
286
287 const int dv_unit = device_unit(self);
288 octfau_op_init(&sc->sc_fau_done,
289 OCTEON_CVMSEG_ETHER_OFFSET(dv_unit, csm_ether_fau_done),
290 OCT_FAU_REG_ADDR_END - (8 * (dv_unit + 1))/* XXX */);
291 octfau_op_set_8(&sc->sc_fau_done, 0);
292
293 cnmac_pip_init(sc);
294 cnmac_ipd_init(sc);
295 cnmac_pko_init(sc);
296
297 cnmac_configure_common(sc);
298
299 sc->sc_gmx_port->sc_ipd = sc->sc_ipd;
300 sc->sc_gmx_port->sc_port_mii = &sc->sc_mii;
301 sc->sc_gmx_port->sc_port_ec = &sc->sc_ethercom;
302 /* XXX */
303 sc->sc_gmx_port->sc_quirks = sc->sc_quirks;
304
305 /* XXX */
306 sc->sc_pow = &octpow_softc;
307
308 cnmac_mediainit(sc);
309
310 strncpy(ifp->if_xname, device_xname(self), sizeof(ifp->if_xname));
311 ifp->if_softc = sc;
312 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
313 ifp->if_ioctl = cnmac_ioctl;
314 ifp->if_start = cnmac_start;
315 ifp->if_watchdog = cnmac_watchdog;
316 ifp->if_init = cnmac_init;
317 ifp->if_stop = cnmac_stop;
318 IFQ_SET_MAXLEN(&ifp->if_snd, uimax(GATHER_QUEUE_SIZE, IFQ_MAXLEN));
319 IFQ_SET_READY(&ifp->if_snd);
320
321
322 ifp->if_capabilities =
323 #if 0 /* XXX: no tx checksum yet */
324 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
325 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
326 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
327 IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx |
328 IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx;
329 #else
330 IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
331 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
332 #endif
333
334 /* 802.1Q VLAN-sized frames are supported */
335 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
336
337 octgmx_set_mac_addr(sc->sc_gmx_port, enaddr);
338
339 if_attach(ifp);
340 ether_ifattach(ifp, enaddr);
341 octgmx_set_filter(sc->sc_gmx_port);
342
343 #if 1
344 cnmac_buf_init(sc);
345 #endif
346
347 sc->sc_ih = octeon_intr_establish(POW_WORKQ_IRQ(sc->sc_powgroup),
348 IPL_NET, cnmac_intr, sc);
349 if (sc->sc_ih == NULL)
350 panic("%s: could not set up interrupt", device_xname(self));
351
352 dict = device_properties(sc->sc_gmx->sc_dev);
353
354 clk = prop_dictionary_get(dict, "rgmii-tx");
355 if (clk)
356 sc->sc_gmx_port->sc_clk_tx_setting =
357 prop_number_signed_value(clk);
358 clk = prop_dictionary_get(dict, "rgmii-rx");
359 if (clk)
360 sc->sc_gmx_port->sc_clk_rx_setting =
361 prop_number_signed_value(clk);
362 }
363
364 /* ---- submodules */
365
366 /* XXX */
367 static void
368 cnmac_pip_init(struct cnmac_softc *sc)
369 {
370 struct octpip_attach_args pip_aa;
371
372 pip_aa.aa_port = sc->sc_port;
373 pip_aa.aa_regt = sc->sc_regt;
374 pip_aa.aa_tag_type = POW_TAG_TYPE_ORDERED/* XXX */;
375 pip_aa.aa_receive_group = sc->sc_powgroup;
376 pip_aa.aa_ip_offset = sc->sc_ip_offset;
377 octpip_init(&pip_aa, &sc->sc_pip);
378 octpip_port_config(sc->sc_pip);
379 }
380
381 /* XXX */
382 static void
383 cnmac_ipd_init(struct cnmac_softc *sc)
384 {
385 struct octipd_attach_args ipd_aa;
386
387 ipd_aa.aa_port = sc->sc_port;
388 ipd_aa.aa_regt = sc->sc_regt;
389 ipd_aa.aa_first_mbuff_skip = 184/* XXX */;
390 ipd_aa.aa_not_first_mbuff_skip = 0/* XXX */;
391 octipd_init(&ipd_aa, &sc->sc_ipd);
392 }
393
394 /* XXX */
395 static void
396 cnmac_pko_init(struct cnmac_softc *sc)
397 {
398 struct octpko_attach_args pko_aa;
399
400 pko_aa.aa_port = sc->sc_port;
401 pko_aa.aa_regt = sc->sc_regt;
402 pko_aa.aa_cmdptr = &sc->sc_cmdptr;
403 pko_aa.aa_cmd_buf_pool = OCTEON_POOL_NO_CMD;
404 pko_aa.aa_cmd_buf_size = OCTEON_POOL_NWORDS_CMD;
405 octpko_init(&pko_aa, &sc->sc_pko);
406 }
407
408 /* ---- XXX */
409
410 #define ADDR2UINT64(u, a) \
411 do { \
412 u = \
413 (((uint64_t)a[0] << 40) | ((uint64_t)a[1] << 32) | \
414 ((uint64_t)a[2] << 24) | ((uint64_t)a[3] << 16) | \
415 ((uint64_t)a[4] << 8) | ((uint64_t)a[5] << 0)); \
416 } while (0)
417 #define UINT642ADDR(a, u) \
418 do { \
419 a[0] = (uint8_t)((u) >> 40); a[1] = (uint8_t)((u) >> 32); \
420 a[2] = (uint8_t)((u) >> 24); a[3] = (uint8_t)((u) >> 16); \
421 a[4] = (uint8_t)((u) >> 8); a[5] = (uint8_t)((u) >> 0); \
422 } while (0)
423
424 static void
425 cnmac_board_mac_addr(uint8_t *enaddr, size_t size, struct cnmac_softc *sc)
426 {
427 prop_dictionary_t dict;
428 prop_data_t ea;
429
430 dict = device_properties(sc->sc_dev);
431 KASSERT(dict != NULL);
432 ea = prop_dictionary_get(dict, "mac-address");
433 KASSERT(ea != NULL);
434 memcpy(enaddr, prop_data_value(ea), size);
435 }
436
437 /* ---- media */
438
439 static int
440 cnmac_mii_readreg(device_t self, int phy_addr, int reg, uint16_t *val)
441 {
442 struct cnmac_softc *sc = device_private(self);
443
444 return octsmi_read(sc->sc_smi, phy_addr, reg, val);
445 }
446
447 static int
448 cnmac_mii_writereg(device_t self, int phy_addr, int reg, uint16_t val)
449 {
450 struct cnmac_softc *sc = device_private(self);
451
452 return octsmi_write(sc->sc_smi, phy_addr, reg, val);
453 }
454
455 static void
456 cnmac_mii_statchg(struct ifnet *ifp)
457 {
458 struct cnmac_softc *sc = ifp->if_softc;
459
460 octpko_port_enable(sc->sc_pko, 0);
461 octgmx_port_enable(sc->sc_gmx_port, 0);
462
463 cnmac_reset(sc);
464
465 if (ISSET(ifp->if_flags, IFF_RUNNING))
466 octgmx_set_filter(sc->sc_gmx_port);
467
468 octpko_port_enable(sc->sc_pko, 1);
469 octgmx_port_enable(sc->sc_gmx_port, 1);
470 }
471
472 static int
473 cnmac_mediainit(struct cnmac_softc *sc)
474 {
475 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
476 struct mii_data *mii = &sc->sc_mii;
477 prop_object_t phy;
478
479 mii->mii_ifp = ifp;
480 mii->mii_readreg = cnmac_mii_readreg;
481 mii->mii_writereg = cnmac_mii_writereg;
482 mii->mii_statchg = cnmac_mii_statchg;
483 sc->sc_ethercom.ec_mii = mii;
484
485 /* Initialize ifmedia structures. */
486 ifmedia_init(&mii->mii_media, 0, ether_mediachange, cnmac_mediastatus);
487
488 phy = prop_dictionary_get(device_properties(sc->sc_dev), "phy-addr");
489 KASSERT(phy != NULL);
490
491 mii_attach(sc->sc_dev, mii, 0xffffffff, prop_number_signed_value(phy),
492 MII_OFFSET_ANY, MIIF_DOPAUSE);
493
494 /* XXX XXX XXX */
495 if (LIST_FIRST(&mii->mii_phys) != NULL) {
496 /* XXX XXX XXX */
497 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
498 /* XXX XXX XXX */
499 } else {
500 /* XXX XXX XXX */
501 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE,
502 MII_MEDIA_NONE, NULL);
503 /* XXX XXX XXX */
504 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
505 /* XXX XXX XXX */
506 }
507 /* XXX XXX XXX */
508
509 return 0;
510 }
511
512 static void
513 cnmac_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
514 {
515 struct cnmac_softc *sc = ifp->if_softc;
516
517 mii_pollstat(&sc->sc_mii);
518
519 ifmr->ifm_status = sc->sc_mii.mii_media_status;
520 ifmr->ifm_active = sc->sc_mii.mii_media_active;
521 ifmr->ifm_active = (sc->sc_mii.mii_media_active & ~IFM_ETH_FMASK) |
522 sc->sc_gmx_port->sc_port_flowflags;
523 }
524
525 /* ---- send buffer garbage collection */
526
527 static inline void
528 cnmac_send_queue_flush_prefetch(struct cnmac_softc *sc)
529 {
530
531 KASSERT(sc->sc_prefetch == 0);
532 octfau_op_inc_fetch_8(&sc->sc_fau_done, 0);
533 sc->sc_prefetch = 1;
534 }
535
536 static inline void
537 cnmac_send_queue_flush_fetch(struct cnmac_softc *sc)
538 {
539
540 KASSERT(sc->sc_prefetch == 1);
541 sc->sc_hard_done_cnt = octfau_op_inc_read_8(&sc->sc_fau_done);
542 KASSERT(sc->sc_hard_done_cnt <= 0);
543 sc->sc_prefetch = 0;
544 }
545
546 static inline void
547 cnmac_send_queue_flush(struct cnmac_softc *sc)
548 {
549 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
550 const int64_t sent_count = sc->sc_hard_done_cnt;
551 int i;
552
553 KASSERT(sc->sc_flush == 0);
554 KASSERT(sent_count <= 0);
555
556 for (i = 0; i < 0 - sent_count; i++) {
557 struct mbuf *m;
558 uint64_t *gbuf;
559
560 cnmac_send_queue_del(sc, &m, &gbuf);
561
562 octfpa_buf_put(cnmac_fb_sg, gbuf);
563
564 m_freem(m);
565
566 CLR(ifp->if_flags, IFF_OACTIVE);
567 }
568
569 octfau_op_inc_fetch_8(&sc->sc_fau_done, i);
570 sc->sc_flush = i;
571 }
572
573 static inline void
574 cnmac_send_queue_flush_sync(struct cnmac_softc *sc)
575 {
576 if (sc->sc_flush == 0)
577 return;
578
579 KASSERT(sc->sc_flush > 0);
580
581 /* XXX XXX XXX */
582 octfau_op_inc_read_8(&sc->sc_fau_done);
583 sc->sc_soft_req_cnt -= sc->sc_flush;
584 KASSERT(sc->sc_soft_req_cnt >= 0);
585 /* XXX XXX XXX */
586
587 sc->sc_flush = 0;
588 }
589
590 static inline int
591 cnmac_send_queue_is_full(struct cnmac_softc *sc)
592 {
593 #ifdef CNMAC_SEND_QUEUE_CHECK
594 int64_t nofree_cnt;
595
596 nofree_cnt = sc->sc_soft_req_cnt + sc->sc_hard_done_cnt;
597
598 if (__predict_false(nofree_cnt == GATHER_QUEUE_SIZE - 1)) {
599 cnmac_send_queue_flush(sc);
600 cnmac_send_queue_flush_sync(sc);
601 return 1;
602 }
603
604 #endif
605 return 0;
606 }
607
608 static void
609 cnmac_send_queue_check_and_flush(struct cnmac_softc *sc)
610 {
611 int s;
612
613 /* XXX XXX XXX */
614 s = splnet();
615 if (sc->sc_soft_req_cnt > 0) {
616 cnmac_send_queue_flush_prefetch(sc);
617 cnmac_send_queue_flush_fetch(sc);
618 cnmac_send_queue_flush(sc);
619 cnmac_send_queue_flush_sync(sc);
620 }
621 splx(s);
622 /* XXX XXX XXX */
623 }
624
625 /*
626 * (Ab)use m_nextpkt and m_paddr to maintain mbuf chain and pointer to gather
627 * buffer. Other mbuf members may be used by m_freem(), so don't touch them!
628 */
629
630 struct _send_queue_entry {
631 union {
632 struct mbuf _sqe_s_mbuf;
633 struct {
634 char _sqe_s_entry_pad[offsetof(struct mbuf, m_nextpkt)];
635 SIMPLEQ_ENTRY(_send_queue_entry) _sqe_s_entry_entry;
636 } _sqe_s_entry;
637 struct {
638 char _sqe_s_gbuf_pad[offsetof(struct mbuf, m_paddr)];
639 uint64_t *_sqe_s_gbuf_gbuf;
640 } _sqe_s_gbuf;
641 } _sqe_u;
642 #define _sqe_entry _sqe_u._sqe_s_entry._sqe_s_entry_entry
643 #define _sqe_gbuf _sqe_u._sqe_s_gbuf._sqe_s_gbuf_gbuf
644 };
645
646 static inline void
647 cnmac_send_queue_add(struct cnmac_softc *sc, struct mbuf *m,
648 uint64_t *gbuf)
649 {
650 struct _send_queue_entry *sqe = (struct _send_queue_entry *)m;
651
652 sqe->_sqe_gbuf = gbuf;
653 SIMPLEQ_INSERT_TAIL(&sc->sc_sendq, sqe, _sqe_entry);
654
655 if ((m->m_flags & M_EXT) && m->m_ext.ext_free != NULL)
656 sc->sc_ext_callback_cnt++;
657 }
658
659 static inline void
660 cnmac_send_queue_del(struct cnmac_softc *sc, struct mbuf **rm, uint64_t **rgbuf)
661 {
662 struct _send_queue_entry *sqe;
663
664 sqe = SIMPLEQ_FIRST(&sc->sc_sendq);
665 KASSERT(sqe != NULL);
666 SIMPLEQ_REMOVE_HEAD(&sc->sc_sendq, _sqe_entry);
667
668 *rm = (void *)sqe;
669 *rgbuf = sqe->_sqe_gbuf;
670
671 if (((*rm)->m_flags & M_EXT) && (*rm)->m_ext.ext_free != NULL) {
672 sc->sc_ext_callback_cnt--;
673 KASSERT(sc->sc_ext_callback_cnt >= 0);
674 }
675 }
676
677 static inline int
678 cnmac_buf_free_work(struct cnmac_softc *sc, uint64_t *work)
679 {
680
681 /* XXX when jumbo frame */
682 if (ISSET(work[2], PIP_WQE_WORD2_IP_BUFS)) {
683 paddr_t addr;
684 paddr_t start_buffer;
685
686 addr = work[3] & PIP_WQE_WORD3_ADDR;
687 start_buffer = addr & ~(2048 - 1);
688
689 octfpa_buf_put_paddr(cnmac_fb_pkt, start_buffer);
690 }
691
692 octfpa_buf_put(cnmac_fb_wqe, work);
693
694 return 0;
695 }
696
697 static inline void
698 cnmac_buf_ext_free(struct mbuf *m, void *buf, size_t size, void *arg)
699 {
700 octfpa_buf_put(cnmac_fb_pkt, buf);
701
702 KASSERT(m != NULL);
703
704 pool_cache_put(mb_cache, m);
705 }
706
707 /* ---- ifnet interfaces */
708
709 static int
710 cnmac_ioctl(struct ifnet *ifp, u_long cmd, void *data)
711 {
712 struct cnmac_softc *sc = ifp->if_softc;
713 struct ifreq *ifr = (struct ifreq *)data;
714 int s, error;
715
716 s = splnet();
717 switch (cmd) {
718 case SIOCSIFMEDIA:
719 /* Flow control requires full-duplex mode. */
720 if (IFM_SUBTYPE(ifr->ifr_media) == IFM_AUTO ||
721 (ifr->ifr_media & IFM_FDX) == 0) {
722 ifr->ifr_media &= ~IFM_ETH_FMASK;
723 }
724 if (IFM_SUBTYPE(ifr->ifr_media) != IFM_AUTO) {
725 if ((ifr->ifr_media & IFM_ETH_FMASK) == IFM_FLOW) {
726 ifr->ifr_media |=
727 IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
728 }
729 sc->sc_gmx_port->sc_port_flowflags =
730 ifr->ifr_media & IFM_ETH_FMASK;
731 }
732 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
733 break;
734 default:
735 error = ether_ioctl(ifp, cmd, data);
736 break;
737 }
738
739 if (error == ENETRESET) {
740 if (ISSET(ifp->if_flags, IFF_RUNNING))
741 octgmx_set_filter(sc->sc_gmx_port);
742 error = 0;
743 }
744
745 cnmac_start(ifp);
746
747 splx(s);
748
749 return error;
750 }
751
752 /* ---- send (output) */
753
754 static inline uint64_t
755 cnmac_send_makecmd_w0(uint64_t fau0, uint64_t fau1, size_t len, int segs,
756 int ipoffp1)
757 {
758
759 return octpko_cmd_word0(
760 OCT_FAU_OP_SIZE_64, /* sz1 */
761 OCT_FAU_OP_SIZE_64, /* sz0 */
762 1, fau1, 1, fau0, /* s1, reg1, s0, reg0 */
763 0, /* le */
764 cnmac_param_pko_cmd_w0_n2, /* n2 */
765 1, 0, /* q, r */
766 (segs == 1) ? 0 : 1, /* g */
767 0, 0, 1, /* ipoffp1, ii, df */
768 segs, (int)len); /* segs, totalbytes */
769 }
770
771 static inline uint64_t
772 cnmac_send_makecmd_w1(int size, paddr_t addr)
773 {
774
775 return octpko_cmd_word1(
776 0, 0, /* i, back */
777 OCTEON_POOL_NO_SG, /* pool */
778 size, addr); /* size, addr */
779 }
780
781 static inline int
782 cnmac_send_makecmd_gbuf(struct cnmac_softc *sc, struct mbuf *m0, uint64_t *gbuf,
783 int *rsegs)
784 {
785 struct mbuf *m;
786 int segs = 0;
787 uintptr_t laddr, rlen, nlen;
788
789 for (m = m0; m != NULL; m = m->m_next) {
790
791 if (__predict_false(m->m_len == 0))
792 continue;
793
794 /* Aligned 4k */
795 laddr = (uintptr_t)m->m_data & (PAGE_SIZE - 1);
796
797 if (laddr + m->m_len > PAGE_SIZE) {
798 /* XXX XXX XXX */
799 rlen = PAGE_SIZE - laddr;
800 nlen = m->m_len - rlen;
801 *(gbuf + segs) = cnmac_send_makecmd_w1(rlen,
802 kvtophys((vaddr_t)m->m_data));
803 segs++;
804 if (segs > 63) {
805 return 1;
806 }
807 /* XXX XXX XXX */
808 } else {
809 rlen = 0;
810 nlen = m->m_len;
811 }
812
813 *(gbuf + segs) = cnmac_send_makecmd_w1(nlen,
814 kvtophys((vaddr_t)(m->m_data + rlen)));
815 segs++;
816 if (segs > 63) {
817 return 1;
818 }
819 }
820
821 KASSERT(m == NULL);
822
823 *rsegs = segs;
824
825 return 0;
826 }
827
828 static inline int
829 cnmac_send_makecmd(struct cnmac_softc *sc, struct mbuf *m,
830 uint64_t *gbuf, uint64_t *rpko_cmd_w0, uint64_t *rpko_cmd_w1)
831 {
832 uint64_t pko_cmd_w0, pko_cmd_w1;
833 int ipoffp1;
834 int segs;
835 int result = 0;
836
837 if (cnmac_send_makecmd_gbuf(sc, m, gbuf, &segs)) {
838 log(LOG_WARNING, "%s: there are a lot of number of segments"
839 " of transmission data", device_xname(sc->sc_dev));
840 result = 1;
841 goto done;
842 }
843
844 /* Get the IP packet offset for TCP/UDP checksum offloading. */
845 ipoffp1 = (m->m_pkthdr.csum_flags & (M_CSUM_TCPv4 | M_CSUM_UDPv4))
846 ? (ETHER_HDR_LEN + 1) : 0;
847
848 /*
849 * segs == 1 -> link mode (single continuous buffer)
850 * WORD1[size] is number of bytes pointed by segment
851 *
852 * segs > 1 -> gather mode (scatter-gather buffer)
853 * WORD1[size] is number of segments
854 */
855 pko_cmd_w0 = cnmac_send_makecmd_w0(sc->sc_fau_done.fd_regno,
856 0, m->m_pkthdr.len, segs, ipoffp1);
857 if (segs == 1) {
858 pko_cmd_w1 = cnmac_send_makecmd_w1(
859 m->m_pkthdr.len, kvtophys((vaddr_t)m->m_data));
860 } else {
861 #ifdef __mips_n32
862 KASSERT(MIPS_KSEG0_P(gbuf));
863 pko_cmd_w1 = cnmac_send_makecmd_w1(segs,
864 MIPS_KSEG0_TO_PHYS(gbuf));
865 #else
866 pko_cmd_w1 = cnmac_send_makecmd_w1(segs,
867 MIPS_XKPHYS_TO_PHYS(gbuf));
868 #endif
869 }
870
871 *rpko_cmd_w0 = pko_cmd_w0;
872 *rpko_cmd_w1 = pko_cmd_w1;
873
874 done:
875 return result;
876 }
877
878 static inline int
879 cnmac_send_cmd(struct cnmac_softc *sc, uint64_t pko_cmd_w0,
880 uint64_t pko_cmd_w1, int *pwdc)
881 {
882 uint64_t *cmdptr;
883 int result = 0;
884
885 #ifdef __mips_n32
886 KASSERT((sc->sc_cmdptr.cmdptr & ~MIPS_PHYS_MASK) == 0);
887 cmdptr = (uint64_t *)MIPS_PHYS_TO_KSEG0(sc->sc_cmdptr.cmdptr);
888 #else
889 cmdptr = (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(sc->sc_cmdptr.cmdptr);
890 #endif
891 cmdptr += sc->sc_cmdptr.cmdptr_idx;
892
893 KASSERT(cmdptr != NULL);
894
895 *cmdptr++ = pko_cmd_w0;
896 *cmdptr++ = pko_cmd_w1;
897
898 KASSERT(sc->sc_cmdptr.cmdptr_idx + 2 <= FPA_COMMAND_BUFFER_POOL_NWORDS - 1);
899
900 if (sc->sc_cmdptr.cmdptr_idx + 2 == FPA_COMMAND_BUFFER_POOL_NWORDS - 1) {
901 paddr_t buf;
902
903 buf = octfpa_buf_get_paddr(cnmac_fb_cmd);
904 if (buf == 0) {
905 log(LOG_WARNING,
906 "%s: can not allocate command buffer from free pool allocator\n",
907 device_xname(sc->sc_dev));
908 result = 1;
909 goto done;
910 }
911 *cmdptr++ = buf;
912 sc->sc_cmdptr.cmdptr = (uint64_t)buf;
913 sc->sc_cmdptr.cmdptr_idx = 0;
914 } else {
915 sc->sc_cmdptr.cmdptr_idx += 2;
916 }
917
918 *pwdc += 2;
919
920 done:
921 return result;
922 }
923
924 static inline int
925 cnmac_send_buf(struct cnmac_softc *sc, struct mbuf *m, uint64_t *gbuf,
926 int *pwdc)
927 {
928 int result = 0, error;
929 uint64_t pko_cmd_w0, pko_cmd_w1;
930
931 error = cnmac_send_makecmd(sc, m, gbuf, &pko_cmd_w0, &pko_cmd_w1);
932 if (error != 0) {
933 /* Already logging */
934 result = error;
935 goto done;
936 }
937
938 error = cnmac_send_cmd(sc, pko_cmd_w0, pko_cmd_w1, pwdc);
939 if (error != 0) {
940 /* Already logging */
941 result = error;
942 }
943
944 done:
945 return result;
946 }
947
948 static inline int
949 cnmac_send(struct cnmac_softc *sc, struct mbuf *m, int *pwdc)
950 {
951 paddr_t gaddr = 0;
952 uint64_t *gbuf = NULL;
953 int result = 0, error;
954
955 gaddr = octfpa_buf_get_paddr(cnmac_fb_sg);
956 if (gaddr == 0) {
957 log(LOG_WARNING, "%s: can not allocate gather buffer from "
958 "free pool allocator\n", device_xname(sc->sc_dev));
959 result = 1;
960 goto done;
961 }
962
963 #ifdef __mips_n32
964 KASSERT((gaddr & ~MIPS_PHYS_MASK) == 0);
965 gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_KSEG0(gaddr);
966 #else
967 gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_XKPHYS_CACHED(gaddr);
968 #endif
969
970 KASSERT(gbuf != NULL);
971
972 error = cnmac_send_buf(sc, m, gbuf, pwdc);
973 if (error != 0) {
974 /* Already logging */
975 octfpa_buf_put_paddr(cnmac_fb_sg, gaddr);
976 result = error;
977 goto done;
978 }
979
980 cnmac_send_queue_add(sc, m, gbuf);
981
982 done:
983 return result;
984 }
985
986 static void
987 cnmac_start(struct ifnet *ifp)
988 {
989 struct cnmac_softc *sc = ifp->if_softc;
990 struct mbuf *m;
991 int wdc = 0;
992
993 /*
994 * Performance tuning
995 * pre-send iobdma request
996 */
997 cnmac_send_queue_flush_prefetch(sc);
998
999 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1000 goto last;
1001
1002 if (__predict_false(!octgmx_link_status(sc->sc_gmx_port)))
1003 goto last;
1004
1005 for (;;) {
1006 IFQ_POLL(&ifp->if_snd, m);
1007 if (__predict_false(m == NULL))
1008 break;
1009
1010 /* XXX XXX XXX */
1011 cnmac_send_queue_flush_fetch(sc);
1012
1013 /*
1014 * If no free send buffer is available, free all the sent
1015 * buffers and bail out.
1016 */
1017 if (cnmac_send_queue_is_full(sc)) {
1018 SET(ifp->if_flags, IFF_OACTIVE);
1019 if (wdc > 0)
1020 octpko_op_doorbell_write(sc->sc_port,
1021 sc->sc_port, wdc);
1022 callout_schedule(&sc->sc_tick_free_ch, 1);
1023 return;
1024 }
1025 /* XXX XXX XXX */
1026
1027 IFQ_DEQUEUE(&ifp->if_snd, m);
1028
1029 bpf_mtap(ifp, m, BPF_D_OUT);
1030
1031 /* XXX XXX XXX */
1032 if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh)
1033 cnmac_send_queue_flush(sc);
1034 if (cnmac_send(sc, m, &wdc)) {
1035 IF_DROP(&ifp->if_snd);
1036 m_freem(m);
1037 log(LOG_WARNING,
1038 "%s: failed in the transmission of the packet\n",
1039 device_xname(sc->sc_dev));
1040 } else
1041 sc->sc_soft_req_cnt++;
1042
1043 if (sc->sc_flush)
1044 cnmac_send_queue_flush_sync(sc);
1045 /* XXX XXX XXX */
1046
1047 /* Send next iobdma request */
1048 cnmac_send_queue_flush_prefetch(sc);
1049 }
1050
1051 if (wdc > 0)
1052 octpko_op_doorbell_write(sc->sc_port, sc->sc_port, wdc);
1053
1054 last:
1055 cnmac_send_queue_flush_fetch(sc);
1056 callout_schedule(&sc->sc_tick_free_ch, 1);
1057 }
1058
1059 static void
1060 cnmac_watchdog(struct ifnet *ifp)
1061 {
1062 struct cnmac_softc *sc = ifp->if_softc;
1063
1064 printf("%s: device timeout\n", device_xname(sc->sc_dev));
1065
1066 cnmac_configure(sc);
1067
1068 SET(ifp->if_flags, IFF_RUNNING);
1069 CLR(ifp->if_flags, IFF_OACTIVE);
1070 ifp->if_timer = 0;
1071
1072 cnmac_start(ifp);
1073 }
1074
1075 static int
1076 cnmac_init(struct ifnet *ifp)
1077 {
1078 struct cnmac_softc *sc = ifp->if_softc;
1079
1080 /* XXX don't disable commonly used parts!!! XXX */
1081 if (sc->sc_init_flag == 0) {
1082 /* Cancel any pending I/O. */
1083 cnmac_stop(ifp, 0);
1084
1085 /* Initialize the device */
1086 cnmac_configure(sc);
1087
1088 octpko_enable(sc->sc_pko);
1089 octipd_enable(sc->sc_ipd);
1090
1091 sc->sc_init_flag = 1;
1092 } else {
1093 octgmx_port_enable(sc->sc_gmx_port, 1);
1094 }
1095 mii_ifmedia_change(&sc->sc_mii);
1096
1097 octgmx_set_filter(sc->sc_gmx_port);
1098
1099 callout_schedule(&sc->sc_tick_misc_ch, hz);
1100 callout_schedule(&sc->sc_tick_free_ch, hz);
1101
1102 SET(ifp->if_flags, IFF_RUNNING);
1103 CLR(ifp->if_flags, IFF_OACTIVE);
1104
1105 return 0;
1106 }
1107
1108 static void
1109 cnmac_stop(struct ifnet *ifp, int disable)
1110 {
1111 struct cnmac_softc *sc = ifp->if_softc;
1112
1113 callout_stop(&sc->sc_tick_misc_ch);
1114 callout_stop(&sc->sc_tick_free_ch);
1115
1116 mii_down(&sc->sc_mii);
1117
1118 octgmx_port_enable(sc->sc_gmx_port, 0);
1119
1120 /* Mark the interface as down and cancel the watchdog timer. */
1121 CLR(ifp->if_flags, IFF_RUNNING | IFF_OACTIVE);
1122 ifp->if_timer = 0;
1123 }
1124
1125 /* ---- misc */
1126
1127 static int
1128 cnmac_reset(struct cnmac_softc *sc)
1129 {
1130 octgmx_reset_speed(sc->sc_gmx_port);
1131 octgmx_reset_flowctl(sc->sc_gmx_port);
1132 octgmx_reset_timing(sc->sc_gmx_port);
1133
1134 return 0;
1135 }
1136
1137 static int
1138 cnmac_configure(struct cnmac_softc *sc)
1139 {
1140 octgmx_port_enable(sc->sc_gmx_port, 0);
1141
1142 cnmac_reset(sc);
1143
1144 cnmac_configure_common(sc);
1145
1146 octpko_port_config(sc->sc_pko);
1147 octpko_port_enable(sc->sc_pko, 1);
1148 octpow_config(sc->sc_pow, sc->sc_powgroup);
1149
1150 octgmx_tx_stats_rd_clr(sc->sc_gmx_port, 1);
1151 octgmx_rx_stats_rd_clr(sc->sc_gmx_port, 1);
1152
1153 octgmx_port_enable(sc->sc_gmx_port, 1);
1154
1155 return 0;
1156 }
1157
1158 static int
1159 cnmac_configure_common(struct cnmac_softc *sc)
1160 {
1161 static int once;
1162
1163 if (once == 1)
1164 return 0;
1165 once = 1;
1166
1167 octipd_config(sc->sc_ipd);
1168 octpko_config(sc->sc_pko);
1169
1170 return 0;
1171 }
1172
1173 /* ---- receive (input) */
1174
1175 static inline int
1176 cnmac_recv_mbuf(struct cnmac_softc *sc, uint64_t *work, struct mbuf **rm)
1177 {
1178 struct mbuf *m;
1179 vaddr_t addr;
1180 vaddr_t ext_buf;
1181 size_t ext_size;
1182 uint64_t word1 = work[1];
1183 uint64_t word2 = work[2];
1184 uint64_t word3 = work[3];
1185
1186 MGETHDR(m, M_NOWAIT, MT_DATA);
1187 if (m == NULL)
1188 return 1;
1189
1190 octfpa_buf_put(cnmac_fb_wqe, work);
1191
1192 if (__SHIFTOUT(word2, PIP_WQE_WORD2_IP_BUFS) != 1)
1193 panic("%s: expected one buffer, got %" PRId64, __func__,
1194 __SHIFTOUT(word2, PIP_WQE_WORD2_IP_BUFS));
1195
1196
1197 #ifdef __mips_n32
1198 KASSERT((word3 & ~MIPS_PHYS_MASK) == 0);
1199 addr = MIPS_PHYS_TO_KSEG0(word3 & PIP_WQE_WORD3_ADDR);
1200 #else
1201 addr = MIPS_PHYS_TO_XKPHYS_CACHED(word3 & PIP_WQE_WORD3_ADDR);
1202 #endif
1203
1204 ext_size = OCTEON_POOL_SIZE_PKT;
1205 ext_buf = addr & ~(ext_size - 1);
1206 MEXTADD(m, ext_buf, ext_size, 0, cnmac_buf_ext_free, NULL);
1207
1208 m->m_data = (void *)addr;
1209 m->m_len = m->m_pkthdr.len = (word1 & PIP_WQE_WORD1_LEN) >> 48;
1210 m_set_rcvif(m, &sc->sc_ethercom.ec_if);
1211
1212 /* Not readonly buffer */
1213 m->m_flags |= M_EXT_RW;
1214
1215 *rm = m;
1216
1217 KASSERT(*rm != NULL);
1218
1219 return 0;
1220 }
1221
1222 static inline int
1223 cnmac_recv_check(struct cnmac_softc *sc, uint64_t word2)
1224 {
1225 static struct timeval rxerr_log_interval = { 0, 2500000 };
1226 uint64_t opecode;
1227
1228 if (__predict_true(!ISSET(word2, PIP_WQE_WORD2_NOIP_RE)))
1229 return 0;
1230
1231 opecode = word2 & PIP_WQE_WORD2_NOIP_OPECODE;
1232 if ((sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) &&
1233 ratecheck(&sc->sc_rxerr_log_last, &rxerr_log_interval))
1234 log(LOG_DEBUG, "%s: rx error (%"PRId64")\n",
1235 device_xname(sc->sc_dev), opecode);
1236
1237 /* This error is harmless */
1238 if (opecode == PIP_WQE_WORD2_RE_OPCODE_OVRRUN)
1239 return 0;
1240
1241 return 1;
1242 }
1243
1244 static inline int
1245 cnmac_recv(struct cnmac_softc *sc, uint64_t *work)
1246 {
1247 struct ifnet *ifp;
1248 struct mbuf *m;
1249 uint64_t word2;
1250
1251 KASSERT(sc != NULL);
1252 KASSERT(work != NULL);
1253
1254 word2 = work[2];
1255 ifp = &sc->sc_ethercom.ec_if;
1256
1257 KASSERT(ifp != NULL);
1258
1259 if (!ISSET(ifp->if_flags, IFF_RUNNING))
1260 goto drop;
1261
1262 if (__predict_false(cnmac_recv_check(sc, word2) != 0)) {
1263 if_statinc(ifp, if_ierrors);
1264 goto drop;
1265 }
1266
1267 if (__predict_false(cnmac_recv_mbuf(sc, work, &m) != 0)) {
1268 if_statinc(ifp, if_ierrors);
1269 goto drop;
1270 }
1271
1272 /* work[0] .. work[3] may not be valid any more */
1273
1274 KASSERT(m != NULL);
1275
1276 octipd_offload(word2, m->m_data, &m->m_pkthdr.csum_flags);
1277
1278 if_percpuq_enqueue(ifp->if_percpuq, m);
1279
1280 return 0;
1281
1282 drop:
1283 cnmac_buf_free_work(sc, work);
1284 return 1;
1285 }
1286
1287 static int
1288 cnmac_intr(void *arg)
1289 {
1290 struct cnmac_softc *sc = arg;
1291 uint64_t *work;
1292 uint64_t wqmask = __BIT(sc->sc_powgroup);
1293 uint32_t coreid = 0; /* XXX octeon_get_coreid() */
1294 uint32_t port;
1295
1296 _POW_WR8(sc->sc_pow, POW_PP_GRP_MSK_OFFSET(coreid), wqmask);
1297
1298 octpow_tag_sw_wait();
1299 octpow_work_request_async(OCTEON_CVMSEG_OFFSET(csm_pow_intr),
1300 POW_NO_WAIT);
1301
1302 for (;;) {
1303 work = (uint64_t *)octpow_work_response_async(
1304 OCTEON_CVMSEG_OFFSET(csm_pow_intr));
1305 if (work == NULL)
1306 break;
1307
1308 octpow_tag_sw_wait();
1309 octpow_work_request_async(OCTEON_CVMSEG_OFFSET(csm_pow_intr),
1310 POW_NO_WAIT);
1311
1312 port = __SHIFTOUT(work[1], PIP_WQE_WORD1_IPRT);
1313 if (port != sc->sc_port) {
1314 printf("%s: unexpected wqe port %u, should be %u\n",
1315 device_xname(sc->sc_dev), port, sc->sc_port);
1316 goto wqe_error;
1317 }
1318
1319 (void)cnmac_recv(sc, work);
1320
1321 cnmac_send_queue_check_and_flush(sc);
1322 }
1323
1324 _POW_WR8(sc->sc_pow, POW_WQ_INT_OFFSET, wqmask);
1325
1326 return 1;
1327
1328 wqe_error:
1329 printf("word0: 0x%016" PRIx64 "\n", work[0]);
1330 printf("word1: 0x%016" PRIx64 "\n", work[1]);
1331 printf("word2: 0x%016" PRIx64 "\n", work[2]);
1332 printf("word3: 0x%016" PRIx64 "\n", work[3]);
1333 panic("wqe_error");
1334 }
1335
1336 /* ---- tick */
1337
1338 /*
1339 * cnmac_tick_free
1340 *
1341 * => garbage collect send gather buffer / mbuf
1342 * => called at softclock
1343 */
1344 static void
1345 cnmac_tick_free(void *arg)
1346 {
1347 struct cnmac_softc *sc = arg;
1348 int timo;
1349
1350 cnmac_send_queue_check_and_flush(sc);
1351
1352 timo = (sc->sc_ext_callback_cnt > 0) ? 1 : hz;
1353 callout_schedule(&sc->sc_tick_free_ch, timo);
1354 }
1355
1356 /*
1357 * cnmac_tick_misc
1358 *
1359 * => collect statistics
1360 * => check link status
1361 * => called at softclock
1362 */
1363 static void
1364 cnmac_tick_misc(void *arg)
1365 {
1366 struct cnmac_softc *sc = arg;
1367 struct ifnet *ifp;
1368 int s;
1369
1370 s = splnet();
1371
1372 ifp = &sc->sc_ethercom.ec_if;
1373
1374 octgmx_stats(sc->sc_gmx_port);
1375 octpip_stats(sc->sc_pip, ifp, sc->sc_port);
1376 mii_tick(&sc->sc_mii);
1377
1378 splx(s);
1379
1380 callout_schedule(&sc->sc_tick_misc_ch, hz);
1381 }
1382