octeon_fpareg.h revision 1.1
1 /* $NetBSD: octeon_fpareg.h,v 1.1 2015/04/29 08:32:01 hikaru Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * FPA Registers 31 */ 32 33 #ifndef _OCTEON_FPAREG_H_ 34 #define _OCTEON_FPAREG_H_ 35 36 /* ---- register offsets */ 37 38 #define FPA_INT_SUM 0x0001180028000040ULL 39 #define FPA_INT_ENB 0x0001180028000048ULL 40 #define FPA_CTL_STATUS 0x0001180028000050ULL 41 #define FPA_QUE0_AVAILABLE 0x0001180028000098ULL 42 #define FPA_QUE1_AVAILABLE 0x00011800280000a0ULL 43 #define FPA_QUE2_AVAILABLE 0x00011800280000a8ULL 44 #define FPA_QUE3_AVAILABLE 0x00011800280000b0ULL 45 #define FPA_QUE4_AVAILABLE 0x00011800280000b8ULL 46 #define FPA_QUE5_AVAILABLE 0x00011800280000c0ULL 47 #define FPA_QUE6_AVAILABLE 0x00011800280000c8ULL 48 #define FPA_QUE7_AVAILABLE 0x00011800280000d0ULL 49 #define FPA_WART_CTL 0x00011800280000d8ULL 50 #define FPA_WART_STATUS 0x00011800280000e0ULL 51 #define FPA_BIST_STATUS 0x00011800280000e8ULL 52 #define FPA_QUE0_PAGE_INDEX 0x00011800280000f0ULL 53 #define FPA_QUE1_PAGE_INDEX 0x00011800280000f8ULL 54 #define FPA_QUE2_PAGE_INDEX 0x0001180028000100ULL 55 #define FPA_QUE3_PAGE_INDEX 0x0001180028000108ULL 56 #define FPA_QUE4_PAGE_INDEX 0x0001180028000110ULL 57 #define FPA_QUE5_PAGE_INDEX 0x0001180028000118ULL 58 #define FPA_QUE6_PAGE_INDEX 0x0001180028000120ULL 59 #define FPA_QUE7_PAGE_INDEX 0x0001180028000128ULL 60 #define FPA_QUE_EXP 0x0001180028000130ULL 61 #define FPA_QUE_ACT 0x0001180028000138ULL 62 63 /* ---- register bit definitions */ 64 65 #define FPA_INT_SUM_XXX_63_28 UINT64_C(0xfffffffff0000000) 66 #define FPA_INT_SUM_Q7_PERR UINT64_C(0x0000000008000000) 67 #define FPA_INT_SUM_Q7_COFF UINT64_C(0x0000000004000000) 68 #define FPA_INT_SUM_Q7_UND UINT64_C(0x0000000002000000) 69 #define FPA_INT_SUM_Q6_PERR UINT64_C(0x0000000001000000) 70 #define FPA_INT_SUM_Q6_COFF UINT64_C(0x0000000000800000) 71 #define FPA_INT_SUM_Q6_UND UINT64_C(0x0000000000400000) 72 #define FPA_INT_SUM_Q5_PERR UINT64_C(0x0000000000200000) 73 #define FPA_INT_SUM_Q5_COFF UINT64_C(0x0000000000100000) 74 #define FPA_INT_SUM_Q5_UND UINT64_C(0x0000000000080000) 75 #define FPA_INT_SUM_Q4_PERR UINT64_C(0x0000000000040000) 76 #define FPA_INT_SUM_Q4_COFF UINT64_C(0x0000000000020000) 77 #define FPA_INT_SUM_Q4_UND UINT64_C(0x0000000000010000) 78 #define FPA_INT_SUM_Q3_PERR UINT64_C(0x0000000000008000) 79 #define FPA_INT_SUM_Q3_COFF UINT64_C(0x0000000000004000) 80 #define FPA_INT_SUM_Q3_UND UINT64_C(0x0000000000002000) 81 #define FPA_INT_SUM_Q2_PERR UINT64_C(0x0000000000001000) 82 #define FPA_INT_SUM_Q2_COFF UINT64_C(0x0000000000000800) 83 #define FPA_INT_SUM_Q2_UND UINT64_C(0x0000000000000400) 84 #define FPA_INT_SUM_Q1_PERR UINT64_C(0x0000000000000200) 85 #define FPA_INT_SUM_Q1_COFF UINT64_C(0x0000000000000100) 86 #define FPA_INT_SUM_Q1_UND UINT64_C(0x0000000000000080) 87 #define FPA_INT_SUM_Q0_PERR UINT64_C(0x0000000000000040) 88 #define FPA_INT_SUM_Q0_COFF UINT64_C(0x0000000000000020) 89 #define FPA_INT_SUM_Q0_UND UINT64_C(0x0000000000000010) 90 #define FPA_INT_SUM_FED1_DBE UINT64_C(0x0000000000000008) 91 #define FPA_INT_SUM_FED1_SBE UINT64_C(0x0000000000000004) 92 #define FPA_INT_SUM_FED0_DBE UINT64_C(0x0000000000000002) 93 #define FPA_INT_SUM_FED0_SBE UINT64_C(0x0000000000000001) 94 95 #define FPA_INT_ENB_XXX_63_28 UINT64_C(0xfffffffff0000000) 96 #define FPA_INT_ENB_Q7_PERR UINT64_C(0x0000000008000000) 97 #define FPA_INT_ENB_Q7_COFF UINT64_C(0x0000000004000000) 98 #define FPA_INT_ENB_Q7_UND UINT64_C(0x0000000002000000) 99 #define FPA_INT_ENB_Q6_PERR UINT64_C(0x0000000001000000) 100 #define FPA_INT_ENB_Q6_COFF UINT64_C(0x0000000000800000) 101 #define FPA_INT_ENB_Q6_UND UINT64_C(0x0000000000400000) 102 #define FPA_INT_ENB_Q5_PERR UINT64_C(0x0000000000200000) 103 #define FPA_INT_ENB_Q5_COFF UINT64_C(0x0000000000100000) 104 #define FPA_INT_ENB_Q5_UND UINT64_C(0x0000000000080000) 105 #define FPA_INT_ENB_Q4_PERR UINT64_C(0x0000000000040000) 106 #define FPA_INT_ENB_Q4_COFF UINT64_C(0x0000000000020000) 107 #define FPA_INT_ENB_Q4_UND UINT64_C(0x0000000000010000) 108 #define FPA_INT_ENB_Q3_PERR UINT64_C(0x0000000000008000) 109 #define FPA_INT_ENB_Q3_COFF UINT64_C(0x0000000000004000) 110 #define FPA_INT_ENB_Q3_UND UINT64_C(0x0000000000002000) 111 #define FPA_INT_ENB_Q2_PERR UINT64_C(0x0000000000001000) 112 #define FPA_INT_ENB_Q2_COFF UINT64_C(0x0000000000000800) 113 #define FPA_INT_ENB_Q2_UND UINT64_C(0x0000000000000400) 114 #define FPA_INT_ENB_Q1_PERR UINT64_C(0x0000000000000200) 115 #define FPA_INT_ENB_Q1_COFF UINT64_C(0x0000000000000100) 116 #define FPA_INT_ENB_Q1_UND UINT64_C(0x0000000000000080) 117 #define FPA_INT_ENB_Q0_PERR UINT64_C(0x0000000000000040) 118 #define FPA_INT_ENB_Q0_COFF UINT64_C(0x0000000000000020) 119 #define FPA_INT_ENB_Q0_UND UINT64_C(0x0000000000000010) 120 #define FPA_INT_ENB_FED1_DBE UINT64_C(0x0000000000000008) 121 #define FPA_INT_ENB_FED1_SBE UINT64_C(0x0000000000000004) 122 #define FPA_INT_ENB_FED0_DBE UINT64_C(0x0000000000000002) 123 #define FPA_INT_ENB_FED0_SBE UINT64_C(0x0000000000000001) 124 125 #define FPA_CTL_STATUS_XXX_63_18 UINT64_C(0xfffffffffffc0000) 126 #define FPA_CTL_STATUS_RESET UINT64_C(0x0000000000020000) 127 #define FPA_CTL_STATUS_USE_LDT UINT64_C(0x0000000000010000) 128 #define FPA_CTL_STATUS_USE_STT UINT64_C(0x0000000000008000) 129 #define FPA_CTL_STATUS_ENB UINT64_C(0x0000000000004000) 130 #define FPA_CTL_STATUS_MEM1_ERR UINT64_C(0x0000000000003f80) 131 #define FPA_CTL_STATUS_MEM0_ERR UINT64_C(0x000000000000007f) 132 133 #define FPA_QUEX_AVAILABLE_XXX_63_29 UINT64_C(0xffffffffe0000000) 134 #define FPA_QUEX_AVAILABLE_QUE_SIZ UINT64_C(0x000000001fffffff) 135 136 #define FPA_WART_CTL_XXX_63_16 UINT64_C(0xffffffffffff0000) 137 #define FPA_WART_CTL_CTL UINT64_C(0x000000000000ffff) 138 139 #define FPA_WART_STATUS_XXX_63_32 UINT64_C(0xffffffff00000000) 140 #define FPA_WART_STATUS_STATUS UINT64_C(0x00000000ffffffff) 141 142 #define FPA_BIST_STATUS_XXX_63_5 UINT64_C(0xffffffffffffffe0) 143 #define FPA_BIST_STATUS_FRD UINT64_C(0x0000000000000010) 144 #define FPA_BIST_STATUS_FPF0 UINT64_C(0x0000000000000008) 145 #define FPA_BIST_STATUS_FPF1 UINT64_C(0x0000000000000004) 146 #define FPA_BIST_STATUS_FFR UINT64_C(0x0000000000000002) 147 #define FPA_BIST_STATUS_FDR UINT64_C(0x0000000000000001) 148 149 #define FPA_QUEX_PAGE_INDEX_XXX_63_25 UINT64_C(0xfffffffffe000000) 150 #define FPA_QUEX_PAGE_INDEX_PG_NUM UINT64_C(0x0000000001ffffff) 151 152 #define FPA_QUE_EXP_XXX_63_32 UINT64_C(0xffffffff00000000) 153 #define FPA_QUE_EXP_XXX_31_29 UINT64_C(0x00000000e0000000) 154 #define FPA_QUE_EXP_EXP_QUE UINT64_C(0x000000001c000000) 155 #define FPA_QUE_EXP_EXP_INDX UINT64_C(0x0000000003ffffff) 156 157 #define FPA_QUE_ACT_XXX_63_32 UINT64_C(0xffffffff00000000) 158 #define FPA_QUE_ACT_XXX_31_29 UINT64_C(0x00000000e0000000) 159 #define FPA_QUE_ACT_ACT_QUE UINT64_C(0x000000001c000000) 160 #define FPA_QUE_ACT_ACT_INDX UINT64_C(0x0000000003ffffff) 161 162 /* ---- snprintb(9) */ 163 164 #define FPA_INT_SUM_BITS \ 165 "\177" /* new format */ \ 166 "\020" /* hex display */ \ 167 "\020" /* %016x format */ \ 168 "b\x1b" "Q7_PERR\0" \ 169 "b\x1a" "Q7_COFF\0" \ 170 "b\x19" "Q7_UND\0" \ 171 "b\x18" "Q6_PERR\0" \ 172 "b\x17" "Q6_COFF\0" \ 173 "b\x16" "Q6_UND\0" \ 174 "b\x15" "Q5_PERR\0" \ 175 "b\x14" "Q5_COFF\0" \ 176 "b\x13" "Q5_UND\0" \ 177 "b\x12" "Q4_PERR\0" \ 178 "b\x11" "Q4_COFF\0" \ 179 "b\x10" "Q4_UND\0" \ 180 "b\x0f" "Q3_PERR\0" \ 181 "b\x0e" "Q3_COFF\0" \ 182 "b\x0d" "Q3_UND\0" \ 183 "b\x0c" "Q2_PERR\0" \ 184 "b\x0b" "Q2_COFF\0" \ 185 "b\x0a" "Q2_UND\0" \ 186 "b\x09" "Q1_PERR\0" \ 187 "b\x08" "Q1_COFF\0" \ 188 "b\x07" "Q1_UND\0" \ 189 "b\x06" "Q0_PERR\0" \ 190 "b\x05" "Q0_COFF\0" \ 191 "b\x04" "Q0_UND\0" \ 192 "b\x03" "FED1_DBE\0" \ 193 "b\x02" "FED1_SBE\0" \ 194 "b\x01" "FED0_DBE\0" \ 195 "b\x00" "FED0_SBE\0" 196 197 #define FPA_INT_ENB_BITS \ 198 "\177" /* new format */ \ 199 "\020" /* hex display */ \ 200 "\020" /* %016x format */ \ 201 "b\x1b" "Q7_PERR\0" \ 202 "b\x1a" "Q7_COFF\0" \ 203 "b\x19" "Q7_UND\0" \ 204 "b\x18" "Q6_PERR\0" \ 205 "b\x17" "Q6_COFF\0" \ 206 "b\x16" "Q6_UND\0" \ 207 "b\x15" "Q5_PERR\0" \ 208 "b\x14" "Q5_COFF\0" \ 209 "b\x13" "Q5_UND\0" \ 210 "b\x12" "Q4_PERR\0" \ 211 "b\x11" "Q4_COFF\0" \ 212 "b\x10" "Q4_UND\0" \ 213 "b\x0f" "Q3_PERR\0" \ 214 "b\x0e" "Q3_COFF\0" \ 215 "b\x0d" "Q3_UND\0" \ 216 "b\x0c" "Q2_PERR\0" \ 217 "b\x0b" "Q2_COFF\0" \ 218 "b\x0a" "Q2_UND\0" \ 219 "b\x09" "Q1_PERR\0" \ 220 "b\x08" "Q1_COFF\0" \ 221 "b\x07" "Q1_UND\0" \ 222 "b\x06" "Q0_PERR\0" \ 223 "b\x05" "Q0_COFF\0" \ 224 "b\x04" "Q0_UND\0" \ 225 "b\x03" "FED1_DBE\0" \ 226 "b\x02" "FED1_SBE\0" \ 227 "b\x01" "FED0_DBE\0" \ 228 "b\x00" "FED0_SBE\0" 229 230 #define FPA_CTL_STATUS_BITS \ 231 "\177" /* new format */ \ 232 "\020" /* hex display */ \ 233 "\020" /* %016x format */ \ 234 "b\x11" "RESET\0" \ 235 "b\x10" "USE_LDT\0" \ 236 "b\x0f" "USE_STT\0" \ 237 "b\x0e" "ENB\0" \ 238 "f\x07\x07" "MEM1_ERR\0" \ 239 "f\x00\x07" "MEM0_ERR\0" 240 241 #define FPA_QUEX_AVAILABLE_BITS \ 242 "\177" /* new format */ \ 243 "\020" /* hex display */ \ 244 "\020" /* %016x format */ \ 245 "f\x00\x1d" "QUE_SIZ\0" 246 #define FPA_QUE0_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 247 #define FPA_QUE1_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 248 #define FPA_QUE2_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 249 #define FPA_QUE3_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 250 #define FPA_QUE4_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 251 #define FPA_QUE5_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 252 #define FPA_QUE6_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 253 #define FPA_QUE7_AVAILABLE_BITS FPA_QUEX_AVAILABLE_BITS 254 255 #define FPA_WART_CTL_BITS \ 256 "\177" /* new format */ \ 257 "\020" /* hex display */ \ 258 "\020" /* %016x format */ \ 259 "f\x00\x10" "CTL\0" 260 261 #define FPA_WART_STATUS_BITS \ 262 "\177" /* new format */ \ 263 "\020" /* hex display */ \ 264 "\020" /* %016x format */ \ 265 "f\x00\x20" "STATUS\0" 266 267 #define FPA_BIST_STATUS_BITS \ 268 "\177" /* new format */ \ 269 "\020" /* hex display */ \ 270 "\020" /* %016x format */ \ 271 "b\x04" "FRD\0" \ 272 "b\x03" "FPF0\0" \ 273 "b\x02" "FPF1\0" \ 274 "b\x01" "FFR\0" \ 275 "b\x00" "FDR\0" 276 277 #define FPA_QUEX_PAGE_INDEX_BITS \ 278 "\177" /* new format */ \ 279 "\020" /* hex display */ \ 280 "\020" /* %016x format */ \ 281 "f\x00\x19" "PG_NUM\0" 282 #define FPA_QUE0_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 283 #define FPA_QUE1_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 284 #define FPA_QUE2_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 285 #define FPA_QUE3_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 286 #define FPA_QUE4_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 287 #define FPA_QUE5_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 288 #define FPA_QUE6_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 289 #define FPA_QUE7_PAGE_INDEX_BITS FPA_QUEX_PAGE_INDEX_BITS 290 291 #define FPA_QUE_EXP_BITS \ 292 "\177" /* new format */ \ 293 "\020" /* hex display */ \ 294 "\020" /* %016x format */ \ 295 "f\x1a\x03" "EXP_QUE\0" \ 296 "f\x00\x1a" "EXP_INDX\0" 297 298 #define FPA_QUE_ACT_BITS \ 299 "\177" /* new format */ \ 300 "\020" /* hex display */ \ 301 "\020" /* %016x format */ \ 302 "f\x1a\x03" "ACT_QUE\0" \ 303 "f\x00\x1a" "ACT_INDX\0" 304 305 /* ---- operations */ 306 307 /* 308 * Free Pool Unit Operations 309 */ 310 311 #define FPA_MAJORDID 0x5 /* 0b00101 */ 312 313 #define FPA_OPS_MAJORDID UINT64_C(0x0000f80000000000) 314 #define FPA_OPS_MAJORDID_SHIFT 43 315 #define FPA_OPS_SUBDID UINT64_C(0x0000070000000000) 316 #define FPA_OPS_SUBDID_SHIFT 40 317 #define FPA_OPS_XXX_39_0 UINT64_C(0x000000ffffffffff) 318 319 /* Load Operations */ 320 321 #define FPA_OPS_LOAD_1 UINT64_C(0x0001000000000000) 322 #define FPA_OPS_LOAD_MAJORDID UINT64_C(0x0000f80000000000) 323 #define FPA_OPS_LOAD_SUBDID UINT64_C(0x0000070000000000) 324 #define FPA_OPS_LOAD_XXX_39_0 UINT64_C(0x000000ffffffffff) 325 326 /* IOBDMA Operations */ 327 328 #define FPA_OPS_IOBDMA_SRCADDR UINT64_C(0xff00000000000000) 329 #define FPA_OPS_IOBDMA_LEN UINT64_C(0x00ff000000000000) 330 #define FPA_OPS_IOBDMA_LEN_SHIFT 48 331 #define FPA_OPS_IOBDMA_MAJORDID UINT64_C(0x0000f80000000000) 332 #define FPA_OPS_IOBDMA_SUBDIR UINT64_C(0x0000070000000000) 333 #define FPA_OPS_IOBDMA_XXX_39_0 UINT64_C(0x000000ffffffffff) 334 335 /* Store Operations */ 336 337 #define FPA_OPS_STORE_1 UINT64_C(0x0001000000000000) 338 #define FPA_OPS_STORE_MAJORDID UINT64_C(0x0000f80000000000) 339 #define FPA_OPS_STORE_SUBDID UINT64_C(0x0000070000000000) 340 #define FPA_OPS_STORE_XXX_39_0 UINT64_C(0x000000ffffffffff) 341 342 #define FPA_OPS_STORE_DATA_XXX_63_9 UINT64_C(0xfffffffffffffe00) 343 #define FPA_OPS_STORE_DATA_DWBCOUNT UINT64_C(0x00000000000001ff) 344 345 /* ---- bus_space(9) */ 346 347 #define FPA_BASE 0x0001180028000000ULL 348 #define FPA_SIZE 0x0200 349 350 #define FPA_INT_SUM_OFFSET 0x0040 351 #define FPA_INT_ENB_OFFSET 0x0048 352 #define FPA_CTL_STATUS_OFFSET 0x0050 353 #define FPA_QUE0_AVAILABLE_OFFSET 0x0098 354 #define FPA_QUE1_AVAILABLE_OFFSET 0x00a0 355 #define FPA_QUE2_AVAILABLE_OFFSET 0x00a8 356 #define FPA_QUE3_AVAILABLE_OFFSET 0x00b0 357 #define FPA_QUE4_AVAILABLE_OFFSET 0x00b8 358 #define FPA_QUE5_AVAILABLE_OFFSET 0x00c0 359 #define FPA_QUE6_AVAILABLE_OFFSET 0x00c8 360 #define FPA_QUE7_AVAILABLE_OFFSET 0x00d0 361 #define FPA_WART_CTL_OFFSET 0x00d8 362 #define FPA_WART_STATUS_OFFSET 0x00e0 363 #define FPA_BIST_STATUS_OFFSET 0x00e8 364 #define FPA_QUE0_PAGE_INDEX_OFFSET 0x00f0 365 #define FPA_QUE1_PAGE_INDEX_OFFSET 0x00f8 366 #define FPA_QUE2_PAGE_INDEX_OFFSET 0x0100 367 #define FPA_QUE3_PAGE_INDEX_OFFSET 0x0108 368 #define FPA_QUE4_PAGE_INDEX_OFFSET 0x0110 369 #define FPA_QUE5_PAGE_INDEX_OFFSET 0x0118 370 #define FPA_QUE6_PAGE_INDEX_OFFSET 0x0120 371 #define FPA_QUE7_PAGE_INDEX_OFFSET 0x0128 372 #define FPA_QUE_EXP_OFFSET 0x0130 373 #define FPA_QUE_ACT_OFFSET 0x0138 374 375 #endif /* _OCTEON_FPAREG_H_ */ 376
Indexes created Sun Sep 28 16:09:52 GMT 2025