octeon_ipd.c revision 1.3 1 1.3 simonb /* $NetBSD: octeon_ipd.c,v 1.3 2020/05/31 06:27:06 simonb Exp $ */
2 1.1 hikaru
3 1.1 hikaru /*
4 1.1 hikaru * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 1.1 hikaru * All rights reserved.
6 1.1 hikaru *
7 1.1 hikaru * Redistribution and use in source and binary forms, with or without
8 1.1 hikaru * modification, are permitted provided that the following conditions
9 1.1 hikaru * are met:
10 1.1 hikaru * 1. Redistributions of source code must retain the above copyright
11 1.1 hikaru * notice, this list of conditions and the following disclaimer.
12 1.1 hikaru * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 hikaru * notice, this list of conditions and the following disclaimer in the
14 1.1 hikaru * documentation and/or other materials provided with the distribution.
15 1.1 hikaru *
16 1.1 hikaru * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.1 hikaru * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 hikaru * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 hikaru * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.1 hikaru * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 hikaru * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 hikaru * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 hikaru * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 hikaru * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 hikaru * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 hikaru * SUCH DAMAGE.
27 1.1 hikaru */
28 1.1 hikaru
29 1.1 hikaru #include <sys/cdefs.h>
30 1.3 simonb __KERNEL_RCSID(0, "$NetBSD: octeon_ipd.c,v 1.3 2020/05/31 06:27:06 simonb Exp $");
31 1.1 hikaru
32 1.1 hikaru #include "opt_octeon.h"
33 1.1 hikaru
34 1.1 hikaru #include "opt_octeon.h"
35 1.1 hikaru
36 1.1 hikaru #include <sys/param.h>
37 1.1 hikaru #include <sys/systm.h>
38 1.1 hikaru #include <sys/malloc.h>
39 1.1 hikaru #include <sys/mbuf.h>
40 1.1 hikaru #include <mips/locore.h>
41 1.1 hikaru #include <mips/cavium/octeonvar.h>
42 1.1 hikaru #include <mips/cavium/dev/octeon_ciureg.h>
43 1.1 hikaru #include <mips/cavium/dev/octeon_fpavar.h>
44 1.1 hikaru #include <mips/cavium/dev/octeon_pipreg.h>
45 1.1 hikaru #include <mips/cavium/dev/octeon_ipdreg.h>
46 1.1 hikaru #include <mips/cavium/dev/octeon_ipdvar.h>
47 1.1 hikaru
48 1.1 hikaru #include <netinet/in.h>
49 1.1 hikaru #include <netinet/in_systm.h>
50 1.1 hikaru #include <netinet/ip.h>
51 1.1 hikaru
52 1.1 hikaru #define IP_OFFSET(data, word2) \
53 1.1 hikaru ((uintptr_t)(data) + (uintptr_t)((word2 & PIP_WQE_WORD2_IP_OFFSET) >> PIP_WQE_WORD2_IP_OFFSET_SHIFT))
54 1.1 hikaru
55 1.3 simonb #ifdef CNMAC_DEBUG
56 1.3 simonb void octipd_intr_evcnt_attach(struct octipd_softc *);
57 1.3 simonb void octipd_intr_rml(void *);
58 1.3 simonb int octipd_intr_drop(void *);
59 1.1 hikaru
60 1.3 simonb void octipd_dump(void);
61 1.1 hikaru
62 1.3 simonb static void *octipd_intr_drop_ih;
63 1.3 simonb struct evcnt octipd_intr_drop_evcnt =
64 1.1 hikaru EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "octeon",
65 1.1 hikaru "ipd drop intr");
66 1.3 simonb EVCNT_ATTACH_STATIC(octipd_intr_drop_evcnt);
67 1.1 hikaru
68 1.3 simonb struct octipd_softc *__octipd_softc[3/* XXX */];
69 1.1 hikaru #endif
70 1.1 hikaru
71 1.1 hikaru /* XXX */
72 1.1 hikaru void
73 1.3 simonb octipd_init(struct octipd_attach_args *aa, struct octipd_softc **rsc)
74 1.1 hikaru {
75 1.3 simonb struct octipd_softc *sc;
76 1.1 hikaru int status;
77 1.1 hikaru
78 1.1 hikaru sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
79 1.1 hikaru if (sc == NULL)
80 1.1 hikaru panic("can't allocate memory: %s", __func__);
81 1.1 hikaru
82 1.1 hikaru sc->sc_port = aa->aa_port;
83 1.1 hikaru sc->sc_regt = aa->aa_regt;
84 1.1 hikaru sc->sc_first_mbuff_skip = aa->aa_first_mbuff_skip;
85 1.1 hikaru sc->sc_not_first_mbuff_skip = aa->aa_not_first_mbuff_skip;
86 1.1 hikaru
87 1.1 hikaru status = bus_space_map(sc->sc_regt, IPD_BASE, IPD_SIZE, 0,
88 1.1 hikaru &sc->sc_regh);
89 1.1 hikaru if (status != 0)
90 1.1 hikaru panic("can't map %s space", "ipd register");
91 1.1 hikaru
92 1.1 hikaru *rsc = sc;
93 1.1 hikaru
94 1.3 simonb #ifdef CNMAC_DEBUG
95 1.3 simonb octipd_int_enable(sc, 1);
96 1.3 simonb octipd_intr_evcnt_attach(sc);
97 1.3 simonb if (octipd_intr_drop_ih == NULL)
98 1.3 simonb octipd_intr_drop_ih = octeon_intr_establish(
99 1.2 matt ffs64(CIU_INTX_SUM0_IPD_DRP) - 1, IPL_NET,
100 1.3 simonb octipd_intr_drop, NULL);
101 1.3 simonb __octipd_softc[sc->sc_port] = sc;
102 1.3 simonb #endif /* CNMAC_DEBUG */
103 1.1 hikaru }
104 1.1 hikaru
105 1.1 hikaru #define _IPD_RD8(sc, off) \
106 1.1 hikaru bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off))
107 1.1 hikaru #define _IPD_WR8(sc, off, v) \
108 1.1 hikaru bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v))
109 1.1 hikaru
110 1.1 hikaru int
111 1.3 simonb octipd_enable(struct octipd_softc *sc)
112 1.1 hikaru {
113 1.1 hikaru uint64_t ctl_status;
114 1.1 hikaru
115 1.1 hikaru ctl_status = _IPD_RD8(sc, IPD_CTL_STATUS_OFFSET);
116 1.1 hikaru SET(ctl_status, IPD_CTL_STATUS_IPD_EN);
117 1.1 hikaru _IPD_WR8(sc, IPD_CTL_STATUS_OFFSET, ctl_status);
118 1.1 hikaru
119 1.1 hikaru return 0;
120 1.1 hikaru }
121 1.1 hikaru
122 1.1 hikaru int
123 1.3 simonb octipd_config(struct octipd_softc *sc)
124 1.1 hikaru {
125 1.1 hikaru uint64_t first_mbuff_skip;
126 1.1 hikaru uint64_t not_first_mbuff_skip;
127 1.1 hikaru uint64_t packet_mbuff_size;
128 1.1 hikaru uint64_t first_next_ptr_back;
129 1.1 hikaru uint64_t second_next_ptr_back;
130 1.1 hikaru uint64_t sqe_fpa_queue;
131 1.1 hikaru uint64_t ctl_status;
132 1.1 hikaru
133 1.1 hikaru /* XXX XXX XXX */
134 1.1 hikaru first_mbuff_skip = 0;
135 1.1 hikaru SET(first_mbuff_skip, (sc->sc_first_mbuff_skip / 8) & IPD_1ST_MBUFF_SKIP_SZ);
136 1.1 hikaru _IPD_WR8(sc, IPD_1ST_MBUFF_SKIP_OFFSET, first_mbuff_skip);
137 1.1 hikaru /* XXX XXX XXX */
138 1.1 hikaru
139 1.1 hikaru /* XXX XXX XXX */
140 1.1 hikaru not_first_mbuff_skip = 0;
141 1.1 hikaru SET(not_first_mbuff_skip, (sc->sc_not_first_mbuff_skip / 8) &
142 1.1 hikaru IPD_NOT_1ST_MBUFF_SKIP_SZ);
143 1.1 hikaru _IPD_WR8(sc, IPD_NOT_1ST_MBUFF_SKIP_OFFSET, not_first_mbuff_skip);
144 1.1 hikaru /* XXX XXX XXX */
145 1.1 hikaru
146 1.1 hikaru packet_mbuff_size = 0;
147 1.1 hikaru SET(packet_mbuff_size, (FPA_RECV_PKT_POOL_SIZE / 8) &
148 1.1 hikaru IPD_PACKET_MBUFF_SIZE_MB_SIZE);
149 1.1 hikaru _IPD_WR8(sc, IPD_PACKET_MBUFF_SIZE_OFFSET, packet_mbuff_size);
150 1.1 hikaru
151 1.1 hikaru first_next_ptr_back = 0;
152 1.1 hikaru SET(first_next_ptr_back, (sc->sc_first_mbuff_skip / 128) & IPD_1ST_NEXT_PTR_BACK_BACK);
153 1.1 hikaru _IPD_WR8(sc, IPD_1ST_NEXT_PTR_BACK_OFFSET, first_next_ptr_back);
154 1.1 hikaru
155 1.1 hikaru second_next_ptr_back = 0;
156 1.1 hikaru SET(second_next_ptr_back, (sc->sc_not_first_mbuff_skip / 128) &
157 1.1 hikaru IPD_2ND_NEXT_PTR_BACK_BACK);
158 1.1 hikaru _IPD_WR8(sc, IPD_2ND_NEXT_PTR_BACK_OFFSET, second_next_ptr_back);
159 1.1 hikaru
160 1.1 hikaru sqe_fpa_queue = 0;
161 1.1 hikaru SET(sqe_fpa_queue, FPA_WQE_POOL & IPD_WQE_FPA_QUEUE_WQE_QUE);
162 1.1 hikaru _IPD_WR8(sc, IPD_WQE_FPA_QUEUE_OFFSET, sqe_fpa_queue);
163 1.1 hikaru
164 1.1 hikaru ctl_status = _IPD_RD8(sc, IPD_CTL_STATUS_OFFSET);
165 1.1 hikaru CLR(ctl_status, IPD_CTL_STATUS_OPC_MODE);
166 1.1 hikaru SET(ctl_status, IPD_CTL_STATUS_OPC_MODE_ALL);
167 1.1 hikaru SET(ctl_status, IPD_CTL_STATUS_PBP_EN);
168 1.1 hikaru
169 1.1 hikaru /*
170 1.1 hikaru * XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
171 1.1 hikaru * from SDK
172 1.1 hikaru * SET(ctl_status, IPD_CTL_STATUS_LEN_M8);
173 1.1 hikaru * XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
174 1.1 hikaru */
175 1.1 hikaru
176 1.1 hikaru _IPD_WR8(sc, IPD_CTL_STATUS_OFFSET, ctl_status);
177 1.1 hikaru
178 1.1 hikaru return 0;
179 1.1 hikaru }
180 1.1 hikaru
181 1.1 hikaru /*
182 1.1 hikaru * octeon work queue entry offload
183 1.1 hikaru * L3 error & L4 error
184 1.1 hikaru */
185 1.1 hikaru void
186 1.3 simonb octipd_offload(uint64_t word2, void *data, int *rcflags)
187 1.1 hikaru {
188 1.1 hikaru int cflags;
189 1.1 hikaru
190 1.1 hikaru if (ISSET(word2, PIP_WQE_WORD2_IP_NI))
191 1.1 hikaru return;
192 1.1 hikaru
193 1.1 hikaru cflags = 0;
194 1.1 hikaru
195 1.1 hikaru if (!ISSET(word2, PIP_WQE_WORD2_IP_V6))
196 1.1 hikaru SET(cflags, M_CSUM_IPv4);
197 1.1 hikaru
198 1.1 hikaru if (ISSET(word2, PIP_WQE_WORD2_IP_TU)) {
199 1.1 hikaru SET(cflags,
200 1.1 hikaru !ISSET(word2, PIP_WQE_WORD2_IP_V6) ?
201 1.1 hikaru (M_CSUM_TCPv4 | M_CSUM_UDPv4) :
202 1.1 hikaru (M_CSUM_TCPv6 | M_CSUM_UDPv6));
203 1.1 hikaru }
204 1.1 hikaru
205 1.1 hikaru /* check L3 (IP) error */
206 1.1 hikaru if (ISSET(word2, PIP_WQE_WORD2_IP_IE)) {
207 1.1 hikaru struct ip *ip;
208 1.1 hikaru
209 1.1 hikaru switch (word2 & PIP_WQE_WORD2_IP_OPECODE) {
210 1.1 hikaru case IPD_WQE_L3_V4_CSUM_ERR:
211 1.1 hikaru /* CN31XX Pass 1.1 Errata */
212 1.1 hikaru ip = (struct ip *)(IP_OFFSET(data, word2));
213 1.1 hikaru if (ip->ip_hl == 5)
214 1.1 hikaru SET(cflags, M_CSUM_IPv4_BAD);
215 1.1 hikaru break;
216 1.1 hikaru default:
217 1.1 hikaru break;
218 1.1 hikaru }
219 1.1 hikaru }
220 1.1 hikaru
221 1.1 hikaru /* check L4 (UDP / TCP) error */
222 1.1 hikaru if (ISSET(word2, PIP_WQE_WORD2_IP_LE)) {
223 1.1 hikaru switch (word2 & PIP_WQE_WORD2_IP_OPECODE) {
224 1.1 hikaru case IPD_WQE_L4_CSUM_ERR:
225 1.1 hikaru SET(cflags, M_CSUM_TCP_UDP_BAD);
226 1.1 hikaru break;
227 1.1 hikaru default:
228 1.1 hikaru break;
229 1.1 hikaru }
230 1.1 hikaru }
231 1.1 hikaru
232 1.1 hikaru *rcflags = cflags;
233 1.1 hikaru }
234 1.1 hikaru
235 1.1 hikaru int
236 1.3 simonb octipd_red(struct octipd_softc *sc, uint64_t pass_thr, uint64_t drop_thr)
237 1.1 hikaru {
238 1.3 simonb #if defined(CNMAC_IPD_RED)
239 1.1 hikaru /*
240 1.1 hikaru * no receive problem workaround.
241 1.1 hikaru * if not set IPD RED pramaters,
242 1.1 hikaru * may become unable to receive packet
243 1.1 hikaru * on media mismatch environment
244 1.1 hikaru * of self media 100-half duplex.
245 1.1 hikaru */
246 1.1 hikaru uint64_t red_marks;
247 1.1 hikaru uint64_t red_param;
248 1.1 hikaru uint64_t red_port;
249 1.1 hikaru
250 1.1 hikaru red_marks = drop_thr << 32 /* XXX */ | pass_thr;
251 1.1 hikaru _IPD_WR8(sc, IPD_QOS0_RED_MARKS_OFFSET, red_marks);
252 1.1 hikaru _IPD_WR8(sc, IPD_QOS1_RED_MARKS_OFFSET, red_marks);
253 1.1 hikaru _IPD_WR8(sc, IPD_QOS2_RED_MARKS_OFFSET, red_marks);
254 1.1 hikaru _IPD_WR8(sc, IPD_QOS3_RED_MARKS_OFFSET, red_marks);
255 1.1 hikaru _IPD_WR8(sc, IPD_QOS4_RED_MARKS_OFFSET, red_marks);
256 1.1 hikaru _IPD_WR8(sc, IPD_QOS5_RED_MARKS_OFFSET, red_marks);
257 1.1 hikaru _IPD_WR8(sc, IPD_QOS6_RED_MARKS_OFFSET, red_marks);
258 1.1 hikaru _IPD_WR8(sc, IPD_QOS7_RED_MARKS_OFFSET, red_marks);
259 1.1 hikaru red_param =
260 1.1 hikaru ((255ull << 24 /* XXX */) / (pass_thr - drop_thr)) |
261 1.1 hikaru 1ull << 32 /* XXX */ |
262 1.1 hikaru 255ull << 40 /* XXX */ |
263 1.1 hikaru 1ull << 48 /* XXX */;
264 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE0_PARAM_OFFSET, red_param);
265 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE1_PARAM_OFFSET, red_param);
266 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE2_PARAM_OFFSET, red_param);
267 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE3_PARAM_OFFSET, red_param);
268 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE4_PARAM_OFFSET, red_param);
269 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE5_PARAM_OFFSET, red_param);
270 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE6_PARAM_OFFSET, red_param);
271 1.1 hikaru _IPD_WR8(sc, IPD_RED_QUE7_PARAM_OFFSET, red_param);
272 1.1 hikaru
273 1.1 hikaru _IPD_WR8(sc, IPD_BP_PRT_RED_END_OFFSET, 0);
274 1.1 hikaru
275 1.1 hikaru red_port = 0xfffffffffull |
276 1.1 hikaru 10000ull << 36 /* XXX */ |
277 1.1 hikaru 10000ull << 50 /* XXX */;
278 1.1 hikaru _IPD_WR8(sc, IPD_RED_PORT_ENABLE_OFFSET, red_port);
279 1.1 hikaru #endif
280 1.1 hikaru
281 1.1 hikaru return 0;
282 1.1 hikaru }
283 1.1 hikaru
284 1.1 hikaru void
285 1.3 simonb octipd_sub_port_fcs(struct octipd_softc *sc, int enable)
286 1.1 hikaru {
287 1.1 hikaru uint64_t sub_port_fcs;
288 1.1 hikaru
289 1.1 hikaru sub_port_fcs = _IPD_RD8(sc, IPD_SUB_PORT_FCS_OFFSET);
290 1.1 hikaru if (enable == 0)
291 1.1 hikaru CLR(sub_port_fcs, 1 << sc->sc_port);
292 1.1 hikaru else
293 1.1 hikaru SET(sub_port_fcs, 1 << sc->sc_port);
294 1.1 hikaru _IPD_WR8(sc, IPD_SUB_PORT_FCS_OFFSET, sub_port_fcs);
295 1.1 hikaru }
296 1.1 hikaru
297 1.3 simonb #ifdef CNMAC_DEBUG
298 1.3 simonb int octipd_intr_rml_verbose;
299 1.3 simonb struct evcnt octipd_intr_evcnt;
300 1.1 hikaru
301 1.3 simonb static const struct octeon_evcnt_entry octipd_intr_evcnt_entries[] = {
302 1.1 hikaru #define _ENTRY(name, type, parent, descr) \
303 1.3 simonb OCTEON_EVCNT_ENTRY(struct octipd_softc, name, type, parent, descr)
304 1.1 hikaru _ENTRY(ipdbpsub, MISC, NULL, "ipd backpressure subtract"),
305 1.1 hikaru _ENTRY(ipdprcpar3, MISC, NULL, "ipd parity error 127:96"),
306 1.1 hikaru _ENTRY(ipdprcpar2, MISC, NULL, "ipd parity error 95:64"),
307 1.1 hikaru _ENTRY(ipdprcpar1, MISC, NULL, "ipd parity error 63:32"),
308 1.1 hikaru _ENTRY(ipdprcpar0, MISC, NULL, "ipd parity error 31:0"),
309 1.1 hikaru #undef _ENTRY
310 1.1 hikaru };
311 1.1 hikaru
312 1.1 hikaru void
313 1.3 simonb octipd_intr_evcnt_attach(struct octipd_softc *sc)
314 1.1 hikaru {
315 1.3 simonb OCTEON_EVCNT_ATTACH_EVCNTS(sc, octipd_intr_evcnt_entries, "ipd0");
316 1.1 hikaru }
317 1.1 hikaru
318 1.1 hikaru void
319 1.3 simonb octipd_intr_rml(void *arg)
320 1.1 hikaru {
321 1.1 hikaru int i;
322 1.1 hikaru
323 1.3 simonb octipd_intr_evcnt.ev_count++;
324 1.1 hikaru for (i = 0; i < 3/* XXX */; i++) {
325 1.3 simonb struct octipd_softc *sc;
326 1.1 hikaru uint64_t reg;
327 1.1 hikaru
328 1.3 simonb sc = __octipd_softc[i];
329 1.1 hikaru KASSERT(sc != NULL);
330 1.3 simonb reg = octipd_int_summary(sc);
331 1.3 simonb if (octipd_intr_rml_verbose)
332 1.1 hikaru printf("%s: IPD_INT_SUM=0x%016" PRIx64 "\n", __func__, reg);
333 1.1 hikaru if (reg & IPD_INT_SUM_BP_SUB)
334 1.1 hikaru OCTEON_EVCNT_INC(sc, ipdbpsub);
335 1.1 hikaru if (reg & IPD_INT_SUM_PRC_PAR3)
336 1.1 hikaru OCTEON_EVCNT_INC(sc, ipdprcpar3);
337 1.1 hikaru if (reg & IPD_INT_SUM_PRC_PAR2)
338 1.1 hikaru OCTEON_EVCNT_INC(sc, ipdprcpar2);
339 1.1 hikaru if (reg & IPD_INT_SUM_PRC_PAR1)
340 1.1 hikaru OCTEON_EVCNT_INC(sc, ipdprcpar1);
341 1.1 hikaru if (reg & IPD_INT_SUM_PRC_PAR0)
342 1.1 hikaru OCTEON_EVCNT_INC(sc, ipdprcpar0);
343 1.1 hikaru }
344 1.1 hikaru }
345 1.1 hikaru
346 1.1 hikaru void
347 1.3 simonb octipd_int_enable(struct octipd_softc *sc, int enable)
348 1.1 hikaru {
349 1.1 hikaru uint64_t ipd_int_xxx = 0;
350 1.1 hikaru
351 1.1 hikaru SET(ipd_int_xxx,
352 1.1 hikaru IPD_INT_SUM_BP_SUB |
353 1.1 hikaru IPD_INT_SUM_PRC_PAR3 |
354 1.1 hikaru IPD_INT_SUM_PRC_PAR2 |
355 1.1 hikaru IPD_INT_SUM_PRC_PAR1 |
356 1.1 hikaru IPD_INT_SUM_PRC_PAR0);
357 1.1 hikaru _IPD_WR8(sc, IPD_INT_SUM_OFFSET, ipd_int_xxx);
358 1.1 hikaru _IPD_WR8(sc, IPD_INT_ENB_OFFSET, enable ? ipd_int_xxx : 0);
359 1.1 hikaru }
360 1.1 hikaru
361 1.1 hikaru uint64_t
362 1.3 simonb octipd_int_summary(struct octipd_softc *sc)
363 1.1 hikaru {
364 1.1 hikaru uint64_t summary;
365 1.1 hikaru
366 1.1 hikaru summary = _IPD_RD8(sc, IPD_INT_SUM_OFFSET);
367 1.1 hikaru _IPD_WR8(sc, IPD_INT_SUM_OFFSET, summary);
368 1.1 hikaru return summary;
369 1.1 hikaru }
370 1.1 hikaru
371 1.1 hikaru int
372 1.3 simonb octipd_intr_drop(void *arg)
373 1.1 hikaru {
374 1.1 hikaru octeon_write_csr(CIU_INT0_SUM0, CIU_INTX_SUM0_IPD_DRP);
375 1.3 simonb octipd_intr_drop_evcnt.ev_count++;
376 1.1 hikaru return (1);
377 1.1 hikaru }
378 1.1 hikaru
379 1.1 hikaru #define _ENTRY(x) { #x, x##_BITS, x##_OFFSET }
380 1.1 hikaru
381 1.3 simonb struct octipd_dump_reg {
382 1.1 hikaru const char *name;
383 1.1 hikaru const char *format;
384 1.1 hikaru size_t offset;
385 1.1 hikaru };
386 1.1 hikaru
387 1.3 simonb static const struct octipd_dump_reg octipd_dump_regs[] = {
388 1.1 hikaru _ENTRY(IPD_1ST_MBUFF_SKIP),
389 1.1 hikaru _ENTRY(IPD_NOT_1ST_MBUFF_SKIP),
390 1.1 hikaru _ENTRY(IPD_PACKET_MBUFF_SIZE),
391 1.1 hikaru _ENTRY(IPD_CTL_STATUS),
392 1.1 hikaru _ENTRY(IPD_WQE_FPA_QUEUE),
393 1.1 hikaru _ENTRY(IPD_PORT0_BP_PAGE_CNT),
394 1.1 hikaru _ENTRY(IPD_PORT1_BP_PAGE_CNT),
395 1.1 hikaru _ENTRY(IPD_PORT2_BP_PAGE_CNT),
396 1.1 hikaru _ENTRY(IPD_PORT32_BP_PAGE_CNT),
397 1.1 hikaru _ENTRY(IPD_SUB_PORT_BP_PAGE_CNT),
398 1.1 hikaru _ENTRY(IPD_1ST_NEXT_PTR_BACK),
399 1.1 hikaru _ENTRY(IPD_2ND_NEXT_PTR_BACK),
400 1.1 hikaru _ENTRY(IPD_INT_ENB),
401 1.1 hikaru _ENTRY(IPD_INT_SUM),
402 1.1 hikaru _ENTRY(IPD_SUB_PORT_FCS),
403 1.1 hikaru _ENTRY(IPD_QOS0_RED_MARKS),
404 1.1 hikaru _ENTRY(IPD_QOS1_RED_MARKS),
405 1.1 hikaru _ENTRY(IPD_QOS2_RED_MARKS),
406 1.1 hikaru _ENTRY(IPD_QOS3_RED_MARKS),
407 1.1 hikaru _ENTRY(IPD_QOS4_RED_MARKS),
408 1.1 hikaru _ENTRY(IPD_QOS5_RED_MARKS),
409 1.1 hikaru _ENTRY(IPD_QOS6_RED_MARKS),
410 1.1 hikaru _ENTRY(IPD_QOS7_RED_MARKS),
411 1.1 hikaru _ENTRY(IPD_PORT_BP_COUNTERS_PAIR0),
412 1.1 hikaru _ENTRY(IPD_PORT_BP_COUNTERS_PAIR1),
413 1.1 hikaru _ENTRY(IPD_PORT_BP_COUNTERS_PAIR2),
414 1.1 hikaru _ENTRY(IPD_PORT_BP_COUNTERS_PAIR32),
415 1.1 hikaru _ENTRY(IPD_RED_PORT_ENABLE),
416 1.1 hikaru _ENTRY(IPD_RED_QUE0_PARAM),
417 1.1 hikaru _ENTRY(IPD_RED_QUE1_PARAM),
418 1.1 hikaru _ENTRY(IPD_RED_QUE2_PARAM),
419 1.1 hikaru _ENTRY(IPD_RED_QUE3_PARAM),
420 1.1 hikaru _ENTRY(IPD_RED_QUE4_PARAM),
421 1.1 hikaru _ENTRY(IPD_RED_QUE5_PARAM),
422 1.1 hikaru _ENTRY(IPD_RED_QUE6_PARAM),
423 1.1 hikaru _ENTRY(IPD_RED_QUE7_PARAM),
424 1.1 hikaru _ENTRY(IPD_PTR_COUNT),
425 1.1 hikaru _ENTRY(IPD_BP_PRT_RED_END),
426 1.1 hikaru _ENTRY(IPD_QUE0_FREE_PAGE_CNT),
427 1.1 hikaru _ENTRY(IPD_CLK_COUNT),
428 1.1 hikaru _ENTRY(IPD_PWP_PTR_FIFO_CTL),
429 1.1 hikaru _ENTRY(IPD_PRC_HOLD_PTR_FIFO_CTL),
430 1.1 hikaru _ENTRY(IPD_PRC_PORT_PTR_FIFO_CTL),
431 1.1 hikaru _ENTRY(IPD_PKT_PTR_VALID),
432 1.1 hikaru _ENTRY(IPD_WQE_PTR_VALID),
433 1.1 hikaru _ENTRY(IPD_BIST_STATUS),
434 1.1 hikaru };
435 1.1 hikaru
436 1.1 hikaru void
437 1.3 simonb octipd_dump(void)
438 1.1 hikaru {
439 1.3 simonb struct octipd_softc *sc;
440 1.3 simonb const struct octipd_dump_reg *reg;
441 1.1 hikaru uint64_t tmp;
442 1.1 hikaru char buf[512];
443 1.1 hikaru int i;
444 1.1 hikaru
445 1.3 simonb sc = __octipd_softc[0];
446 1.3 simonb for (i = 0; i < (int)__arraycount(octipd_dump_regs); i++) {
447 1.3 simonb reg = &octipd_dump_regs[i];
448 1.1 hikaru tmp = _IPD_RD8(sc, reg->offset);
449 1.1 hikaru if (reg->format == NULL) {
450 1.1 hikaru snprintf(buf, sizeof(buf), "%16" PRIx64, tmp);
451 1.1 hikaru } else {
452 1.1 hikaru snprintb(buf, sizeof(buf), reg->format, tmp);
453 1.1 hikaru }
454 1.1 hikaru printf("%-32s: %s\n", reg->name, buf);
455 1.1 hikaru }
456 1.1 hikaru }
457 1.3 simonb #endif /* CNMAC_DEBUG */
458