octeon_mpi.c revision 1.2.2.2
1 1.2.2.2 skrll /* $NetBSD: octeon_mpi.c,v 1.2.2.2 2015/06/06 14:40:01 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /* 4 1.2.2.2 skrll * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 1.2.2.2 skrll * All rights reserved. 6 1.2.2.2 skrll * 7 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 skrll * modification, are permitted provided that the following conditions 9 1.2.2.2 skrll * are met: 10 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.2.2.2 skrll * 16 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 1.2.2.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.2.2.2 skrll * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.2.2.2 skrll * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 1.2.2.2 skrll * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.2.2.2 skrll * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.2.2.2 skrll * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.2.2.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.2.2.2 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 skrll * SUCH DAMAGE. 27 1.2.2.2 skrll */ 28 1.2.2.2 skrll 29 1.2.2.2 skrll 30 1.2.2.2 skrll #include <sys/cdefs.h> 31 1.2.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: octeon_mpi.c,v 1.2.2.2 2015/06/06 14:40:01 skrll Exp $"); 32 1.2.2.2 skrll 33 1.2.2.2 skrll #include "opt_octeon.h" 34 1.2.2.2 skrll 35 1.2.2.2 skrll #include <sys/param.h> 36 1.2.2.2 skrll #include <sys/systm.h> 37 1.2.2.2 skrll #include <sys/types.h> 38 1.2.2.2 skrll #include <sys/device.h> 39 1.2.2.2 skrll #include <sys/lock.h> 40 1.2.2.2 skrll #include <sys/cdefs.h> 41 1.2.2.2 skrll 42 1.2.2.2 skrll #include <mips/locore.h> 43 1.2.2.2 skrll #include <sys/bus.h> 44 1.2.2.2 skrll 45 1.2.2.2 skrll #include <mips/cavium/include/iobusvar.h> 46 1.2.2.2 skrll #include <mips/cavium/dev/octeon_mpireg.h> 47 1.2.2.2 skrll #include <mips/cavium/dev/octeon_mpivar.h> 48 1.2.2.2 skrll #include <mips/cavium/dev/octeon_ciureg.h> 49 1.2.2.2 skrll 50 1.2.2.2 skrll struct octeon_mpi_softc { 51 1.2.2.2 skrll device_t sc_dev; 52 1.2.2.2 skrll 53 1.2.2.2 skrll bus_space_tag_t sc_regt; 54 1.2.2.2 skrll bus_space_handle_t sc_regh; 55 1.2.2.2 skrll 56 1.2.2.2 skrll void *sc_ih; /* XXX Interrupt Handler */ 57 1.2.2.2 skrll 58 1.2.2.2 skrll /* board-specific chip-select hook ops */ 59 1.2.2.2 skrll void (*sc_ops_cs_on)(void); 60 1.2.2.2 skrll void (*sc_ops_cs_off)(void); 61 1.2.2.2 skrll struct octeon_mpi_controller ctrl; 62 1.2.2.2 skrll 63 1.2.2.2 skrll }; 64 1.2.2.2 skrll 65 1.2.2.2 skrll static int octeon_mpi_match(device_t, struct cfdata *, 66 1.2.2.2 skrll void *); 67 1.2.2.2 skrll static void octeon_mpi_attach(device_t, device_t, 68 1.2.2.2 skrll void *); 69 1.2.2.2 skrll #if 0 70 1.2.2.2 skrll static int octeon_mpi_intr(void *); 71 1.2.2.2 skrll #endif 72 1.2.2.2 skrll void octeon_mpi_read(void *, u_int, 73 1.2.2.2 skrll u_int, size_t, uint8_t *); 74 1.2.2.2 skrll void octeon_mpi_write(void *, u_int, 75 1.2.2.2 skrll u_int, size_t, uint8_t *); 76 1.2.2.2 skrll static void octeon_mpi_xfer(struct octeon_mpi_softc *, size_t, 77 1.2.2.2 skrll size_t); 78 1.2.2.2 skrll static void octeon_mpi_wait(struct octeon_mpi_softc *); 79 1.2.2.2 skrll static inline uint64_t octeon_mpi_reg_rd(struct octeon_mpi_softc *, int); 80 1.2.2.2 skrll static inline void octeon_mpi_reg_wr(struct octeon_mpi_softc *, int, 81 1.2.2.2 skrll uint64_t); 82 1.2.2.2 skrll 83 1.2.2.2 skrll /* SPI service routines */ 84 1.2.2.2 skrll int octeon_mpi_configure(void *, void *, void *); 85 1.2.2.2 skrll 86 1.2.2.2 skrll #define GETREG(sc, x) \ 87 1.2.2.2 skrll bus_space_read_8(sc->sc_regt, sc->sc_regh, x) 88 1.2.2.2 skrll #define PUTREG(sc, x, v) \ 89 1.2.2.2 skrll bus_space_write_8(sc->sc_regt, sc->sc_regh, x, v) 90 1.2.2.2 skrll 91 1.2.2.2 skrll CFATTACH_DECL_NEW(octeon_mpi, sizeof(struct octeon_mpi_softc), 92 1.2.2.2 skrll octeon_mpi_match, octeon_mpi_attach, NULL, NULL); 93 1.2.2.2 skrll 94 1.2.2.2 skrll 95 1.2.2.2 skrll static int 96 1.2.2.2 skrll spi_print(void *aux, const char *pnp) 97 1.2.2.2 skrll { 98 1.2.2.2 skrll aprint_normal(" spi"); 99 1.2.2.2 skrll return (UNCONF); 100 1.2.2.2 skrll } 101 1.2.2.2 skrll 102 1.2.2.2 skrll static int 103 1.2.2.2 skrll octeon_mpi_match(device_t parent, struct cfdata *cf, void *aux) 104 1.2.2.2 skrll { 105 1.2.2.2 skrll struct iobus_attach_args *aa = aux; 106 1.2.2.2 skrll 107 1.2.2.2 skrll if (strcmp(cf->cf_name, aa->aa_name) != 0) 108 1.2.2.2 skrll return 0; 109 1.2.2.2 skrll return 1; 110 1.2.2.2 skrll } 111 1.2.2.2 skrll 112 1.2.2.2 skrll static void 113 1.2.2.2 skrll octeon_mpi_attach(device_t parent, device_t self, void *aux) 114 1.2.2.2 skrll { 115 1.2.2.2 skrll struct octeon_mpi_softc *sc = device_private(self); 116 1.2.2.2 skrll struct iobus_attach_args *aa = aux; 117 1.2.2.2 skrll struct octeon_mpi_attach_args pa; 118 1.2.2.2 skrll int status; 119 1.2.2.2 skrll 120 1.2.2.2 skrll sc->sc_regt = aa->aa_bust; 121 1.2.2.2 skrll 122 1.2.2.2 skrll /* 123 1.2.2.2 skrll * Map registers. 124 1.2.2.2 skrll */ 125 1.2.2.2 skrll status = bus_space_map(sc->sc_regt, MPI_BASE, MPI_SIZE, 0, 126 1.2.2.2 skrll &sc->sc_regh); 127 1.2.2.2 skrll if (status != 0) 128 1.2.2.2 skrll panic(": can't map register"); 129 1.2.2.2 skrll 130 1.2.2.2 skrll aprint_normal(": Octeon MPI/SPI Controller\n"); 131 1.2.2.2 skrll 132 1.2.2.2 skrll /* 133 1.2.2.2 skrll * Initialize MPI/SPI Controller 134 1.2.2.2 skrll */ 135 1.2.2.2 skrll sc->ctrl.sc_bust = sc->sc_regt; 136 1.2.2.2 skrll sc->ctrl.sc_bush = sc->sc_regh; 137 1.2.2.2 skrll sc->ctrl.sct_cookie = sc; 138 1.2.2.2 skrll sc->ctrl.sct_configure = octeon_mpi_configure; 139 1.2.2.2 skrll sc->ctrl.sct_read = octeon_mpi_read; 140 1.2.2.2 skrll sc->ctrl.sct_write = octeon_mpi_write; 141 1.2.2.2 skrll pa.octeon_mpi_ctrl = &(sc->ctrl); 142 1.2.2.2 skrll 143 1.2.2.2 skrll /* Enable SPI mode */ 144 1.2.2.2 skrll #if 0 145 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_CFG_OFFSET, 146 1.2.2.2 skrll (0x7d << MPI_CFG_CLKDIV_SHIFT) | MPI_CFG_CSENA | MPI_CFG_ENABLE | MPI_CFG_INT_ENA); 147 1.2.2.2 skrll /* Enable device interrupts */ 148 1.2.2.2 skrll sc->sc_ih = octeon_intr_establish(ffs64(CIU_INTX_SUM0_MPI) - 1, 149 1.2.2.2 skrll IPL_SERIAL, octeon_mpi_intr, sc); 150 1.2.2.2 skrll if (sc->sc_ih == NULL) 151 1.2.2.2 skrll panic("l2sw: can't establish interrupt\n"); 152 1.2.2.2 skrll #else 153 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_CFG_OFFSET, 154 1.2.2.2 skrll (0x7d << MPI_CFG_CLKDIV_SHIFT) | MPI_CFG_CSENA | MPI_CFG_ENABLE); 155 1.2.2.2 skrll #endif 156 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_TX_OFFSET, 0); 157 1.2.2.2 skrll 158 1.2.2.2 skrll config_found_ia(&sc->sc_dev, "octeon_mpi", &pa, spi_print); 159 1.2.2.2 skrll } 160 1.2.2.2 skrll 161 1.2.2.2 skrll #if 0 162 1.2.2.2 skrll static int 163 1.2.2.2 skrll octeon_mpi_intr(void *arg) 164 1.2.2.2 skrll { 165 1.2.2.2 skrll struct octeon_mpi_softc *sc = arg; 166 1.2.2.2 skrll 167 1.2.2.2 skrll octeon_mpi_recv(sc); 168 1.2.2.2 skrll 169 1.2.2.2 skrll /* Clear interrupts? */ 170 1.2.2.2 skrll 171 1.2.2.2 skrll return 1; 172 1.2.2.2 skrll } 173 1.2.2.2 skrll #endif 174 1.2.2.2 skrll 175 1.2.2.2 skrll void 176 1.2.2.2 skrll octeon_mpi_read(void *parent, u_int cmd, u_int addr, 177 1.2.2.2 skrll size_t len, uint8_t *data) 178 1.2.2.2 skrll { 179 1.2.2.2 skrll struct octeon_mpi_softc *sc = (void *)parent; 180 1.2.2.2 skrll int i; 181 1.2.2.2 skrll 182 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_DAT0_OFFSET, cmd); 183 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_DAT1_OFFSET, addr); 184 1.2.2.2 skrll 185 1.2.2.2 skrll octeon_mpi_xfer(sc, 2, 2 + len); 186 1.2.2.2 skrll 187 1.2.2.2 skrll for (i = 0; i < (int)len; i++) 188 1.2.2.2 skrll data[i] = octeon_mpi_reg_rd(sc, MPI_DAT2_OFFSET + i * 0x8); 189 1.2.2.2 skrll } 190 1.2.2.2 skrll 191 1.2.2.2 skrll void 192 1.2.2.2 skrll octeon_mpi_write(void *parent, u_int cmd, u_int addr, 193 1.2.2.2 skrll size_t len, uint8_t *data) 194 1.2.2.2 skrll { 195 1.2.2.2 skrll struct octeon_mpi_softc *sc = (void *)parent; 196 1.2.2.2 skrll int i; 197 1.2.2.2 skrll 198 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_DAT0_OFFSET, cmd); 199 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_DAT1_OFFSET, addr); 200 1.2.2.2 skrll 201 1.2.2.2 skrll for (i = 0; i < (int)len; i++) 202 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_DAT2_OFFSET + i * 0x8, data[i]); 203 1.2.2.2 skrll 204 1.2.2.2 skrll octeon_mpi_xfer(sc, 2 + len, 2 + len); 205 1.2.2.2 skrll } 206 1.2.2.2 skrll 207 1.2.2.2 skrll static void 208 1.2.2.2 skrll octeon_mpi_xfer(struct octeon_mpi_softc *sc, size_t tx, size_t total) 209 1.2.2.2 skrll { 210 1.2.2.2 skrll if (sc->sc_ops_cs_on != NULL) 211 1.2.2.2 skrll (*sc->sc_ops_cs_on)(); 212 1.2.2.2 skrll 213 1.2.2.2 skrll octeon_mpi_reg_wr(sc, MPI_TX_OFFSET, 214 1.2.2.2 skrll (tx << MPI_TX_TXNUM_SHIFT) | (total << MPI_TX_TOTNUM_SHIFT)); 215 1.2.2.2 skrll octeon_mpi_wait(sc); 216 1.2.2.2 skrll 217 1.2.2.2 skrll if (sc->sc_ops_cs_off != NULL) 218 1.2.2.2 skrll (*sc->sc_ops_cs_off)(); 219 1.2.2.2 skrll } 220 1.2.2.2 skrll 221 1.2.2.2 skrll static void 222 1.2.2.2 skrll octeon_mpi_wait(struct octeon_mpi_softc *sc) 223 1.2.2.2 skrll { 224 1.2.2.2 skrll uint64_t tmp; 225 1.2.2.2 skrll 226 1.2.2.2 skrll /* XXX ltsleep & interrupt */ 227 1.2.2.2 skrll tmp = octeon_mpi_reg_rd(sc, MPI_STS_OFFSET); 228 1.2.2.2 skrll while (ISSET(tmp, MPI_STS_BUSY)) { 229 1.2.2.2 skrll delay(10); 230 1.2.2.2 skrll tmp = octeon_mpi_reg_rd(sc, MPI_STS_OFFSET); 231 1.2.2.2 skrll } 232 1.2.2.2 skrll } 233 1.2.2.2 skrll 234 1.2.2.2 skrll static inline uint64_t 235 1.2.2.2 skrll octeon_mpi_reg_rd(struct octeon_mpi_softc *sc, int offset) 236 1.2.2.2 skrll { 237 1.2.2.2 skrll return GETREG(sc, offset); 238 1.2.2.2 skrll } 239 1.2.2.2 skrll 240 1.2.2.2 skrll static inline void 241 1.2.2.2 skrll octeon_mpi_reg_wr(struct octeon_mpi_softc *sc, int offset, uint64_t datum) 242 1.2.2.2 skrll { 243 1.2.2.2 skrll PUTREG(sc, offset, datum); 244 1.2.2.2 skrll } 245 1.2.2.2 skrll 246 1.2.2.2 skrll int 247 1.2.2.2 skrll octeon_mpi_configure(void *arg, void *cs_on, void *cs_off) 248 1.2.2.2 skrll { 249 1.2.2.2 skrll struct octeon_mpi_softc *sc = arg; 250 1.2.2.2 skrll 251 1.2.2.2 skrll sc->sc_ops_cs_on = cs_on; 252 1.2.2.2 skrll sc->sc_ops_cs_off = cs_off; 253 1.2.2.2 skrll 254 1.2.2.2 skrll return 0; 255 1.2.2.2 skrll } 256
Indexes created Fri Sep 26 20:09:58 GMT 2025