octeon_mpireg.h revision 1.1 1 /* $NetBSD: octeon_mpireg.h,v 1.1 2015/04/29 08:32:01 hikaru Exp $ */
2
3 /*
4 * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * MPI/SPI Registers
31 */
32
33 #ifndef _OCTEON_MPIREG_H_
34 #define _OCTEON_MPIREG_H_
35
36 #define MPI_CFG 0x0001070000001000ULL
37 #define MPI_STS 0x0001070000001008ULL
38 #define MPI_TX 0x0001070000001010ULL
39 #define MPI_DAT0 0x0001070000001080ULL
40 #define MPI_DAT1 0x0001070000001088ULL
41 #define MPI_DAT2 0x0001070000001090ULL
42 #define MPI_DAT3 0x0001070000001098ULL
43 #define MPI_DAT4 0x00010700000010a0ULL
44 #define MPI_DAT5 0x00010700000010a8ULL
45 #define MPI_DAT6 0x00010700000010b0ULL
46 #define MPI_DAT7 0x00010700000010b8ULL
47 #define MPI_DAT8 0x00010700000010c0ULL
48
49 #define MPI_CFG_XXX_63_29 UINT64_C(0xffffffffe0000000)
50 #define MPI_CFG_CLKDIV UINT64_C(0x000000001fff0000)
51 #define MPI_CFG_CLKDIV_SHIFT 16
52 #define MPI_CFG_XXX_15_12 UINT64_C(0x000000000000f000)
53 #define MPI_CFG_CSLATE UINT64_C(0x0000000000000800)
54 #define MPI_CFG_TRITX UINT64_C(0x0000000000000400)
55 #define MPI_CFG_IDLECLKS UINT64_C(0x0000000000000300)
56 #define MPI_CFG_CSHI UINT64_C(0x0000000000000080)
57 #define MPI_CFG_CSENA UINT64_C(0x0000000000000040)
58 #define MPI_CFG_INT_ENA UINT64_C(0x0000000000000020)
59 #define MPI_CFG_LSBFIRST UINT64_C(0x0000000000000010)
60 #define MPI_CFG_WIREOR UINT64_C(0x0000000000000008)
61 #define MPI_CFG_CLK_CONT UINT64_C(0x0000000000000004)
62 #define MPI_CFG_IDLELO UINT64_C(0x0000000000000002)
63 #define MPI_CFG_ENABLE UINT64_C(0x0000000000000001)
64
65 #define MPI_STS_XXX_63_13 UINT64_C(0xffffffffffffe000)
66 #define MPI_STS_RXNUM UINT64_C(0x0000000000001f00)
67 #define MPI_STS_XXX_7_1 UINT64_C(0x00000000000000fe)
68 #define MPI_STS_BUSY UINT64_C(0x0000000000000001)
69
70 #define MPI_TX_XXX_63_17 UINT64_C(0xfffffffffffe0000)
71 #define MPI_TX_LEAVECS UINT64_C(0x0000000000010000)
72 #define MPI_TX_XXX_15_13 UINT64_C(0x000000000000e000)
73 #define MPI_TX_TXNUM UINT64_C(0x0000000000001f00)
74 #define MPI_TX_TXNUM_SHIFT 8
75 #define MPI_TX_XXX_7_5 UINT64_C(0x00000000000000e0)
76 #define MPI_TX_TOTNUM UINT64_C(0x000000000000001f)
77 #define MPI_TX_TOTNUM_SHIFT 0
78
79 #define MPI_DATX_XXX_63_8 UINT64_C(0xffffffffffffff00)
80 #define MPI_DATX_DATA UINT64_C(0x00000000000000ff)
81
82 /* ---- snprintb */
83
84 #define MPI_CFG_BITS \
85 "\177" /* new format */ \
86 "\020" /* hex display */ \
87 "\020" /* %016x format */ \
88 "f\x10\x0d" "CLKDIV\0" \
89 "b\x0b" "CSLATE\0" \
90 "b\x0a" "TRITX\0" \
91 "f\x08\x02" "IDLECLKS\0" \
92 "b\x07" "CSHI\0" \
93 "b\x06" "CSENA\0" \
94 "b\x05" "INT_ENA\0" \
95 "b\x04" "LSBFIRST\0" \
96 "b\x03" "WIREOR\0" \
97 "b\x02" "CLK_CONT\0" \
98 "b\x01" "IDLELO\0" \
99 "b\x00" "ENABLE\0"
100
101 #define MPI_STS_BITS \
102 "\177" /* new format */ \
103 "\020" /* hex display */ \
104 "\020" /* %016x format */ \
105 "f\x08\x05" "RXNUM\0" \
106 "b\x00" "BUSY\0"
107
108 #define MPI_TX_BITS \
109 "\177" /* new format */ \
110 "\020" /* hex display */ \
111 "\020" /* %016x format */ \
112 "b\x10" "LEAVECS\0" \
113 "f\x08\x05" "TXNUM\0" \
114 "f\x00\x05" "TOTNUM\0"
115
116 /* ---- bus_space */
117
118 #define MPI_BASE 0x0001070000001000ULL
119 #define MPI_SIZE 0x0100
120 #define MPI_NUNITS 1
121
122 #define MPI_CFG_OFFSET 0x0000
123 #define MPI_STS_OFFSET 0x0008
124 #define MPI_TX_OFFSET 0x0010
125 #define MPI_DAT0_OFFSET 0x0080
126 #define MPI_DAT1_OFFSET 0x0088
127 #define MPI_DAT2_OFFSET 0x0090
128 #define MPI_DAT3_OFFSET 0x0098
129 #define MPI_DAT4_OFFSET 0x00a0
130 #define MPI_DAT5_OFFSET 0x00a8
131 #define MPI_DAT6_OFFSET 0x00b0
132 #define MPI_DAT7_OFFSET 0x00b8
133 #define MPI_DAT8_OFFSET 0x00c0
134
135 #endif /* _OCTEON_MPIREG_H_ */
136