octeon_pip.c revision 1.4 1 1.4 simonb /* $NetBSD: octeon_pip.c,v 1.4 2020/05/31 06:27:06 simonb Exp $ */
2 1.1 hikaru
3 1.1 hikaru /*
4 1.1 hikaru * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 1.1 hikaru * All rights reserved.
6 1.1 hikaru *
7 1.1 hikaru * Redistribution and use in source and binary forms, with or without
8 1.1 hikaru * modification, are permitted provided that the following conditions
9 1.1 hikaru * are met:
10 1.1 hikaru * 1. Redistributions of source code must retain the above copyright
11 1.1 hikaru * notice, this list of conditions and the following disclaimer.
12 1.1 hikaru * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 hikaru * notice, this list of conditions and the following disclaimer in the
14 1.1 hikaru * documentation and/or other materials provided with the distribution.
15 1.1 hikaru *
16 1.1 hikaru * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.1 hikaru * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 hikaru * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 hikaru * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.1 hikaru * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 hikaru * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 hikaru * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 hikaru * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 hikaru * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 hikaru * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 hikaru * SUCH DAMAGE.
27 1.1 hikaru */
28 1.1 hikaru
29 1.1 hikaru #include <sys/cdefs.h>
30 1.4 simonb __KERNEL_RCSID(0, "$NetBSD: octeon_pip.c,v 1.4 2020/05/31 06:27:06 simonb Exp $");
31 1.1 hikaru
32 1.1 hikaru #include "opt_octeon.h"
33 1.1 hikaru
34 1.1 hikaru #include <sys/param.h>
35 1.1 hikaru #include <sys/systm.h>
36 1.1 hikaru #include <sys/malloc.h>
37 1.1 hikaru #include <sys/syslog.h>
38 1.1 hikaru #include <sys/time.h>
39 1.1 hikaru #include <net/if.h>
40 1.1 hikaru #include <mips/locore.h>
41 1.1 hikaru #include <mips/cavium/octeonvar.h>
42 1.1 hikaru #include <mips/cavium/dev/octeon_pipreg.h>
43 1.1 hikaru #include <mips/cavium/dev/octeon_pipvar.h>
44 1.1 hikaru
45 1.4 simonb #ifdef CNMAC_DEBUG
46 1.4 simonb struct octpip_softc *__octpip_softc;
47 1.1 hikaru
48 1.4 simonb void octpip_intr_evcnt_attach(struct octpip_softc *);
49 1.4 simonb void octpip_intr_rml(void *);
50 1.1 hikaru
51 1.4 simonb void octpip_dump(void);
52 1.4 simonb void octpip_int_enable(struct octpip_softc *, int);
53 1.1 hikaru #endif
54 1.1 hikaru
55 1.1 hikaru /*
56 1.1 hikaru * register definitions (for debug and statics)
57 1.1 hikaru */
58 1.1 hikaru #define _ENTRY(x) { #x, x##_BITS, x##_OFFSET }
59 1.1 hikaru #define _ENTRY_0_3(x) \
60 1.1 hikaru _ENTRY(x## 0), _ENTRY(x## 1), _ENTRY(x## 2), _ENTRY(x## 3)
61 1.1 hikaru #define _ENTRY_0_7(x) \
62 1.1 hikaru _ENTRY(x## 0), _ENTRY(x## 1), _ENTRY(x## 2), _ENTRY(x## 3), \
63 1.1 hikaru _ENTRY(x## 4), _ENTRY(x## 5), _ENTRY(x## 6), _ENTRY(x## 7)
64 1.1 hikaru #define _ENTRY_0_1_2_32(x) \
65 1.1 hikaru _ENTRY(x## 0), _ENTRY(x## 1), _ENTRY(x## 2), _ENTRY(x##32)
66 1.1 hikaru
67 1.4 simonb struct octpip_dump_reg_ {
68 1.1 hikaru const char *name;
69 1.1 hikaru const char *format;
70 1.1 hikaru size_t offset;
71 1.1 hikaru };
72 1.1 hikaru
73 1.4 simonb static const struct octpip_dump_reg_ octpip_dump_stats_[] = {
74 1.1 hikaru /* PIP_QOS_DIFF[0-63] */
75 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT0_PRT),
76 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT1_PRT),
77 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT2_PRT),
78 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT3_PRT),
79 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT4_PRT),
80 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT5_PRT),
81 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT6_PRT),
82 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT7_PRT),
83 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT8_PRT),
84 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT9_PRT),
85 1.1 hikaru /* PIP_TAG_INC[0-63] */
86 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT_INB_PKTS),
87 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT_INB_OCTS),
88 1.1 hikaru _ENTRY_0_1_2_32 (PIP_STAT_INB_ERRS),
89 1.1 hikaru };
90 1.1 hikaru
91 1.4 simonb #ifdef CNMAC_DEBUG
92 1.4 simonb static const struct octpip_dump_reg_ octpip_dump_regs_[] = {
93 1.1 hikaru _ENTRY (PIP_BIST_STATUS),
94 1.1 hikaru _ENTRY (PIP_INT_REG),
95 1.1 hikaru _ENTRY (PIP_INT_EN),
96 1.1 hikaru _ENTRY (PIP_STAT_CTL),
97 1.1 hikaru _ENTRY (PIP_GBL_CTL),
98 1.1 hikaru _ENTRY (PIP_GBL_CFG),
99 1.1 hikaru _ENTRY (PIP_SOFT_RST),
100 1.1 hikaru _ENTRY (PIP_IP_OFFSET),
101 1.1 hikaru _ENTRY (PIP_TAG_SECRET),
102 1.1 hikaru _ENTRY (PIP_TAG_MASK),
103 1.1 hikaru _ENTRY_0_3 (PIP_DEC_IPSEC),
104 1.1 hikaru _ENTRY (PIP_RAW_WORD),
105 1.1 hikaru _ENTRY_0_7 (PIP_QOS_VLAN),
106 1.1 hikaru _ENTRY_0_3 (PIP_QOS_WATCH),
107 1.1 hikaru _ENTRY_0_1_2_32 (PIP_PRT_CFG),
108 1.1 hikaru _ENTRY_0_1_2_32 (PIP_PRT_TAG),
109 1.1 hikaru };
110 1.2 mrg #endif
111 1.2 mrg
112 1.1 hikaru #undef _ENTRY
113 1.1 hikaru #undef _ENTRY_0_3
114 1.1 hikaru #undef _ENTRY_0_7
115 1.1 hikaru #undef _ENTRY_0_1_2_32
116 1.1 hikaru
117 1.1 hikaru /* XXX */
118 1.1 hikaru void
119 1.4 simonb octpip_init(struct octpip_attach_args *aa, struct octpip_softc **rsc)
120 1.1 hikaru {
121 1.4 simonb struct octpip_softc *sc;
122 1.1 hikaru int status;
123 1.1 hikaru
124 1.1 hikaru sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
125 1.1 hikaru if (sc == NULL)
126 1.1 hikaru panic("can't allocate memory: %s", __func__);
127 1.1 hikaru
128 1.1 hikaru sc->sc_port = aa->aa_port;
129 1.1 hikaru sc->sc_regt = aa->aa_regt;
130 1.1 hikaru sc->sc_tag_type = aa->aa_tag_type;
131 1.1 hikaru sc->sc_receive_group = aa->aa_receive_group;
132 1.1 hikaru sc->sc_ip_offset = aa->aa_ip_offset;
133 1.1 hikaru
134 1.1 hikaru status = bus_space_map(sc->sc_regt, PIP_BASE, PIP_SIZE, 0,
135 1.1 hikaru &sc->sc_regh);
136 1.1 hikaru if (status != 0)
137 1.1 hikaru panic("can't map %s space", "pip register");
138 1.1 hikaru
139 1.1 hikaru *rsc = sc;
140 1.1 hikaru
141 1.4 simonb #ifdef CNMAC_DEBUG
142 1.4 simonb octpip_int_enable(sc, 1);
143 1.4 simonb octpip_intr_evcnt_attach(sc);
144 1.4 simonb __octpip_softc = sc;
145 1.1 hikaru printf("PIP Code initialized.\n");
146 1.1 hikaru #endif
147 1.1 hikaru }
148 1.1 hikaru
149 1.1 hikaru #define _PIP_RD8(sc, off) \
150 1.1 hikaru bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off))
151 1.1 hikaru #define _PIP_WR8(sc, off, v) \
152 1.1 hikaru bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v))
153 1.1 hikaru
154 1.1 hikaru int
155 1.4 simonb octpip_port_config(struct octpip_softc *sc)
156 1.1 hikaru {
157 1.1 hikaru uint64_t prt_cfg;
158 1.1 hikaru uint64_t prt_tag;
159 1.1 hikaru uint64_t ip_offset;
160 1.1 hikaru
161 1.1 hikaru /*
162 1.1 hikaru * Process the headers and place the IP header in the work queue
163 1.1 hikaru */
164 1.1 hikaru prt_cfg = 0;
165 1.1 hikaru if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) == MIPS_CN50XX) {
166 1.1 hikaru SET(prt_cfg, PIP_PRT_CFGN_LENERR_EN);
167 1.1 hikaru SET(prt_cfg, PIP_PRT_CFGN_MAXERR_EN);
168 1.1 hikaru SET(prt_cfg, PIP_PRT_CFGN_MINERR_EN);
169 1.1 hikaru }
170 1.1 hikaru /* RAWDRP=0; don't allow raw packet drop */
171 1.1 hikaru /* TAGINC=0 */
172 1.1 hikaru SET(prt_cfg, PIP_PRT_CFGN_DYN_RS);
173 1.1 hikaru /* INST_HDR=0 */
174 1.1 hikaru /* GRP_WAT=0 */
175 1.1 hikaru SET(prt_cfg, (sc->sc_port << 24) & PIP_PRT_CFGN_QOS);
176 1.1 hikaru /* QOS_WAT=0 */
177 1.1 hikaru /* SPARE=0 */
178 1.1 hikaru /* QOS_DIFF=0 */
179 1.1 hikaru /* QOS_VLAN=0 */
180 1.1 hikaru SET(prt_cfg, PIP_PRT_CFGN_CRC_EN);
181 1.1 hikaru /* SKIP=0 */
182 1.1 hikaru
183 1.1 hikaru prt_tag = 0;
184 1.1 hikaru SET(prt_tag, PIP_PRT_TAGN_INC_PRT);
185 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP6_DPRT);
186 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP4_DPRT);
187 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP6_SPRT);
188 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP4_SPRT);
189 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP6_NXTH);
190 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP4_PCTL);
191 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP6_DST);
192 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP4_SRC);
193 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP6_SRC);
194 1.1 hikaru CLR(prt_tag, PIP_PRT_TAGN_IP4_DST);
195 1.1 hikaru SET(prt_tag, PIP_PRT_TAGN_TCP6_TAG_ORDERED);
196 1.1 hikaru SET(prt_tag, PIP_PRT_TAGN_TCP4_TAG_ORDERED);
197 1.1 hikaru SET(prt_tag, PIP_PRT_TAGN_IP6_TAG_ORDERED);
198 1.1 hikaru SET(prt_tag, PIP_PRT_TAGN_IP4_TAG_ORDERED);
199 1.1 hikaru SET(prt_tag, PIP_PRT_TAGN_NON_TAG_ORDERED);
200 1.1 hikaru SET(prt_tag, sc->sc_receive_group & PIP_PRT_TAGN_GRP);
201 1.1 hikaru
202 1.1 hikaru ip_offset = 0;
203 1.1 hikaru SET(ip_offset, (sc->sc_ip_offset / 8) & PIP_IP_OFFSET_MASK_OFFSET);
204 1.1 hikaru
205 1.1 hikaru _PIP_WR8(sc, PIP_PRT_CFG0_OFFSET + (8 * sc->sc_port), prt_cfg);
206 1.1 hikaru _PIP_WR8(sc, PIP_PRT_TAG0_OFFSET + (8 * sc->sc_port), prt_tag);
207 1.1 hikaru _PIP_WR8(sc, PIP_IP_OFFSET_OFFSET, ip_offset);
208 1.1 hikaru
209 1.1 hikaru return 0;
210 1.1 hikaru }
211 1.1 hikaru
212 1.1 hikaru void
213 1.4 simonb octpip_prt_cfg_enable(struct octpip_softc *sc, uint64_t prt_cfg, int enable)
214 1.1 hikaru {
215 1.1 hikaru uint64_t tmp;
216 1.1 hikaru
217 1.1 hikaru tmp = _PIP_RD8(sc, PIP_PRT_CFG0_OFFSET + (8 * sc->sc_port));
218 1.1 hikaru if (enable)
219 1.1 hikaru tmp |= prt_cfg;
220 1.1 hikaru else
221 1.1 hikaru tmp &= ~prt_cfg;
222 1.1 hikaru _PIP_WR8(sc, PIP_PRT_CFG0_OFFSET + (8 * sc->sc_port), tmp);
223 1.1 hikaru }
224 1.1 hikaru
225 1.1 hikaru void
226 1.4 simonb octpip_stats(struct octpip_softc *sc, struct ifnet *ifp, int gmx_port)
227 1.1 hikaru {
228 1.4 simonb const struct octpip_dump_reg_ *reg;
229 1.1 hikaru uint64_t tmp, pkts;
230 1.1 hikaru uint64_t pip_stat_ctl;
231 1.1 hikaru
232 1.1 hikaru if (sc == NULL || ifp == NULL)
233 1.1 hikaru panic("%s: invalid argument. sc=%p, ifp=%p\n", __func__,
234 1.1 hikaru sc, ifp);
235 1.1 hikaru
236 1.1 hikaru if (gmx_port < 0 || gmx_port > 2) {
237 1.1 hikaru printf("%s: invalid gmx_port %d\n", __func__, gmx_port);
238 1.1 hikaru return;
239 1.1 hikaru }
240 1.1 hikaru
241 1.1 hikaru pip_stat_ctl = _PIP_RD8(sc, PIP_STAT_CTL_OFFSET);
242 1.1 hikaru _PIP_WR8(sc, PIP_STAT_CTL_OFFSET, pip_stat_ctl | PIP_STAT_CTL_RDCLR);
243 1.4 simonb reg = &octpip_dump_stats_[gmx_port];
244 1.1 hikaru tmp = _PIP_RD8(sc, reg->offset);
245 1.1 hikaru pkts = (tmp & 0xffffffff00000000ULL) >> 32;
246 1.3 thorpej if_statadd(ifp, if_iqdrops, pkts);
247 1.1 hikaru
248 1.1 hikaru _PIP_WR8(sc, PIP_STAT_CTL_OFFSET, pip_stat_ctl);
249 1.1 hikaru }
250 1.1 hikaru
251 1.1 hikaru
252 1.4 simonb #ifdef CNMAC_DEBUG
253 1.4 simonb int octpip_intr_rml_verbose;
254 1.4 simonb struct evcnt octpip_intr_evcnt;
255 1.1 hikaru
256 1.4 simonb static const struct octeon_evcnt_entry octpip_intr_evcnt_entries[] = {
257 1.1 hikaru #define _ENTRY(name, type, parent, descr) \
258 1.4 simonb OCTEON_EVCNT_ENTRY(struct octpip_softc, name, type, parent, descr)
259 1.1 hikaru _ENTRY(pipbeperr, MISC, NULL, "pip parity error backend"),
260 1.1 hikaru _ENTRY(pipfeperr, MISC, NULL, "pip parity error frontend"),
261 1.1 hikaru _ENTRY(pipskprunt, MISC, NULL, "pip skiper"),
262 1.1 hikaru _ENTRY(pipbadtag, MISC, NULL, "pip bad tag"),
263 1.1 hikaru _ENTRY(pipprtnxa, MISC, NULL, "pip nonexistent port"),
264 1.1 hikaru _ENTRY(pippktdrp, MISC, NULL, "pip qos drop"),
265 1.1 hikaru #undef _ENTRY
266 1.1 hikaru };
267 1.1 hikaru
268 1.1 hikaru void
269 1.4 simonb octpip_intr_evcnt_attach(struct octpip_softc *sc)
270 1.1 hikaru {
271 1.4 simonb OCTEON_EVCNT_ATTACH_EVCNTS(sc, octpip_intr_evcnt_entries, "pip0");
272 1.1 hikaru }
273 1.1 hikaru
274 1.1 hikaru void
275 1.4 simonb octpip_intr_rml(void *arg)
276 1.1 hikaru {
277 1.4 simonb struct octpip_softc *sc;
278 1.1 hikaru uint64_t reg;
279 1.1 hikaru
280 1.4 simonb octpip_intr_evcnt.ev_count++;
281 1.4 simonb sc = __octpip_softc;
282 1.1 hikaru KASSERT(sc != NULL);
283 1.4 simonb reg = octpip_int_summary(sc);
284 1.4 simonb if (octpip_intr_rml_verbose)
285 1.1 hikaru printf("%s: PIP_INT_REG=0x%016" PRIx64 "\n", __func__, reg);
286 1.1 hikaru if (reg & PIP_INT_REG_BEPERR)
287 1.1 hikaru OCTEON_EVCNT_INC(sc, pipbeperr);
288 1.1 hikaru if (reg & PIP_INT_REG_FEPERR)
289 1.1 hikaru OCTEON_EVCNT_INC(sc, pipfeperr);
290 1.1 hikaru if (reg & PIP_INT_REG_SKPRUNT)
291 1.1 hikaru OCTEON_EVCNT_INC(sc, pipskprunt);
292 1.1 hikaru if (reg & PIP_INT_REG_BADTAG)
293 1.1 hikaru OCTEON_EVCNT_INC(sc, pipbadtag);
294 1.1 hikaru if (reg & PIP_INT_REG_PRTNXA)
295 1.1 hikaru OCTEON_EVCNT_INC(sc, pipprtnxa);
296 1.1 hikaru if (reg & PIP_INT_REG_PKTDRP)
297 1.1 hikaru OCTEON_EVCNT_INC(sc, pippktdrp);
298 1.1 hikaru }
299 1.1 hikaru
300 1.4 simonb void octpip_dump_regs(void);
301 1.4 simonb void octpip_dump_stats(void);
302 1.1 hikaru
303 1.1 hikaru void
304 1.4 simonb octpip_dump(void)
305 1.1 hikaru {
306 1.4 simonb octpip_dump_regs();
307 1.4 simonb octpip_dump_stats();
308 1.1 hikaru }
309 1.1 hikaru
310 1.1 hikaru void
311 1.4 simonb octpip_dump_regs(void)
312 1.1 hikaru {
313 1.4 simonb struct octpip_softc *sc = __octpip_softc;
314 1.4 simonb const struct octpip_dump_reg_ *reg;
315 1.1 hikaru uint64_t tmp;
316 1.1 hikaru char buf[512];
317 1.1 hikaru int i;
318 1.1 hikaru
319 1.4 simonb for (i = 0; i < (int)__arraycount(octpip_dump_regs_); i++) {
320 1.4 simonb reg = &octpip_dump_regs_[i];
321 1.1 hikaru tmp = _PIP_RD8(sc, reg->offset);
322 1.1 hikaru if (reg->format == NULL) {
323 1.1 hikaru snprintf(buf, sizeof(buf), "%16" PRIx64, tmp);
324 1.1 hikaru } else {
325 1.1 hikaru snprintb(buf, sizeof(buf), reg->format, tmp);
326 1.1 hikaru }
327 1.1 hikaru printf("\t%-24s: %s\n", reg->name, buf);
328 1.1 hikaru }
329 1.1 hikaru }
330 1.1 hikaru
331 1.1 hikaru void
332 1.4 simonb octpip_dump_stats(void)
333 1.1 hikaru {
334 1.4 simonb struct octpip_softc *sc = __octpip_softc;
335 1.4 simonb const struct octpip_dump_reg_ *reg;
336 1.1 hikaru uint64_t tmp;
337 1.1 hikaru char buf[512];
338 1.1 hikaru int i;
339 1.1 hikaru uint64_t pip_stat_ctl;
340 1.1 hikaru
341 1.1 hikaru pip_stat_ctl = _PIP_RD8(sc, PIP_STAT_CTL_OFFSET);
342 1.1 hikaru _PIP_WR8(sc, PIP_STAT_CTL_OFFSET, pip_stat_ctl & ~PIP_STAT_CTL_RDCLR);
343 1.4 simonb for (i = 0; i < (int)__arraycount(octpip_dump_stats_); i++) {
344 1.4 simonb reg = &octpip_dump_stats_[i];
345 1.1 hikaru tmp = _PIP_RD8(sc, reg->offset);
346 1.1 hikaru if (reg->format == NULL) {
347 1.1 hikaru snprintf(buf, sizeof(buf), "%16" PRIx64, tmp);
348 1.1 hikaru } else {
349 1.1 hikaru snprintb(buf, sizeof(buf), reg->format, tmp);
350 1.1 hikaru }
351 1.1 hikaru printf("\t%-24s: %s\n", reg->name, buf);
352 1.1 hikaru }
353 1.1 hikaru printf("\t%-24s:\n", "PIP_QOS_DIFF[0-63]");
354 1.1 hikaru for (i = 0; i < 64; i++) {
355 1.1 hikaru tmp = _PIP_RD8(sc, PIP_QOS_DIFF0_OFFSET + sizeof(uint64_t) * i);
356 1.1 hikaru snprintf(buf, sizeof(buf), "%16" PRIx64, tmp);
357 1.1 hikaru printf("%s\t%s%s",
358 1.1 hikaru ((i % 4) == 0) ? "\t" : "",
359 1.1 hikaru buf,
360 1.1 hikaru ((i % 4) == 3) ? "\n" : "");
361 1.1 hikaru }
362 1.1 hikaru printf("\t%-24s:\n", "PIP_TAG_INC[0-63]");
363 1.1 hikaru for (i = 0; i < 64; i++) {
364 1.1 hikaru tmp = _PIP_RD8(sc, PIP_TAG_INC0_OFFSET + sizeof(uint64_t) * i);
365 1.1 hikaru snprintf(buf, sizeof(buf), "%16" PRIx64, tmp);
366 1.1 hikaru printf("%s\t%s%s",
367 1.1 hikaru ((i % 4) == 0) ? "\t" : "",
368 1.1 hikaru buf,
369 1.1 hikaru ((i % 4) == 3) ? "\n" : "");
370 1.1 hikaru }
371 1.1 hikaru _PIP_WR8(sc, PIP_STAT_CTL_OFFSET, pip_stat_ctl);
372 1.1 hikaru }
373 1.1 hikaru
374 1.1 hikaru void
375 1.4 simonb octpip_int_enable(struct octpip_softc *sc, int enable)
376 1.1 hikaru {
377 1.1 hikaru uint64_t pip_int_xxx = 0;
378 1.1 hikaru
379 1.1 hikaru SET(pip_int_xxx,
380 1.1 hikaru PIP_INT_EN_BEPERR |
381 1.1 hikaru PIP_INT_EN_FEPERR |
382 1.1 hikaru PIP_INT_EN_SKPRUNT |
383 1.1 hikaru PIP_INT_EN_BADTAG |
384 1.1 hikaru PIP_INT_EN_PRTNXA |
385 1.1 hikaru PIP_INT_EN_PKTDRP);
386 1.1 hikaru _PIP_WR8(sc, PIP_INT_REG_OFFSET, pip_int_xxx);
387 1.1 hikaru _PIP_WR8(sc, PIP_INT_EN_OFFSET, enable ? pip_int_xxx : 0);
388 1.1 hikaru }
389 1.1 hikaru uint64_t
390 1.4 simonb octpip_int_summary(struct octpip_softc *sc)
391 1.1 hikaru {
392 1.1 hikaru uint64_t summary;
393 1.1 hikaru
394 1.1 hikaru summary = _PIP_RD8(sc, PIP_INT_REG_OFFSET);
395 1.1 hikaru _PIP_WR8(sc, PIP_INT_REG_OFFSET, summary);
396 1.1 hikaru return summary;
397 1.1 hikaru }
398 1.4 simonb #endif /* CNMAC_DEBUG */
399