octeon_pko.c revision 1.1
1 /* $NetBSD: octeon_pko.c,v 1.1 2015/04/29 08:32:01 hikaru Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: octeon_pko.c,v 1.1 2015/04/29 08:32:01 hikaru Exp $"); 31 32 #include "opt_octeon.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <mips/locore.h> 38 #include <mips/cavium/octeonvar.h> 39 #include <mips/cavium/dev/octeon_faureg.h> 40 #include <mips/cavium/dev/octeon_fpavar.h> 41 #include <mips/cavium/dev/octeon_pkoreg.h> 42 #include <mips/cavium/dev/octeon_pkovar.h> 43 44 static inline void octeon_pko_op_store(uint64_t, uint64_t); 45 46 #ifdef OCTEON_ETH_DEBUG 47 void octeon_pko_intr_evcnt_attach(struct octeon_pko_softc *); 48 void octeon_pko_intr_rml(void *); 49 #endif 50 51 #define _PKO_RD8(sc, off) \ 52 bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off)) 53 #define _PKO_WR8(sc, off, v) \ 54 bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v)) 55 56 #ifdef OCTEON_ETH_DEBUG 57 struct octeon_pko_softc *__octeon_pko_softc; 58 #endif 59 60 /* ----- gloal functions */ 61 62 /* XXX */ 63 void 64 octeon_pko_init(struct octeon_pko_attach_args *aa, 65 struct octeon_pko_softc **rsc) 66 { 67 struct octeon_pko_softc *sc; 68 int status; 69 70 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 71 if (sc == NULL) 72 panic("can't allocate memory: %s", __func__); 73 74 sc->sc_port = aa->aa_port; 75 sc->sc_regt = aa->aa_regt; 76 sc->sc_cmdptr = aa->aa_cmdptr; 77 sc->sc_cmd_buf_pool = aa->aa_cmd_buf_pool; 78 sc->sc_cmd_buf_size = aa->aa_cmd_buf_size; 79 80 status = bus_space_map(sc->sc_regt, PKO_BASE, PKO_SIZE, 0, 81 &sc->sc_regh); 82 if (status != 0) 83 panic("can't map %s space", "pko register"); 84 85 *rsc = sc; 86 87 #ifdef OCTEON_ETH_DEBUG 88 octeon_pko_intr_evcnt_attach(sc); 89 __octeon_pko_softc = sc; 90 #endif 91 } 92 93 int 94 octeon_pko_enable(struct octeon_pko_softc *sc) 95 { 96 uint64_t reg_flags; 97 98 reg_flags = _PKO_RD8(sc, PKO_REG_FLAGS_OFFSET); 99 /* PKO_REG_FLAGS_RESET=0 */ 100 /* PKO_REG_FLAGS_STORE_BE=0 */ 101 SET(reg_flags, PKO_REG_FLAGS_ENA_DWB); 102 SET(reg_flags, PKO_REG_FLAGS_ENA_PKO); 103 /* XXX */ 104 OCTEON_SYNCW; 105 _PKO_WR8(sc, PKO_REG_FLAGS_OFFSET, reg_flags); 106 107 return 0; 108 } 109 110 #if 0 111 void 112 octeon_pko_reset(octeon_pko_softc *sc) 113 { 114 uint64_t reg_flags; 115 116 reg_flags = _PKO_RD8(sc, PKO_REG_FLAGS_OFFSET); 117 SET(reg_flags, PKO_REG_FLAGS_RESET); 118 _PKO_WR8(sc, PKO_REG_FLAGS_OFFSET, reg_flags); 119 } 120 #endif 121 122 void 123 octeon_pko_config(struct octeon_pko_softc *sc) 124 { 125 uint64_t reg_cmd_buf = 0; 126 127 SET(reg_cmd_buf, (sc->sc_cmd_buf_pool << 20) & PKO_REG_CMD_BUF_POOL); 128 SET(reg_cmd_buf, sc->sc_cmd_buf_size & PKO_REG_CMD_BUF_SIZE); 129 _PKO_WR8(sc, PKO_REG_CMD_BUF_OFFSET, reg_cmd_buf); 130 131 #ifdef OCTEON_ETH_DEBUG 132 octeon_pko_int_enable(sc, 1); 133 #endif 134 } 135 136 int 137 octeon_pko_port_enable(struct octeon_pko_softc *sc, int enable) 138 { 139 uint64_t reg_read_idx; 140 uint64_t mem_queue_qos; 141 142 reg_read_idx = 0; 143 SET(reg_read_idx, sc->sc_port & PKO_REG_READ_IDX_IDX); 144 145 /* XXX assume one queue maped one port */ 146 /* Enable packet output by enabling all queues for this port */ 147 mem_queue_qos = 0; 148 SET(mem_queue_qos, ((uint64_t)sc->sc_port << 7) & PKO_MEM_QUEUE_QOS_PID); 149 SET(mem_queue_qos, sc->sc_port & PKO_MEM_QUEUE_QOS_QID); 150 SET(mem_queue_qos, ((enable ? 0xffULL : 0x00ULL) << 53) & 151 PKO_MEM_QUEUE_QOS_QOS_MASK); 152 153 _PKO_WR8(sc, PKO_REG_READ_IDX_OFFSET, reg_read_idx); 154 _PKO_WR8(sc, PKO_MEM_QUEUE_QOS_OFFSET, mem_queue_qos); 155 156 return 0; 157 } 158 159 static int pko_queue_map_init[32]; 160 161 int 162 octeon_pko_port_config(struct octeon_pko_softc *sc) 163 { 164 paddr_t buf_ptr = 0; 165 uint64_t mem_queue_ptrs; 166 167 KASSERT(sc->sc_port < 32); 168 169 buf_ptr = octeon_fpa_load(FPA_COMMAND_BUFFER_POOL); 170 if (buf_ptr == 0) 171 return 1; 172 173 KASSERT(buf_ptr != 0); 174 175 /* assume one queue maped one port */ 176 mem_queue_ptrs = 0; 177 SET(mem_queue_ptrs, PKO_MEM_QUEUE_PTRS_TAIL); 178 SET(mem_queue_ptrs, ((uint64_t)0 << 13) & PKO_MEM_QUEUE_PTRS_IDX); 179 SET(mem_queue_ptrs, ((uint64_t)sc->sc_port << 7) & PKO_MEM_QUEUE_PTRS_PID); 180 SET(mem_queue_ptrs, sc->sc_port & PKO_MEM_QUEUE_PTRS_QID); 181 SET(mem_queue_ptrs, ((uint64_t)0xff << 53) & PKO_MEM_QUEUE_PTRS_QOS_MASK); 182 SET(mem_queue_ptrs, ((uint64_t)buf_ptr << 17) & PKO_MEM_QUEUE_PTRS_BUF_PTR); 183 OCTEON_SYNCW; 184 _PKO_WR8(sc, PKO_MEM_QUEUE_PTRS_OFFSET, mem_queue_ptrs); 185 186 /* 187 * Set initial command buffer address and index 188 * for queue. 189 */ 190 sc->sc_cmdptr->cmdptr = (uint64_t)buf_ptr; 191 sc->sc_cmdptr->cmdptr_idx = 0; 192 193 pko_queue_map_init[sc->sc_port] = 1; 194 195 return 0; 196 } 197 198 #ifdef OCTEON_ETH_DEBUG 199 int octeon_pko_intr_rml_verbose; 200 struct evcnt octeon_pko_intr_evcnt; 201 202 static const struct octeon_evcnt_entry octeon_pko_intr_evcnt_entries[] = { 203 #define _ENTRY(name, type, parent, descr) \ 204 OCTEON_EVCNT_ENTRY(struct octeon_pko_softc, name, type, parent, descr) 205 _ENTRY(pkoerrdbell, MISC, NULL, "pko doorbell overflow"), 206 _ENTRY(pkoerrparity, MISC, NULL, "pko parity error") 207 #undef _ENTRY 208 }; 209 210 void 211 octeon_pko_intr_evcnt_attach(struct octeon_pko_softc *sc) 212 { 213 OCTEON_EVCNT_ATTACH_EVCNTS(sc, octeon_pko_intr_evcnt_entries, "pko0"); 214 } 215 216 void 217 octeon_pko_intr_rml(void *arg) 218 { 219 struct octeon_pko_softc *sc; 220 uint64_t reg; 221 222 octeon_pko_intr_evcnt.ev_count++; 223 sc = __octeon_pko_softc; 224 KASSERT(sc != NULL); 225 reg = octeon_pko_int_summary(sc); 226 if (octeon_pko_intr_rml_verbose) 227 printf("%s: PKO_REG_ERROR=0x%016" PRIx64 "\n", __func__, reg); 228 if (reg & PKO_REG_ERROR_DOORBELL) 229 OCTEON_EVCNT_INC(sc, pkoerrdbell); 230 if (reg & PKO_REG_ERROR_PARITY) 231 OCTEON_EVCNT_INC(sc, pkoerrparity); 232 } 233 234 void 235 octeon_pko_int_enable(struct octeon_pko_softc *sc, int enable) 236 { 237 uint64_t pko_int_xxx = 0; 238 239 pko_int_xxx = PKO_REG_ERROR_DOORBELL | PKO_REG_ERROR_PARITY; 240 _PKO_WR8(sc, PKO_REG_ERROR_OFFSET, pko_int_xxx); 241 _PKO_WR8(sc, PKO_REG_INT_MASK_OFFSET, enable ? pko_int_xxx : 0); 242 } 243 244 uint64_t 245 octeon_pko_int_summary(struct octeon_pko_softc *sc) 246 { 247 uint64_t summary; 248 249 summary = _PKO_RD8(sc, PKO_REG_ERROR_OFFSET); 250 _PKO_WR8(sc, PKO_REG_ERROR_OFFSET, summary); 251 return summary; 252 } 253 #endif 254
Indexes created Sat Sep 27 14:09:57 GMT 2025