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      1  1.5  simonb /*	$NetBSD: octeon_powreg.h,v 1.5 2020/06/23 05:15:33 simonb Exp $	*/
      2  1.1  hikaru 
      3  1.1  hikaru /*
      4  1.1  hikaru  * Copyright (c) 2007 Internet Initiative Japan, Inc.
      5  1.1  hikaru  * All rights reserved.
      6  1.1  hikaru  *
      7  1.1  hikaru  * Redistribution and use in source and binary forms, with or without
      8  1.1  hikaru  * modification, are permitted provided that the following conditions
      9  1.1  hikaru  * are met:
     10  1.1  hikaru  * 1. Redistributions of source code must retain the above copyright
     11  1.1  hikaru  *    notice, this list of conditions and the following disclaimer.
     12  1.1  hikaru  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  hikaru  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  hikaru  *    documentation and/or other materials provided with the distribution.
     15  1.1  hikaru  *
     16  1.1  hikaru  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     17  1.1  hikaru  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18  1.1  hikaru  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19  1.1  hikaru  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     20  1.1  hikaru  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21  1.1  hikaru  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22  1.1  hikaru  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  1.1  hikaru  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24  1.1  hikaru  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  hikaru  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  hikaru  * SUCH DAMAGE.
     27  1.1  hikaru  */
     28  1.1  hikaru 
     29  1.1  hikaru /*
     30  1.1  hikaru  * POW Registers
     31  1.1  hikaru  */
     32  1.1  hikaru 
     33  1.1  hikaru #ifndef _OCTEON_POWREG_H_
     34  1.1  hikaru #define _OCTEON_POWREG_H_
     35  1.1  hikaru 
     36  1.1  hikaru /* ---- register addresses */
     37  1.1  hikaru 
     38  1.5  simonb #define	POW_PP_GRP_MSK(core)			(UINT64_C(0x0001670000000000) + (core) * 8)
     39  1.1  hikaru #define	POW_WQ_INT_THR0				UINT64_C(0x0001670000000080)
     40  1.1  hikaru #define	POW_WQ_INT_THR1				UINT64_C(0x0001670000000088)
     41  1.1  hikaru #define	POW_WQ_INT_THR2				UINT64_C(0x0001670000000090)
     42  1.1  hikaru #define	POW_WQ_INT_THR3				UINT64_C(0x0001670000000098)
     43  1.1  hikaru #define	POW_WQ_INT_THR4				UINT64_C(0x00016700000000a0)
     44  1.1  hikaru #define	POW_WQ_INT_THR5				UINT64_C(0x00016700000000a8)
     45  1.1  hikaru #define	POW_WQ_INT_THR6				UINT64_C(0x00016700000000b0)
     46  1.1  hikaru #define	POW_WQ_INT_THR7				UINT64_C(0x00016700000000b8)
     47  1.1  hikaru #define	POW_WQ_INT_THR8				UINT64_C(0x00016700000000c0)
     48  1.1  hikaru #define	POW_WQ_INT_THR9				UINT64_C(0x00016700000000c8)
     49  1.1  hikaru #define	POW_WQ_INT_THR10			UINT64_C(0x00016700000000d0)
     50  1.1  hikaru #define	POW_WQ_INT_THR11			UINT64_C(0x00016700000000d8)
     51  1.1  hikaru #define	POW_WQ_INT_THR12			UINT64_C(0x00016700000000e0)
     52  1.1  hikaru #define	POW_WQ_INT_THR13			UINT64_C(0x00016700000000e8)
     53  1.1  hikaru #define	POW_WQ_INT_THR14			UINT64_C(0x00016700000000f0)
     54  1.1  hikaru #define	POW_WQ_INT_THR15			UINT64_C(0x00016700000000f8)
     55  1.1  hikaru #define	POW_WQ_INT_CNT0				UINT64_C(0x0001670000000100)
     56  1.1  hikaru #define	POW_WQ_INT_CNT1				UINT64_C(0x0001670000000108)
     57  1.1  hikaru #define	POW_WQ_INT_CNT2				UINT64_C(0x0001670000000110)
     58  1.1  hikaru #define	POW_WQ_INT_CNT3				UINT64_C(0x0001670000000118)
     59  1.1  hikaru #define	POW_WQ_INT_CNT4				UINT64_C(0x0001670000000120)
     60  1.1  hikaru #define	POW_WQ_INT_CNT5				UINT64_C(0x0001670000000128)
     61  1.1  hikaru #define	POW_WQ_INT_CNT6				UINT64_C(0x0001670000000130)
     62  1.1  hikaru #define	POW_WQ_INT_CNT7				UINT64_C(0x0001670000000138)
     63  1.1  hikaru #define	POW_WQ_INT_CNT8				UINT64_C(0x0001670000000140)
     64  1.1  hikaru #define	POW_WQ_INT_CNT9				UINT64_C(0x0001670000000148)
     65  1.1  hikaru #define	POW_WQ_INT_CNT10			UINT64_C(0x0001670000000150)
     66  1.1  hikaru #define	POW_WQ_INT_CNT11			UINT64_C(0x0001670000000158)
     67  1.1  hikaru #define	POW_WQ_INT_CNT12			UINT64_C(0x0001670000000160)
     68  1.1  hikaru #define	POW_WQ_INT_CNT13			UINT64_C(0x0001670000000168)
     69  1.1  hikaru #define	POW_WQ_INT_CNT14			UINT64_C(0x0001670000000170)
     70  1.1  hikaru #define	POW_WQ_INT_CNT15			UINT64_C(0x0001670000000178)
     71  1.1  hikaru #define	POW_QOS_THR0				UINT64_C(0x0001670000000180)
     72  1.1  hikaru #define	POW_QOS_THR1				UINT64_C(0x0001670000000188)
     73  1.1  hikaru #define	POW_QOS_THR2				UINT64_C(0x0001670000000190)
     74  1.1  hikaru #define	POW_QOS_THR3				UINT64_C(0x0001670000000198)
     75  1.1  hikaru #define	POW_QOS_THR4				UINT64_C(0x00016700000001a0)
     76  1.1  hikaru #define	POW_QOS_THR5				UINT64_C(0x00016700000001a8)
     77  1.1  hikaru #define	POW_QOS_THR6				UINT64_C(0x00016700000001b0)
     78  1.1  hikaru #define	POW_QOS_THR7				UINT64_C(0x00016700000001b8)
     79  1.1  hikaru #define	POW_QOS_RND0				UINT64_C(0x00016700000001c0)
     80  1.1  hikaru #define	POW_QOS_RND1				UINT64_C(0x00016700000001c8)
     81  1.1  hikaru #define	POW_QOS_RND2				UINT64_C(0x00016700000001d0)
     82  1.1  hikaru #define	POW_QOS_RND3				UINT64_C(0x00016700000001d8)
     83  1.1  hikaru #define	POW_QOS_RND4				UINT64_C(0x00016700000001e0)
     84  1.1  hikaru #define	POW_QOS_RND5				UINT64_C(0x00016700000001e8)
     85  1.1  hikaru #define	POW_QOS_RND6				UINT64_C(0x00016700000001f0)
     86  1.1  hikaru #define	POW_QOS_RND7				UINT64_C(0x00016700000001f8)
     87  1.1  hikaru #define	POW_WQ_INT				UINT64_C(0x0001670000000200)
     88  1.1  hikaru #define	POW_WQ_INT_PC				UINT64_C(0x0001670000000208)
     89  1.1  hikaru #define	POW_NW_TIM				UINT64_C(0x0001670000000210)
     90  1.1  hikaru #define	POW_ECC_ERR				UINT64_C(0x0001670000000218)
     91  1.1  hikaru #define	POW_NOS_CNT				UINT64_C(0x0001670000000220)
     92  1.1  hikaru #define	POW_WS_PC0				UINT64_C(0x0001670000000280)
     93  1.1  hikaru #define	POW_WS_PC1				UINT64_C(0x0001670000000288)
     94  1.1  hikaru #define	POW_WS_PC2				UINT64_C(0x0001670000000290)
     95  1.1  hikaru #define	POW_WS_PC3				UINT64_C(0x0001670000000298)
     96  1.1  hikaru #define	POW_WS_PC4				UINT64_C(0x00016700000002a0)
     97  1.1  hikaru #define	POW_WS_PC5				UINT64_C(0x00016700000002a8)
     98  1.1  hikaru #define	POW_WS_PC6				UINT64_C(0x00016700000002b0)
     99  1.1  hikaru #define	POW_WS_PC7				UINT64_C(0x00016700000002b8)
    100  1.1  hikaru #define	POW_WS_PC8				UINT64_C(0x00016700000002c0)
    101  1.1  hikaru #define	POW_WS_PC9				UINT64_C(0x00016700000002c8)
    102  1.1  hikaru #define	POW_WS_PC10				UINT64_C(0x00016700000002d0)
    103  1.1  hikaru #define	POW_WS_PC11				UINT64_C(0x00016700000002d8)
    104  1.1  hikaru #define	POW_WS_PC12				UINT64_C(0x00016700000002e0)
    105  1.1  hikaru #define	POW_WS_PC13				UINT64_C(0x00016700000002e8)
    106  1.1  hikaru #define	POW_WS_PC14				UINT64_C(0x00016700000002f0)
    107  1.1  hikaru #define	POW_WS_PC15				UINT64_C(0x00016700000002f8)
    108  1.1  hikaru #define	POW_WA_PC0				UINT64_C(0x0001670000000300)
    109  1.1  hikaru #define	POW_WA_PC1				UINT64_C(0x0001670000000308)
    110  1.1  hikaru #define	POW_WA_PC2				UINT64_C(0x0001670000000310)
    111  1.1  hikaru #define	POW_WA_PC3				UINT64_C(0x0001670000000318)
    112  1.1  hikaru #define	POW_WA_PC4				UINT64_C(0x0001670000000320)
    113  1.1  hikaru #define	POW_WA_PC5				UINT64_C(0x0001670000000328)
    114  1.1  hikaru #define	POW_WA_PC6				UINT64_C(0x0001670000000330)
    115  1.1  hikaru #define	POW_WA_PC7				UINT64_C(0x0001670000000338)
    116  1.1  hikaru #define	POW_IQ_CNT0				UINT64_C(0x0001670000000340)
    117  1.1  hikaru #define	POW_IQ_CNT1				UINT64_C(0x0001670000000348)
    118  1.1  hikaru #define	POW_IQ_CNT2				UINT64_C(0x0001670000000350)
    119  1.1  hikaru #define	POW_IQ_CNT3				UINT64_C(0x0001670000000358)
    120  1.1  hikaru #define	POW_IQ_CNT4				UINT64_C(0x0001670000000360)
    121  1.1  hikaru #define	POW_IQ_CNT5				UINT64_C(0x0001670000000368)
    122  1.1  hikaru #define	POW_IQ_CNT6				UINT64_C(0x0001670000000370)
    123  1.1  hikaru #define	POW_IQ_CNT7				UINT64_C(0x0001670000000378)
    124  1.1  hikaru #define	POW_WA_COM_PC				UINT64_C(0x0001670000000380)
    125  1.1  hikaru #define	POW_IQ_COM_CNT				UINT64_C(0x0001670000000388)
    126  1.1  hikaru #define	POW_TS_PC				UINT64_C(0x0001670000000390)
    127  1.1  hikaru #define	POW_DS_PC				UINT64_C(0x0001670000000398)
    128  1.1  hikaru #define	POW_BIST_STAT				UINT64_C(0x00016700000003f8)
    129  1.1  hikaru 
    130  1.1  hikaru #define POW_BASE				UINT64_C(0x0001670000000000)
    131  1.1  hikaru #define POW_SIZE				UINT64_C(0x400)
    132  1.1  hikaru 
    133  1.5  simonb #define	POW_PP_GRP_MSK_OFFSET(core)		(UINT64_C(0) + (core) * 8)
    134  1.1  hikaru #define	POW_WQ_INT_THR0_OFFSET			UINT64_C(0x80)
    135  1.1  hikaru #define	POW_WQ_INT_THR1_OFFSET			UINT64_C(0x88)
    136  1.1  hikaru #define	POW_WQ_INT_THR2_OFFSET			UINT64_C(0x90)
    137  1.1  hikaru #define	POW_WQ_INT_THR3_OFFSET			UINT64_C(0x98)
    138  1.1  hikaru #define	POW_WQ_INT_THR4_OFFSET			UINT64_C(0xa0)
    139  1.1  hikaru #define	POW_WQ_INT_THR5_OFFSET			UINT64_C(0xa8)
    140  1.1  hikaru #define	POW_WQ_INT_THR6_OFFSET			UINT64_C(0xb0)
    141  1.1  hikaru #define	POW_WQ_INT_THR7_OFFSET			UINT64_C(0xb8)
    142  1.1  hikaru #define	POW_WQ_INT_THR8_OFFSET			UINT64_C(0xc0)
    143  1.1  hikaru #define	POW_WQ_INT_THR9_OFFSET			UINT64_C(0xc8)
    144  1.1  hikaru #define	POW_WQ_INT_THR10_OFFSET			UINT64_C(0xd0)
    145  1.1  hikaru #define	POW_WQ_INT_THR11_OFFSET			UINT64_C(0xd8)
    146  1.1  hikaru #define	POW_WQ_INT_THR12_OFFSET			UINT64_C(0xe0)
    147  1.1  hikaru #define	POW_WQ_INT_THR13_OFFSET			UINT64_C(0xe8)
    148  1.1  hikaru #define	POW_WQ_INT_THR14_OFFSET			UINT64_C(0xf0)
    149  1.1  hikaru #define	POW_WQ_INT_THR15_OFFSET			UINT64_C(0xf8)
    150  1.1  hikaru #define	POW_WQ_INT_CNT0_OFFSET			UINT64_C(0x100)
    151  1.1  hikaru #define	POW_WQ_INT_CNT1_OFFSET			UINT64_C(0x108)
    152  1.1  hikaru #define	POW_WQ_INT_CNT2_OFFSET			UINT64_C(0x110)
    153  1.1  hikaru #define	POW_WQ_INT_CNT3_OFFSET			UINT64_C(0x118)
    154  1.1  hikaru #define	POW_WQ_INT_CNT4_OFFSET			UINT64_C(0x120)
    155  1.1  hikaru #define	POW_WQ_INT_CNT5_OFFSET			UINT64_C(0x128)
    156  1.1  hikaru #define	POW_WQ_INT_CNT6_OFFSET			UINT64_C(0x130)
    157  1.1  hikaru #define	POW_WQ_INT_CNT7_OFFSET			UINT64_C(0x138)
    158  1.1  hikaru #define	POW_WQ_INT_CNT8_OFFSET			UINT64_C(0x140)
    159  1.1  hikaru #define	POW_WQ_INT_CNT9_OFFSET			UINT64_C(0x148)
    160  1.1  hikaru #define	POW_WQ_INT_CNT10_OFFSET			UINT64_C(0x150)
    161  1.1  hikaru #define	POW_WQ_INT_CNT11_OFFSET			UINT64_C(0x158)
    162  1.1  hikaru #define	POW_WQ_INT_CNT12_OFFSET			UINT64_C(0x160)
    163  1.1  hikaru #define	POW_WQ_INT_CNT13_OFFSET			UINT64_C(0x168)
    164  1.1  hikaru #define	POW_WQ_INT_CNT14_OFFSET			UINT64_C(0x170)
    165  1.1  hikaru #define	POW_WQ_INT_CNT15_OFFSET			UINT64_C(0x178)
    166  1.1  hikaru #define	POW_QOS_THR0_OFFSET			UINT64_C(0x180)
    167  1.1  hikaru #define	POW_QOS_THR1_OFFSET			UINT64_C(0x188)
    168  1.1  hikaru #define	POW_QOS_THR2_OFFSET			UINT64_C(0x190)
    169  1.1  hikaru #define	POW_QOS_THR3_OFFSET			UINT64_C(0x198)
    170  1.1  hikaru #define	POW_QOS_THR4_OFFSET			UINT64_C(0x1a0)
    171  1.1  hikaru #define	POW_QOS_THR5_OFFSET			UINT64_C(0x1a8)
    172  1.1  hikaru #define	POW_QOS_THR6_OFFSET			UINT64_C(0x1b0)
    173  1.1  hikaru #define	POW_QOS_THR7_OFFSET			UINT64_C(0x1b8)
    174  1.1  hikaru #define	POW_QOS_RND0_OFFSET			UINT64_C(0x1c0)
    175  1.1  hikaru #define	POW_QOS_RND1_OFFSET			UINT64_C(0x1c8)
    176  1.1  hikaru #define	POW_QOS_RND2_OFFSET			UINT64_C(0x1d0)
    177  1.1  hikaru #define	POW_QOS_RND3_OFFSET			UINT64_C(0x1d8)
    178  1.1  hikaru #define	POW_QOS_RND4_OFFSET			UINT64_C(0x1e0)
    179  1.1  hikaru #define	POW_QOS_RND5_OFFSET			UINT64_C(0x1e8)
    180  1.1  hikaru #define	POW_QOS_RND6_OFFSET			UINT64_C(0x1f0)
    181  1.1  hikaru #define	POW_QOS_RND7_OFFSET			UINT64_C(0x1f8)
    182  1.1  hikaru #define	POW_WQ_INT_OFFSET			UINT64_C(0x200)
    183  1.1  hikaru #define	POW_WQ_INT_PC_OFFSET			UINT64_C(0x208)
    184  1.1  hikaru #define	POW_NW_TIM_OFFSET			UINT64_C(0x210)
    185  1.1  hikaru #define	POW_ECC_ERR_OFFSET			UINT64_C(0x218)
    186  1.1  hikaru #define	POW_NOS_CNT_OFFSET			UINT64_C(0x220)
    187  1.1  hikaru #define	POW_WS_PC0_OFFSET			UINT64_C(0x280)
    188  1.1  hikaru #define	POW_WS_PC1_OFFSET			UINT64_C(0x288)
    189  1.1  hikaru #define	POW_WS_PC2_OFFSET			UINT64_C(0x290)
    190  1.1  hikaru #define	POW_WS_PC3_OFFSET			UINT64_C(0x298)
    191  1.1  hikaru #define	POW_WS_PC4_OFFSET			UINT64_C(0x2a0)
    192  1.1  hikaru #define	POW_WS_PC5_OFFSET			UINT64_C(0x2a8)
    193  1.1  hikaru #define	POW_WS_PC6_OFFSET			UINT64_C(0x2b0)
    194  1.1  hikaru #define	POW_WS_PC7_OFFSET			UINT64_C(0x2b8)
    195  1.1  hikaru #define	POW_WS_PC8_OFFSET			UINT64_C(0x2c0)
    196  1.1  hikaru #define	POW_WS_PC9_OFFSET			UINT64_C(0x2c8)
    197  1.1  hikaru #define	POW_WS_PC10_OFFSET			UINT64_C(0x2d0)
    198  1.1  hikaru #define	POW_WS_PC11_OFFSET			UINT64_C(0x2d8)
    199  1.1  hikaru #define	POW_WS_PC12_OFFSET			UINT64_C(0x2e0)
    200  1.1  hikaru #define	POW_WS_PC13_OFFSET			UINT64_C(0x2e8)
    201  1.1  hikaru #define	POW_WS_PC14_OFFSET			UINT64_C(0x2f0)
    202  1.1  hikaru #define	POW_WS_PC15_OFFSET			UINT64_C(0x2f8)
    203  1.1  hikaru #define	POW_WA_PC0_OFFSET			UINT64_C(0x300)
    204  1.1  hikaru #define	POW_WA_PC1_OFFSET			UINT64_C(0x308)
    205  1.1  hikaru #define	POW_WA_PC2_OFFSET			UINT64_C(0x310)
    206  1.1  hikaru #define	POW_WA_PC3_OFFSET			UINT64_C(0x318)
    207  1.1  hikaru #define	POW_WA_PC4_OFFSET			UINT64_C(0x320)
    208  1.1  hikaru #define	POW_WA_PC5_OFFSET			UINT64_C(0x328)
    209  1.1  hikaru #define	POW_WA_PC6_OFFSET			UINT64_C(0x330)
    210  1.1  hikaru #define	POW_WA_PC7_OFFSET			UINT64_C(0x338)
    211  1.1  hikaru #define	POW_IQ_CNT0_OFFSET			UINT64_C(0x340)
    212  1.1  hikaru #define	POW_IQ_CNT1_OFFSET			UINT64_C(0x348)
    213  1.1  hikaru #define	POW_IQ_CNT2_OFFSET			UINT64_C(0x350)
    214  1.1  hikaru #define	POW_IQ_CNT3_OFFSET			UINT64_C(0x358)
    215  1.1  hikaru #define	POW_IQ_CNT4_OFFSET			UINT64_C(0x360)
    216  1.1  hikaru #define	POW_IQ_CNT5_OFFSET			UINT64_C(0x368)
    217  1.1  hikaru #define	POW_IQ_CNT6_OFFSET			UINT64_C(0x370)
    218  1.1  hikaru #define	POW_IQ_CNT7_OFFSET			UINT64_C(0x378)
    219  1.1  hikaru #define	POW_WA_COM_PC_OFFSET			UINT64_C(0x380)
    220  1.1  hikaru #define	POW_IQ_COM_CNT_OFFSET			UINT64_C(0x388)
    221  1.1  hikaru #define	POW_TS_PC_OFFSET			UINT64_C(0x390)
    222  1.1  hikaru #define	POW_DS_PC_OFFSET			UINT64_C(0x398)
    223  1.1  hikaru #define	POW_BIST_STAT_OFFSET			UINT64_C(0x3f8)
    224  1.1  hikaru 
    225  1.1  hikaru /* ---- register bits */
    226  1.1  hikaru 
    227  1.1  hikaru #define	POW_PP_GRP_MSKX_XXX_63_16		UINT64_C(0xffffffffffff0000)
    228  1.1  hikaru #define	POW_PP_GRP_MSKX_GRP_MSK			UINT64_C(0x000000000000ffff)
    229  1.1  hikaru 
    230  1.1  hikaru #define	POW_WQ_INT_THRX_XXX_63_29		UINT64_C(0xffffffffe0000000)
    231  1.1  hikaru #define	POW_WQ_INT_THRX_TC_EN			UINT64_C(0x0000000010000000)
    232  1.1  hikaru #define	POW_WQ_INT_THRX_TC_THR			UINT64_C(0x000000000f000000)
    233  1.1  hikaru #define	POW_WQ_INT_THRX_XXX_23_18		UINT64_C(0x0000000000fc0000)
    234  1.1  hikaru #define	POW_WQ_INT_THRX_DS_THR			UINT64_C(0x000000000003f000)
    235  1.1  hikaru #define	POW_WQ_INT_THRX_XXX_11_6		UINT64_C(0x0000000000000fc0)
    236  1.1  hikaru #define	POW_WQ_INT_THRX_IQ_THR			UINT64_C(0x000000000000003f)
    237  1.1  hikaru 
    238  1.1  hikaru #define	POW_WQ_INT_CNTX_XXX_63_28		UINT64_C(0xfffffffff0000000)
    239  1.1  hikaru #define	POW_WQ_INT_CNTX_TC_CNT			UINT64_C(0x000000000f000000)
    240  1.1  hikaru #define	POW_WQ_INT_CNTX_XXX_23_18		UINT64_C(0x0000000000fc0000)
    241  1.1  hikaru #define	POW_WQ_INT_CNTX_DS_CNT			UINT64_C(0x000000000003f000)
    242  1.1  hikaru #define	POW_WQ_INT_CNTX_XXX_11_6		UINT64_C(0x0000000000000fc0)
    243  1.1  hikaru #define	POW_WQ_INT_CNTX_IQ_CNT			UINT64_C(0x000000000000003f)
    244  1.1  hikaru 
    245  1.1  hikaru #define	POW_QOS_THRX_XXX_63_55			UINT64_C(0xff80000000000000)
    246  1.1  hikaru #define	POW_QOS_THRX_DES_CNT			UINT64_C(0x007f000000000000)
    247  1.1  hikaru #define	POW_QOS_THRX_XXX_47_43			UINT64_C(0x0000f80000000000)
    248  1.1  hikaru #define	POW_QOS_THRX_BUF_CNT			UINT64_C(0x000007f000000000)
    249  1.1  hikaru #define	POW_QOS_THRX_XXX_35_31			UINT64_C(0x0000000f80000000)
    250  1.1  hikaru #define	POW_QOS_THRX_FREE_CNT			UINT64_C(0x000000007f000000)
    251  1.1  hikaru #define	POW_QOS_THRX_XXX_23_18			UINT64_C(0x0000000000fc0000)
    252  1.1  hikaru #define	POW_QOS_THRX_MAX_THR			UINT64_C(0x000000000003f000)
    253  1.1  hikaru #define	POW_QOS_THRX_XXX_11_6			UINT64_C(0x0000000000000fc0)
    254  1.1  hikaru #define	POW_QOS_THRX_MIN_THR			UINT64_C(0x000000000000003f)
    255  1.1  hikaru 
    256  1.1  hikaru #define	POW_QOS_RNDX_XXX_63_32			UINT64_C(0xffffffff00000000)
    257  1.1  hikaru #define	POW_QOS_RNDX_RND_P3			UINT64_C(0x00000000ff000000)
    258  1.1  hikaru #define	POW_QOS_RNDX_RND_P2			UINT64_C(0x0000000000ff0000)
    259  1.1  hikaru #define	POW_QOS_RNDX_RND_P1			UINT64_C(0x000000000000ff00)
    260  1.1  hikaru #define	POW_QOS_RNDX_RND			UINT64_C(0x00000000000000ff)
    261  1.1  hikaru 
    262  1.1  hikaru #define	POW_WQ_INT_XXX_63_32			UINT64_C(0xffffffff00000000)
    263  1.1  hikaru #define	POW_WQ_INT_IQ_DIS			UINT64_C(0x00000000ffff0000)
    264  1.1  hikaru #define	POW_WQ_INT_WQ_INT			UINT64_C(0x000000000000ffff)
    265  1.1  hikaru 
    266  1.1  hikaru #define	POW_WQ_INT_PC_XXX_63_60			UINT64_C(0xf000000000000000)
    267  1.1  hikaru #define	POW_WQ_INT_PC_PC			UINT64_C(0x0fffffff00000000)
    268  1.1  hikaru #define	POW_WQ_INT_PC_XXX_31_28			UINT64_C(0x00000000f0000000)
    269  1.1  hikaru #define	POW_WQ_INT_PC_PC_THR			UINT64_C(0x000000000fffff00)
    270  1.1  hikaru #define	POW_WQ_INT_PC_XXX_7_0			UINT64_C(0x00000000000000ff)
    271  1.1  hikaru 
    272  1.1  hikaru #define	POW_NW_TIM_XXX_63_10			UINT64_C(0xfffffffffffffc00)
    273  1.1  hikaru #define	POW_NW_TIM_NW_TIM			UINT64_C(0x00000000000003ff)
    274  1.1  hikaru 
    275  1.1  hikaru #define	POW_ECC_ERR_XXX_63_45			UINT64_C(0xffffe00000000000)
    276  1.1  hikaru #define	POW_ECC_ERR_IOP_IE			UINT64_C(0x00001fff00000000)
    277  1.1  hikaru #define	POW_ECC_ERR_XXX_31_29			UINT64_C(0x00000000e0000000)
    278  1.1  hikaru #define	POW_ECC_ERR_IOP				UINT64_C(0x000000001fff0000)
    279  1.2  simonb #define	  POW_ECC_ERR_IOP_CSRPEND		  28
    280  1.2  simonb #define	  POW_ECC_ERR_IOP_DBGPEND		  27
    281  1.2  simonb #define	  POW_ECC_ERR_IOP_ADDWORK		  26
    282  1.2  simonb #define	  POW_ECC_ERR_IOP_ILLOP			  25
    283  1.2  simonb #define	  POW_ECC_ERR_IOP_PEND24		  24
    284  1.2  simonb #define	  POW_ECC_ERR_IOP_PEND23		  23
    285  1.2  simonb #define	  POW_ECC_ERR_IOP_PEND22		  22
    286  1.2  simonb #define	  POW_ECC_ERR_IOP_PEND21		  21
    287  1.2  simonb #define	  POW_ECC_ERR_IOP_TAGNULL		  20
    288  1.2  simonb #define	  POW_ECC_ERR_IOP_TAGNULLNULL		  19
    289  1.2  simonb #define	  POW_ECC_ERR_IOP_ORDATOM		  18
    290  1.2  simonb #define	  POW_ECC_ERR_IOP_NULL			  17
    291  1.2  simonb #define	  POW_ECC_ERR_IOP_NULLNULL		  16
    292  1.1  hikaru #define	POW_ECC_ERR_XXX_15_14			UINT64_C(0x000000000000c000)
    293  1.1  hikaru #define	POW_ECC_ERR_RPE_IE			UINT64_C(0x0000000000002000)
    294  1.1  hikaru #define	POW_ECC_ERR_RPE				UINT64_C(0x0000000000001000)
    295  1.1  hikaru #define	POW_ECC_ERR_XXX_11_9			UINT64_C(0x0000000000000e00)
    296  1.1  hikaru #define	POW_ECC_ERR_SYN				UINT64_C(0x00000000000001f0)
    297  1.1  hikaru #define	POW_ECC_ERR_DBE_IE			UINT64_C(0x0000000000000008)
    298  1.1  hikaru #define	POW_ECC_ERR_SBE_IE			UINT64_C(0x0000000000000004)
    299  1.1  hikaru #define	POW_ECC_ERR_DBE				UINT64_C(0x0000000000000002)
    300  1.1  hikaru #define	POW_ECC_ERR_SBE				UINT64_C(0x0000000000000001)
    301  1.1  hikaru 
    302  1.1  hikaru #define	POW_NOS_CNT_XXX_63_7			UINT64_C(0xffffffffffffff80)
    303  1.1  hikaru #define	POW_NOS_CNT_NOS_CNT			UINT64_C(0x000000000000007f)
    304  1.1  hikaru 
    305  1.1  hikaru #define	POW_WS_PC0_XXX_63_32			UINT64_C(0xffffffff00000000)
    306  1.1  hikaru #define	POW_WS_PC0_WS_PC			UINT64_C(0x00000000ffffffff)
    307  1.1  hikaru 
    308  1.1  hikaru #define	POW_WA_PC0_XXX_63_32			UINT64_C(0xffffffff00000000)
    309  1.1  hikaru #define	POW_WA_PC0_WA_PC			UINT64_C(0x00000000ffffffff)
    310  1.1  hikaru 
    311  1.1  hikaru #define	POW_IQ_CNT0_XXX_63_32			UINT64_C(0xffffffff00000000)
    312  1.1  hikaru #define	POW_IQ_CNT0_IQ_CNT			UINT64_C(0x00000000ffffffff)
    313  1.1  hikaru 
    314  1.1  hikaru #define	POW_WA_COM_PC_XXX_63_32			UINT64_C(0xffffffff00000000)
    315  1.1  hikaru #define	POW_WA_COM_PC_WA_PC			UINT64_C(0x00000000ffffffff)
    316  1.1  hikaru 
    317  1.1  hikaru #define	POW_WQ_COM_CNT_XXX_63_32		UINT64_C(0xffffffff00000000)
    318  1.1  hikaru #define	POW_WQ_COM_CNT_IQ_CNT			UINT64_C(0x00000000ffffffff)
    319  1.1  hikaru 
    320  1.1  hikaru #define	POW_TS_PC_XXX_63_32			UINT64_C(0xffffffff00000000)
    321  1.1  hikaru #define	POW_TS_PC_TS_PC				UINT64_C(0x00000000ffffffff)
    322  1.1  hikaru 
    323  1.1  hikaru #define	POW_DS_PC_XXX_63_32			UINT64_C(0xffffffff00000000)
    324  1.1  hikaru #define	POW_DS_PC_DS_PC				UINT64_C(0x00000000ffffffff)
    325  1.1  hikaru 
    326  1.1  hikaru #define	POW_BIST_STAT_XXX_63_7			UINT64_C(0xfffffffffffe0000)
    327  1.1  hikaru #define	POW_BIST_STAT_PP			UINT64_C(0x0000000000010000)
    328  1.1  hikaru #define	POW_BIST_STAT_XXX_15_9			UINT64_C(0x000000000000fe00)
    329  1.1  hikaru #define	POW_BIST_STAT_CAM			UINT64_C(0x0000000000000100)
    330  1.1  hikaru #define	POW_BIST_STAT_NBT1			UINT64_C(0x0000000000000080)
    331  1.1  hikaru #define	POW_BIST_STAT_NBT0			UINT64_C(0x0000000000000040)
    332  1.1  hikaru #define	POW_BIST_STAT_IDX			UINT64_C(0x0000000000000020)
    333  1.1  hikaru #define	POW_BIST_STAT_FIDX			UINT64_C(0x0000000000000010)
    334  1.1  hikaru #define	POW_BIST_STAT_NBR1			UINT64_C(0x0000000000000008)
    335  1.1  hikaru #define	POW_BIST_STAT_NBR0			UINT64_C(0x0000000000000004)
    336  1.1  hikaru #define	POW_BIST_STAT_PEND			UINT64_C(0x0000000000000002)
    337  1.1  hikaru #define	POW_BIST_STAT_ADR			UINT64_C(0x0000000000000001)
    338  1.1  hikaru 
    339  1.1  hikaru /* ---- pow operations */
    340  1.1  hikaru 
    341  1.2  simonb /* -- pow load operations */
    342  1.1  hikaru 
    343  1.2  simonb /* get work load */
    344  1.2  simonb #define	POW_OP_SUBDID_GET_WORK			0
    345  1.1  hikaru #define POW_GET_WORK_LOAD_WAIT			UINT64_C(0x0000000000000008)
    346  1.1  hikaru 
    347  1.2  simonb /* pow status load */
    348  1.2  simonb #define	POW_OP_SUBDID_STATUS_LOAD		1
    349  1.1  hikaru #define POW_STATUS_LOAD_COREID			UINT64_C(0x00000000000003c0)
    350  1.1  hikaru #define POW_STATUS_LOAD_GET_REV			UINT64_C(0x0000000000000020)
    351  1.1  hikaru #define POW_STATUS_LOAD_GET_CUR			UINT64_C(0x0000000000000010)
    352  1.1  hikaru #define POW_STATUS_LOAD_GET_WQP			UINT64_C(0x0000000000000008)
    353  1.1  hikaru #define POW_STATUS_LOAD_GET_2_0			UINT64_C(0x0000000000000007)
    354  1.1  hikaru 
    355  1.1  hikaru /* get_cur = 0 and get_wqp = 0 ("pend_tag") */
    356  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_XXX_63_62		UINT64_C(0xc000000000000000)
    357  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH		UINT64_C(0x2000000000000000)
    358  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH_FULL	UINT64_C(0x1000000000000000)
    359  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH_NULL	UINT64_C(0x0800000000000000)
    360  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_DESCHED		UINT64_C(0x0400000000000000)
    361  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_DESCHED_SWITCH	UINT64_C(0x0200000000000000)
    362  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NOSCHED		UINT64_C(0x0100000000000000)
    363  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NEW_WORK		UINT64_C(0x0080000000000000)
    364  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NEW_WORK_WAIT	UINT64_C(0x0040000000000000)
    365  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NULL_RD		UINT64_C(0x0020000000000000)
    366  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NOSCHED_CLR	UINT64_C(0x0010000000000000)
    367  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_XXX_51		UINT64_C(0x0008000000000000)
    368  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_INDEX		UINT64_C(0x0007ff0000000000)
    369  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_GRP		UINT64_C(0x000000f000000000)
    370  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_XXX_35_34		UINT64_C(0x0000000c00000000)
    371  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_TYPE		UINT64_C(0x0000000300000000)
    372  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_TAG		UINT64_C(0x00000000ffffffff)
    373  1.1  hikaru 
    374  1.1  hikaru /* get_cur = 0 and get_wqp = 1 ("pend_wqp") */
    375  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_XXX_63_62		UINT64_C(0xc000000000000000)
    376  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH		UINT64_C(0x2000000000000000)
    377  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH_FULL	UINT64_C(0x1000000000000000)
    378  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH_NULL	UINT64_C(0x0800000000000000)
    379  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_DESCHED		UINT64_C(0x0400000000000000)
    380  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_DESCHED_SWITCH	UINT64_C(0x0200000000000000)
    381  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NOSCHED		UINT64_C(0x0100000000000000)
    382  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NEW_WORK		UINT64_C(0x0080000000000000)
    383  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NEW_WORK_WAIT	UINT64_C(0x0040000000000000)
    384  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NULL_RD		UINT64_C(0x0020000000000000)
    385  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NOSCHED_CLR	UINT64_C(0x0010000000000000)
    386  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_XXX_51		UINT64_C(0x0008000000000000)
    387  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_INDEX		UINT64_C(0x0007ff0000000000)
    388  1.1  hikaru #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_WQP		UINT64_C(0x0000000fffffffff)
    389  1.1  hikaru 
    390  1.1  hikaru /* get_cur = 1 and get_wqp = 0 and get_rev = 0 ("cur_tag_next") */
    391  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_XXX_63_62		UINT64_C(0xc000000000000000)
    392  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_LINK_INDEX		UINT64_C(0x3ff8000000000000)
    393  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_INDEX		UINT64_C(0x0007ff0000000000)
    394  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_GRP			UINT64_C(0x000000f000000000)
    395  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_HEAD		UINT64_C(0x0000000800000000)
    396  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAIL		UINT64_C(0x0000000400000000)
    397  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAG_TYPE		UINT64_C(0x0000000300000000)
    398  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAG			UINT64_C(0x00000000ffffffff)
    399  1.1  hikaru 
    400  1.1  hikaru /* get_cur = 1 and get_wqp = 0 and get_rev = 1 ("cur_tag_prev") */
    401  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_XXX_63_62		UINT64_C(0xc000000000000000)
    402  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_REVLINK_INDEX	UINT64_C(0x3ff8000000000000)
    403  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_INDEX		UINT64_C(0x0007ff0000000000)
    404  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_GRP			UINT64_C(0x000000f000000000)
    405  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_HEAD		UINT64_C(0x0000000800000000)
    406  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAIL		UINT64_C(0x0000000400000000)
    407  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAG_TYPE		UINT64_C(0x0000000300000000)
    408  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAG			UINT64_C(0x00000000ffffffff)
    409  1.1  hikaru 
    410  1.1  hikaru /* get_cur = 1 and get_wqp = 1 and get_rev = 0 ("cur_wqp_next") */
    411  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_XXX_63_62		UINT64_C(0xc000000000000000)
    412  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_LINK_INDEX		UINT64_C(0x3ff8000000000000)
    413  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_INDEX		UINT64_C(0x0007ff0000000000)
    414  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_GRP			UINT64_C(0x000000f000000000)
    415  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_WQP			UINT64_C(0x0000000fffffffff)
    416  1.1  hikaru 
    417  1.1  hikaru /* get_cur = 1 and get_wqp = 1 and get_rev = 1 ("cur_wqp_prev") */
    418  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_XXX_63_62		UINT64_C(0xc000000000000000)
    419  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_REVLINK_INDEX	UINT64_C(0x3ff8000000000000)
    420  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_INDEX		UINT64_C(0x0007ff0000000000)
    421  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_GRP			UINT64_C(0x000000f000000000)
    422  1.1  hikaru #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_WQP			UINT64_C(0x0000000fffffffff)
    423  1.1  hikaru 
    424  1.2  simonb /* pow memory load */
    425  1.2  simonb #define	POW_OP_SUBDID_MEMORY_LOAD		2
    426  1.2  simonb #define POW_MEMORY_LOAD_INDEX			UINT64_C(0x000000000000ffe0)
    427  1.2  simonb #define POW_MEMORY_LOAD_GET_DES			UINT64_C(0x0000000000000010)
    428  1.2  simonb #define POW_MEMORY_LOAD_GET_WQP			UINT64_C(0x0000000000000008)
    429  1.2  simonb #define POW_MEMORY_LOAD_2_0			UINT64_C(0x0000000000000007)
    430  1.1  hikaru 
    431  1.1  hikaru /* get_des = 0 and get_wqp = 0 ("tag") */
    432  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_XXX_63_51			UINT64_C(0xfff8000000000000)
    433  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_NEXT_INDEX			UINT64_C(0x0007ff0000000000)
    434  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_GRP				UINT64_C(0x000000f000000000)
    435  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_XXX_35			UINT64_C(0x0000000800000000)
    436  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_TAIL				UINT64_C(0x0000000400000000)
    437  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_TAG_TYPE			UINT64_C(0x0000000300000000)
    438  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_TAG_TAG				UINT64_C(0x00000000ffffffff)
    439  1.1  hikaru 
    440  1.1  hikaru /* get_des = 0 and get_wqp = 1 ("wqp") */
    441  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_WQP_XXX_63_51			UINT64_C(0xfff8000000000000)
    442  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_WQP_NEXT_INDEX			UINT64_C(0x0007ff0000000000)
    443  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_WQP_GRP				UINT64_C(0x000000f000000000)
    444  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_WQP_WQP				UINT64_C(0x0000000fffffffff)
    445  1.1  hikaru 
    446  1.1  hikaru /* get_des = 1 ("desched") */
    447  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_XXX_63_51		UINT64_C(0xfff8000000000000)
    448  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_FWD_INDEX		UINT64_C(0x0007ff0000000000)
    449  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_GRP			UINT64_C(0x000000f000000000)
    450  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_NOSCHED			UINT64_C(0x0000000800000000)
    451  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_SWITCH		UINT64_C(0x0000000400000000)
    452  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_TYPE		UINT64_C(0x0000000300000000)
    453  1.1  hikaru #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_TAG			UINT64_C(0x00000000ffffffff)
    454  1.1  hikaru 
    455  1.2  simonb /* pow index/pointer load */
    456  1.2  simonb #define	POW_OP_SUBDID_IDXPTR_LOAD		3
    457  1.2  simonb 
    458  1.1  hikaru #define POW_IDXPTR_LOAD_QOSGRP			UINT64_C(0x00000000000001e0)
    459  1.1  hikaru #define POW_IDXPTR_LOAD_GET_DES_GET_TAIL	UINT64_C(0x0000000000000010)
    460  1.1  hikaru #define POW_IDXPTR_LOAD_GET_RMT			UINT64_C(0x0000000000000008)
    461  1.1  hikaru #define POW_IDXPTR_LOAD_2_0			UINT64_C(0x0000000000000007)
    462  1.1  hikaru 
    463  1.1  hikaru /* get_rmt = 0 and get_des_get_tail = 0 ("qos") */
    464  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_63_52		UINT64_C(0xfff0000000000000)
    465  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_VAL		UINT64_C(0x0008000000000000)
    466  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_ONE		UINT64_C(0x0004000000000000)
    467  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_49		UINT64_C(0x0002000000000000)
    468  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_HEAD		UINT64_C(0x0001ffc000000000)
    469  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_37		UINT64_C(0x0000002000000000)
    470  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_TAIL		UINT64_C(0x0000001ffc000000)
    471  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_VAL		UINT64_C(0x0000000002000000)
    472  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_ONE		UINT64_C(0x0000000001000000)
    473  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_23		UINT64_C(0x0000000000800000)
    474  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_HEAD		UINT64_C(0x00000000007ff000)
    475  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_11		UINT64_C(0x0000000000000800)
    476  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_TAIL		UINT64_C(0x00000000000007ff)
    477  1.1  hikaru 
    478  1.1  hikaru /* get_rmt = 0 and get_des_get_tail = 1 ("desched") */
    479  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_63_52	UINT64_C(0xfff0000000000000)
    480  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_VAL	UINT64_C(0x0008000000000000)
    481  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_ONE	UINT64_C(0x0004000000000000)
    482  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_49		UINT64_C(0x0002000000000000)
    483  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_HEAD	UINT64_C(0x0001ffc000000000)
    484  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_37		UINT64_C(0x0000002000000000)
    485  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_TAIL	UINT64_C(0x0000001ffc000000)
    486  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_VAL		UINT64_C(0x0000000002000000)
    487  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_ONE		UINT64_C(0x0000000001000000)
    488  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_23		UINT64_C(0x0000000000800000)
    489  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_HEAD		UINT64_C(0x00000000007ff000)
    490  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_11		UINT64_C(0x0000000000000800)
    491  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_TAIL		UINT64_C(0x00000000000007ff)
    492  1.1  hikaru 
    493  1.1  hikaru /* get_rmt = 1 and get_des_get_tail = 0 ("remote_head") */
    494  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_XXX_63_39	UINT64_C(0xffffff8000000000)
    495  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_IS_HEAD	UINT64_C(0x0000004000000000)
    496  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_VAL	UINT64_C(0x0000002000000000)
    497  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_ONE	UINT64_C(0x0000001000000000)
    498  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_HEAD	UINT64_C(0x0000000fffffffff)
    499  1.1  hikaru 
    500  1.1  hikaru /* get_rmt = 1 and get_des_get_tail = 1 ("remote_tail") */
    501  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_XXX_63_39	UINT64_C(0xffffff8000000000)
    502  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_IS_HEAD	UINT64_C(0x0000004000000000)
    503  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_VAL	UINT64_C(0x0000002000000000)
    504  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_ONE	UINT64_C(0x0000001000000000)
    505  1.1  hikaru #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_TAIL	UINT64_C(0x0000000fffffffff)
    506  1.1  hikaru 
    507  1.2  simonb /* pow null rd */
    508  1.2  simonb #define	POW_OP_SUBDID_NULL_RD			4
    509  1.1  hikaru #define POW_NULL_RD_LOAD_39_3			UINT64_C(0x000000fffffffff8)
    510  1.1  hikaru #define POW_NULL_RD_LOAD_2_0			UINT64_C(0x0000000000000007)
    511  1.1  hikaru 
    512  1.1  hikaru #define POW_NULL_RD_LOAD_RESULT_63_2		UINT64_C(0xfffffffffffffffc)
    513  1.1  hikaru #define POW_NULL_RD_LOAD_RESULT_STATUS		UINT64_C(0x0000000000000003)
    514  1.1  hikaru 
    515  1.2  simonb /* -- pow iobdma operations */
    516  1.2  simonb 
    517  1.2  simonb #define	POW_MAJOR_DID				0xc
    518  1.2  simonb #define	POW_IOBDMA_LEN				1	/* always 1 for POW */
    519  1.2  simonb 
    520  1.2  simonb /* pow iobdma get work */
    521  1.2  simonb #define	POW_IOBDMA_SUBDID_GET_WORK		POW_OP_SUBDID_GET_WORK
    522  1.2  simonb #define POW_IOBDMA_GET_WORK_WAIT		UINT64_C(0x0000000000000008)
    523  1.2  simonb 
    524  1.2  simonb #define POW_IOBDMA_GET_WORK_RESULT_NO_WORK	UINT64_C(0x8000000000000000)
    525  1.2  simonb #define POW_IOBDMA_GET_WORK_RESULT_ADDR		UINT64_C(0x000000ffffffffff)
    526  1.2  simonb 
    527  1.2  simonb /* pow iobdma null rd */
    528  1.2  simonb #define	POW_IOBDMA_SUBDID_NULL_RD		POW_OP_SUBDID_NULL_RD
    529  1.2  simonb #define POW_IOBDMA_NULL_RD_RESULT_STATUS	UINT64_C(0x0000000000000003)
    530  1.2  simonb 
    531  1.2  simonb /* -- pow store operations */
    532  1.1  hikaru /* pow store operations */
    533  1.2  simonb #define	POW_STORE_SUBDID_SWTAG_FULL		0
    534  1.2  simonb #define	POW_STORE_SUBDID_DESCHED		3
    535  1.2  simonb #define	POW_STORE_SUBDID_OTHER			1
    536  1.1  hikaru 
    537  1.1  hikaru #define POW_PHY_ADDR_STORE_ADDR			UINT64_C(0x0000000fffffffff)
    538  1.1  hikaru 
    539  1.1  hikaru #define POW_STORE_DATA_NO_SCHED			UINT64_C(0x8000000000000000)
    540  1.1  hikaru #define POW_STORE_DATA_62_61			UINT64_C(0x6000000000000000)
    541  1.1  hikaru #define POW_STORE_DATA_INDEX			UINT64_C(0x1fff000000000000)
    542  1.1  hikaru #define POW_STORE_DATA_OP			UINT64_C(0x0000f00000000000)
    543  1.1  hikaru #define POW_STORE_DATA_43_42			UINT64_C(0x00000c0000000000)
    544  1.1  hikaru #define POW_STORE_DATA_QOS			UINT64_C(0x0000038000000000)
    545  1.1  hikaru #define POW_STORE_DATA_GRP			UINT64_C(0x0000007800000000)
    546  1.1  hikaru #define POW_STORE_DATA_TYPE			UINT64_C(0x0000000700000000)
    547  1.1  hikaru #define POW_STORE_DATA_TAG			UINT64_C(0x00000000ffffffff)
    548  1.1  hikaru 
    549  1.1  hikaru /* ------------------------------------------------------------------------- */
    550  1.1  hikaru 
    551  1.1  hikaru /* Work Queue Entry */
    552  1.1  hikaru 
    553  1.1  hikaru #define	POW_WQE_WORD0_XXX_63_40			UINT64_C(0xffffff0000000000)
    554  1.1  hikaru #define	POW_WQE_WORD0_NEXT			UINT64_C(0x000000ffffffffff)
    555  1.1  hikaru 
    556  1.1  hikaru #define	POW_WQE_WORD1_XXX_63_42			UINT64_C(0xfffffc0000000000)
    557  1.1  hikaru #define	POW_WQE_WORD1_QOS			UINT64_C(0x0000038000000000)
    558  1.1  hikaru #define	POW_WQE_WORD1_GRP			UINT64_C(0x0000007800000000)
    559  1.1  hikaru #define	POW_WQE_WORD1_TT			UINT64_C(0x0000000700000000)
    560  1.1  hikaru #define	POW_WQE_WORD1_TAG			UINT64_C(0x00000000ffffffff)
    561  1.1  hikaru 
    562  1.1  hikaru /* ------------------------------------------------------------------------- */
    563  1.1  hikaru 
    564  1.1  hikaru #endif /* _OCTEON_POWREG_H_ */
    565