octeon_powreg.h revision 1.1
1 /* $NetBSD: octeon_powreg.h,v 1.1 2015/04/29 08:32:01 hikaru Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * POW Registers 31 */ 32 33 #ifndef _OCTEON_POWREG_H_ 34 #define _OCTEON_POWREG_H_ 35 36 /* ---- register addresses */ 37 38 #define POW_PP_GRP_MSK0 UINT64_C(0x0001670000000000) 39 #define POW_PP_GRP_MSK1 UINT64_C(0x0001670000000008) 40 #define POW_WQ_INT_THR0 UINT64_C(0x0001670000000080) 41 #define POW_WQ_INT_THR1 UINT64_C(0x0001670000000088) 42 #define POW_WQ_INT_THR2 UINT64_C(0x0001670000000090) 43 #define POW_WQ_INT_THR3 UINT64_C(0x0001670000000098) 44 #define POW_WQ_INT_THR4 UINT64_C(0x00016700000000a0) 45 #define POW_WQ_INT_THR5 UINT64_C(0x00016700000000a8) 46 #define POW_WQ_INT_THR6 UINT64_C(0x00016700000000b0) 47 #define POW_WQ_INT_THR7 UINT64_C(0x00016700000000b8) 48 #define POW_WQ_INT_THR8 UINT64_C(0x00016700000000c0) 49 #define POW_WQ_INT_THR9 UINT64_C(0x00016700000000c8) 50 #define POW_WQ_INT_THR10 UINT64_C(0x00016700000000d0) 51 #define POW_WQ_INT_THR11 UINT64_C(0x00016700000000d8) 52 #define POW_WQ_INT_THR12 UINT64_C(0x00016700000000e0) 53 #define POW_WQ_INT_THR13 UINT64_C(0x00016700000000e8) 54 #define POW_WQ_INT_THR14 UINT64_C(0x00016700000000f0) 55 #define POW_WQ_INT_THR15 UINT64_C(0x00016700000000f8) 56 #define POW_WQ_INT_CNT0 UINT64_C(0x0001670000000100) 57 #define POW_WQ_INT_CNT1 UINT64_C(0x0001670000000108) 58 #define POW_WQ_INT_CNT2 UINT64_C(0x0001670000000110) 59 #define POW_WQ_INT_CNT3 UINT64_C(0x0001670000000118) 60 #define POW_WQ_INT_CNT4 UINT64_C(0x0001670000000120) 61 #define POW_WQ_INT_CNT5 UINT64_C(0x0001670000000128) 62 #define POW_WQ_INT_CNT6 UINT64_C(0x0001670000000130) 63 #define POW_WQ_INT_CNT7 UINT64_C(0x0001670000000138) 64 #define POW_WQ_INT_CNT8 UINT64_C(0x0001670000000140) 65 #define POW_WQ_INT_CNT9 UINT64_C(0x0001670000000148) 66 #define POW_WQ_INT_CNT10 UINT64_C(0x0001670000000150) 67 #define POW_WQ_INT_CNT11 UINT64_C(0x0001670000000158) 68 #define POW_WQ_INT_CNT12 UINT64_C(0x0001670000000160) 69 #define POW_WQ_INT_CNT13 UINT64_C(0x0001670000000168) 70 #define POW_WQ_INT_CNT14 UINT64_C(0x0001670000000170) 71 #define POW_WQ_INT_CNT15 UINT64_C(0x0001670000000178) 72 #define POW_QOS_THR0 UINT64_C(0x0001670000000180) 73 #define POW_QOS_THR1 UINT64_C(0x0001670000000188) 74 #define POW_QOS_THR2 UINT64_C(0x0001670000000190) 75 #define POW_QOS_THR3 UINT64_C(0x0001670000000198) 76 #define POW_QOS_THR4 UINT64_C(0x00016700000001a0) 77 #define POW_QOS_THR5 UINT64_C(0x00016700000001a8) 78 #define POW_QOS_THR6 UINT64_C(0x00016700000001b0) 79 #define POW_QOS_THR7 UINT64_C(0x00016700000001b8) 80 #define POW_QOS_RND0 UINT64_C(0x00016700000001c0) 81 #define POW_QOS_RND1 UINT64_C(0x00016700000001c8) 82 #define POW_QOS_RND2 UINT64_C(0x00016700000001d0) 83 #define POW_QOS_RND3 UINT64_C(0x00016700000001d8) 84 #define POW_QOS_RND4 UINT64_C(0x00016700000001e0) 85 #define POW_QOS_RND5 UINT64_C(0x00016700000001e8) 86 #define POW_QOS_RND6 UINT64_C(0x00016700000001f0) 87 #define POW_QOS_RND7 UINT64_C(0x00016700000001f8) 88 #define POW_WQ_INT UINT64_C(0x0001670000000200) 89 #define POW_WQ_INT_PC UINT64_C(0x0001670000000208) 90 #define POW_NW_TIM UINT64_C(0x0001670000000210) 91 #define POW_ECC_ERR UINT64_C(0x0001670000000218) 92 #define POW_NOS_CNT UINT64_C(0x0001670000000220) 93 #define POW_WS_PC0 UINT64_C(0x0001670000000280) 94 #define POW_WS_PC1 UINT64_C(0x0001670000000288) 95 #define POW_WS_PC2 UINT64_C(0x0001670000000290) 96 #define POW_WS_PC3 UINT64_C(0x0001670000000298) 97 #define POW_WS_PC4 UINT64_C(0x00016700000002a0) 98 #define POW_WS_PC5 UINT64_C(0x00016700000002a8) 99 #define POW_WS_PC6 UINT64_C(0x00016700000002b0) 100 #define POW_WS_PC7 UINT64_C(0x00016700000002b8) 101 #define POW_WS_PC8 UINT64_C(0x00016700000002c0) 102 #define POW_WS_PC9 UINT64_C(0x00016700000002c8) 103 #define POW_WS_PC10 UINT64_C(0x00016700000002d0) 104 #define POW_WS_PC11 UINT64_C(0x00016700000002d8) 105 #define POW_WS_PC12 UINT64_C(0x00016700000002e0) 106 #define POW_WS_PC13 UINT64_C(0x00016700000002e8) 107 #define POW_WS_PC14 UINT64_C(0x00016700000002f0) 108 #define POW_WS_PC15 UINT64_C(0x00016700000002f8) 109 #define POW_WA_PC0 UINT64_C(0x0001670000000300) 110 #define POW_WA_PC1 UINT64_C(0x0001670000000308) 111 #define POW_WA_PC2 UINT64_C(0x0001670000000310) 112 #define POW_WA_PC3 UINT64_C(0x0001670000000318) 113 #define POW_WA_PC4 UINT64_C(0x0001670000000320) 114 #define POW_WA_PC5 UINT64_C(0x0001670000000328) 115 #define POW_WA_PC6 UINT64_C(0x0001670000000330) 116 #define POW_WA_PC7 UINT64_C(0x0001670000000338) 117 #define POW_IQ_CNT0 UINT64_C(0x0001670000000340) 118 #define POW_IQ_CNT1 UINT64_C(0x0001670000000348) 119 #define POW_IQ_CNT2 UINT64_C(0x0001670000000350) 120 #define POW_IQ_CNT3 UINT64_C(0x0001670000000358) 121 #define POW_IQ_CNT4 UINT64_C(0x0001670000000360) 122 #define POW_IQ_CNT5 UINT64_C(0x0001670000000368) 123 #define POW_IQ_CNT6 UINT64_C(0x0001670000000370) 124 #define POW_IQ_CNT7 UINT64_C(0x0001670000000378) 125 #define POW_WA_COM_PC UINT64_C(0x0001670000000380) 126 #define POW_IQ_COM_CNT UINT64_C(0x0001670000000388) 127 #define POW_TS_PC UINT64_C(0x0001670000000390) 128 #define POW_DS_PC UINT64_C(0x0001670000000398) 129 #define POW_BIST_STAT UINT64_C(0x00016700000003f8) 130 131 #define POW_BASE UINT64_C(0x0001670000000000) 132 #define POW_SIZE UINT64_C(0x400) 133 134 #define POW_PP_GRP_MSK0_OFFSET UINT64_C(0x0) 135 #define POW_PP_GRP_MSK1_OFFSET UINT64_C(0x8) 136 #define POW_WQ_INT_THR0_OFFSET UINT64_C(0x80) 137 #define POW_WQ_INT_THR1_OFFSET UINT64_C(0x88) 138 #define POW_WQ_INT_THR2_OFFSET UINT64_C(0x90) 139 #define POW_WQ_INT_THR3_OFFSET UINT64_C(0x98) 140 #define POW_WQ_INT_THR4_OFFSET UINT64_C(0xa0) 141 #define POW_WQ_INT_THR5_OFFSET UINT64_C(0xa8) 142 #define POW_WQ_INT_THR6_OFFSET UINT64_C(0xb0) 143 #define POW_WQ_INT_THR7_OFFSET UINT64_C(0xb8) 144 #define POW_WQ_INT_THR8_OFFSET UINT64_C(0xc0) 145 #define POW_WQ_INT_THR9_OFFSET UINT64_C(0xc8) 146 #define POW_WQ_INT_THR10_OFFSET UINT64_C(0xd0) 147 #define POW_WQ_INT_THR11_OFFSET UINT64_C(0xd8) 148 #define POW_WQ_INT_THR12_OFFSET UINT64_C(0xe0) 149 #define POW_WQ_INT_THR13_OFFSET UINT64_C(0xe8) 150 #define POW_WQ_INT_THR14_OFFSET UINT64_C(0xf0) 151 #define POW_WQ_INT_THR15_OFFSET UINT64_C(0xf8) 152 #define POW_WQ_INT_CNT0_OFFSET UINT64_C(0x100) 153 #define POW_WQ_INT_CNT1_OFFSET UINT64_C(0x108) 154 #define POW_WQ_INT_CNT2_OFFSET UINT64_C(0x110) 155 #define POW_WQ_INT_CNT3_OFFSET UINT64_C(0x118) 156 #define POW_WQ_INT_CNT4_OFFSET UINT64_C(0x120) 157 #define POW_WQ_INT_CNT5_OFFSET UINT64_C(0x128) 158 #define POW_WQ_INT_CNT6_OFFSET UINT64_C(0x130) 159 #define POW_WQ_INT_CNT7_OFFSET UINT64_C(0x138) 160 #define POW_WQ_INT_CNT8_OFFSET UINT64_C(0x140) 161 #define POW_WQ_INT_CNT9_OFFSET UINT64_C(0x148) 162 #define POW_WQ_INT_CNT10_OFFSET UINT64_C(0x150) 163 #define POW_WQ_INT_CNT11_OFFSET UINT64_C(0x158) 164 #define POW_WQ_INT_CNT12_OFFSET UINT64_C(0x160) 165 #define POW_WQ_INT_CNT13_OFFSET UINT64_C(0x168) 166 #define POW_WQ_INT_CNT14_OFFSET UINT64_C(0x170) 167 #define POW_WQ_INT_CNT15_OFFSET UINT64_C(0x178) 168 #define POW_QOS_THR0_OFFSET UINT64_C(0x180) 169 #define POW_QOS_THR1_OFFSET UINT64_C(0x188) 170 #define POW_QOS_THR2_OFFSET UINT64_C(0x190) 171 #define POW_QOS_THR3_OFFSET UINT64_C(0x198) 172 #define POW_QOS_THR4_OFFSET UINT64_C(0x1a0) 173 #define POW_QOS_THR5_OFFSET UINT64_C(0x1a8) 174 #define POW_QOS_THR6_OFFSET UINT64_C(0x1b0) 175 #define POW_QOS_THR7_OFFSET UINT64_C(0x1b8) 176 #define POW_QOS_RND0_OFFSET UINT64_C(0x1c0) 177 #define POW_QOS_RND1_OFFSET UINT64_C(0x1c8) 178 #define POW_QOS_RND2_OFFSET UINT64_C(0x1d0) 179 #define POW_QOS_RND3_OFFSET UINT64_C(0x1d8) 180 #define POW_QOS_RND4_OFFSET UINT64_C(0x1e0) 181 #define POW_QOS_RND5_OFFSET UINT64_C(0x1e8) 182 #define POW_QOS_RND6_OFFSET UINT64_C(0x1f0) 183 #define POW_QOS_RND7_OFFSET UINT64_C(0x1f8) 184 #define POW_WQ_INT_OFFSET UINT64_C(0x200) 185 #define POW_WQ_INT_PC_OFFSET UINT64_C(0x208) 186 #define POW_NW_TIM_OFFSET UINT64_C(0x210) 187 #define POW_ECC_ERR_OFFSET UINT64_C(0x218) 188 #define POW_NOS_CNT_OFFSET UINT64_C(0x220) 189 #define POW_WS_PC0_OFFSET UINT64_C(0x280) 190 #define POW_WS_PC1_OFFSET UINT64_C(0x288) 191 #define POW_WS_PC2_OFFSET UINT64_C(0x290) 192 #define POW_WS_PC3_OFFSET UINT64_C(0x298) 193 #define POW_WS_PC4_OFFSET UINT64_C(0x2a0) 194 #define POW_WS_PC5_OFFSET UINT64_C(0x2a8) 195 #define POW_WS_PC6_OFFSET UINT64_C(0x2b0) 196 #define POW_WS_PC7_OFFSET UINT64_C(0x2b8) 197 #define POW_WS_PC8_OFFSET UINT64_C(0x2c0) 198 #define POW_WS_PC9_OFFSET UINT64_C(0x2c8) 199 #define POW_WS_PC10_OFFSET UINT64_C(0x2d0) 200 #define POW_WS_PC11_OFFSET UINT64_C(0x2d8) 201 #define POW_WS_PC12_OFFSET UINT64_C(0x2e0) 202 #define POW_WS_PC13_OFFSET UINT64_C(0x2e8) 203 #define POW_WS_PC14_OFFSET UINT64_C(0x2f0) 204 #define POW_WS_PC15_OFFSET UINT64_C(0x2f8) 205 #define POW_WA_PC0_OFFSET UINT64_C(0x300) 206 #define POW_WA_PC1_OFFSET UINT64_C(0x308) 207 #define POW_WA_PC2_OFFSET UINT64_C(0x310) 208 #define POW_WA_PC3_OFFSET UINT64_C(0x318) 209 #define POW_WA_PC4_OFFSET UINT64_C(0x320) 210 #define POW_WA_PC5_OFFSET UINT64_C(0x328) 211 #define POW_WA_PC6_OFFSET UINT64_C(0x330) 212 #define POW_WA_PC7_OFFSET UINT64_C(0x338) 213 #define POW_IQ_CNT0_OFFSET UINT64_C(0x340) 214 #define POW_IQ_CNT1_OFFSET UINT64_C(0x348) 215 #define POW_IQ_CNT2_OFFSET UINT64_C(0x350) 216 #define POW_IQ_CNT3_OFFSET UINT64_C(0x358) 217 #define POW_IQ_CNT4_OFFSET UINT64_C(0x360) 218 #define POW_IQ_CNT5_OFFSET UINT64_C(0x368) 219 #define POW_IQ_CNT6_OFFSET UINT64_C(0x370) 220 #define POW_IQ_CNT7_OFFSET UINT64_C(0x378) 221 #define POW_WA_COM_PC_OFFSET UINT64_C(0x380) 222 #define POW_IQ_COM_CNT_OFFSET UINT64_C(0x388) 223 #define POW_TS_PC_OFFSET UINT64_C(0x390) 224 #define POW_DS_PC_OFFSET UINT64_C(0x398) 225 #define POW_BIST_STAT_OFFSET UINT64_C(0x3f8) 226 227 /* ---- register bits */ 228 229 #define POW_PP_GRP_MSKX_XXX_63_16 UINT64_C(0xffffffffffff0000) 230 #define POW_PP_GRP_MSKX_GRP_MSK UINT64_C(0x000000000000ffff) 231 #define POW_PP_GRP_MSKX_GRP_MSK_SHIFT 0 232 233 #define POW_WQ_INT_THRX_XXX_63_29 UINT64_C(0xffffffffe0000000) 234 #define POW_WQ_INT_THRX_TC_EN UINT64_C(0x0000000010000000) 235 #define POW_WQ_INT_THRX_TC_THR UINT64_C(0x000000000f000000) 236 #define POW_WQ_INT_THRX_TC_THR_SHIFT 24 237 #define POW_WQ_INT_THRX_XXX_23_18 UINT64_C(0x0000000000fc0000) 238 #define POW_WQ_INT_THRX_DS_THR UINT64_C(0x000000000003f000) 239 #define POW_WQ_INT_THRX_DS_THR_SHIFT 12 240 #define POW_WQ_INT_THRX_XXX_11_6 UINT64_C(0x0000000000000fc0) 241 #define POW_WQ_INT_THRX_IQ_THR UINT64_C(0x000000000000003f) 242 #define POW_WQ_INT_THRX_IQ_THR_SHIFT 0 243 244 #define POW_WQ_INT_CNTX_XXX_63_28 UINT64_C(0xfffffffff0000000) 245 #define POW_WQ_INT_CNTX_TC_CNT UINT64_C(0x000000000f000000) 246 #define POW_WQ_INT_CNTX_TC_CNT_SHIFT 24 247 #define POW_WQ_INT_CNTX_XXX_23_18 UINT64_C(0x0000000000fc0000) 248 #define POW_WQ_INT_CNTX_DS_CNT UINT64_C(0x000000000003f000) 249 #define POW_WQ_INT_CNTX_DS_CNT_SHIFT 12 250 #define POW_WQ_INT_CNTX_XXX_11_6 UINT64_C(0x0000000000000fc0) 251 #define POW_WQ_INT_CNTX_IQ_CNT UINT64_C(0x000000000000003f) 252 #define POW_WQ_INT_CNTX_IQ_CNT_SHIFT 0 253 254 #define POW_QOS_THRX_XXX_63_55 UINT64_C(0xff80000000000000) 255 #define POW_QOS_THRX_DES_CNT UINT64_C(0x007f000000000000) 256 #define POW_QOS_THRX_DES_CNT_SHIFT 48 257 #define POW_QOS_THRX_XXX_47_43 UINT64_C(0x0000f80000000000) 258 #define POW_QOS_THRX_BUF_CNT UINT64_C(0x000007f000000000) 259 #define POW_QOS_THRX_BUF_CNT_SHIFT 36 260 #define POW_QOS_THRX_XXX_35_31 UINT64_C(0x0000000f80000000) 261 #define POW_QOS_THRX_FREE_CNT UINT64_C(0x000000007f000000) 262 #define POW_QOS_THRX_FREE_CNT_SHIFT 24 263 #define POW_QOS_THRX_XXX_23_18 UINT64_C(0x0000000000fc0000) 264 #define POW_QOS_THRX_MAX_THR UINT64_C(0x000000000003f000) 265 #define POW_QOS_THRX_MAX_THR_SHIFT 12 266 #define POW_QOS_THRX_XXX_11_6 UINT64_C(0x0000000000000fc0) 267 #define POW_QOS_THRX_MIN_THR UINT64_C(0x000000000000003f) 268 #define POW_QOS_THRX_MIN_THR_SHIFT 0 269 270 #define POW_QOS_RNDX_XXX_63_32 UINT64_C(0xffffffff00000000) 271 #define POW_QOS_RNDX_RND_P3 UINT64_C(0x00000000ff000000) 272 #define POW_QOS_RNDX_RND_P3_SHIFT 24 273 #define POW_QOS_RNDX_RND_P2 UINT64_C(0x0000000000ff0000) 274 #define POW_QOS_RNDX_RND_P2_SHIFT 16 275 #define POW_QOS_RNDX_RND_P1 UINT64_C(0x000000000000ff00) 276 #define POW_QOS_RNDX_RND_P1_SHIFT 8 277 #define POW_QOS_RNDX_RND UINT64_C(0x00000000000000ff) 278 #define POW_QOS_RNDX_RND_SHIFT 0 279 280 #define POW_WQ_INT_XXX_63_32 UINT64_C(0xffffffff00000000) 281 #define POW_WQ_INT_IQ_DIS UINT64_C(0x00000000ffff0000) 282 #define POW_WQ_INT_IQ_DIS_SHIFT 16 283 #define POW_WQ_INT_WQ_INT UINT64_C(0x000000000000ffff) 284 #define POW_WQ_INT_WQ_INT_SHIFT 0 285 286 #define POW_WQ_INT_PC_XXX_63_60 UINT64_C(0xf000000000000000) 287 #define POW_WQ_INT_PC_PC UINT64_C(0x0fffffff00000000) 288 #define POW_WQ_INT_PC_PC_SHIFT 32 289 #define POW_WQ_INT_PC_XXX_31_28 UINT64_C(0x00000000f0000000) 290 #define POW_WQ_INT_PC_PC_THR UINT64_C(0x000000000fffff00) 291 #define POW_WQ_INT_PC_PC_THR_SHIFT 8 292 #define POW_WQ_INT_PC_XXX_7_0 UINT64_C(0x00000000000000ff) 293 294 #define POW_NW_TIM_XXX_63_10 UINT64_C(0xfffffffffffffc00) 295 #define POW_NW_TIM_NW_TIM UINT64_C(0x00000000000003ff) 296 #define POW_NW_TIM_NW_TIM_SHIFT 0 297 298 #define POW_ECC_ERR_XXX_63_45 UINT64_C(0xffffe00000000000) 299 #define POW_ECC_ERR_IOP_IE UINT64_C(0x00001fff00000000) 300 #define POW_ECC_ERR_IOP_IE_SHIFT 32 301 #define POW_ECC_ERR_XXX_31_29 UINT64_C(0x00000000e0000000) 302 #define POW_ECC_ERR_IOP UINT64_C(0x000000001fff0000) 303 #define POW_ECC_ERR_IOP_SHIFT 16 304 #define POW_ECC_ERR_IOP_CSRPEND (UINT64_C(28) << POW_ECC_ERR_IOP_SHIFT) 305 #define POW_ECC_ERR_IOP_DBGPEND (UINT64_C(27) << POW_ECC_ERR_IOP_SHIFT) 306 #define POW_ECC_ERR_IOP_ADDWORK (UINT64_C(26) << POW_ECC_ERR_IOP_SHIFT) 307 #define POW_ECC_ERR_IOP_ILLOP (UINT64_C(25) << POW_ECC_ERR_IOP_SHIFT) 308 #define POW_ECC_ERR_IOP_PEND24 (UINT64_C(24) << POW_ECC_ERR_IOP_SHIFT) 309 #define POW_ECC_ERR_IOP_PEND23 (UINT64_C(23) << POW_ECC_ERR_IOP_SHIFT) 310 #define POW_ECC_ERR_IOP_PEND22 (UINT64_C(22) << POW_ECC_ERR_IOP_SHIFT) 311 #define POW_ECC_ERR_IOP_PEND21 (UINT64_C(21) << POW_ECC_ERR_IOP_SHIFT) 312 #define POW_ECC_ERR_IOP_TAGNULL (UINT64_C(20) << POW_ECC_ERR_IOP_SHIFT) 313 #define POW_ECC_ERR_IOP_TAGNULLNULL (UINT64_C(19) << POW_ECC_ERR_IOP_SHIFT) 314 #define POW_ECC_ERR_IOP_ORDATOM (UINT64_C(18) << POW_ECC_ERR_IOP_SHIFT) 315 #define POW_ECC_ERR_IOP_NULL (UINT64_C(17) << POW_ECC_ERR_IOP_SHIFT) 316 #define POW_ECC_ERR_IOP_NULLNULL (UINT64_C(16) << POW_ECC_ERR_IOP_SHIFT) 317 #define POW_ECC_ERR_XXX_15_14 UINT64_C(0x000000000000c000) 318 #define POW_ECC_ERR_RPE_IE UINT64_C(0x0000000000002000) 319 #define POW_ECC_ERR_RPE UINT64_C(0x0000000000001000) 320 #define POW_ECC_ERR_XXX_11_9 UINT64_C(0x0000000000000e00) 321 #define POW_ECC_ERR_SYN UINT64_C(0x00000000000001f0) 322 #define POW_ECC_ERR_SYN_SHIFT 4 323 #define POW_ECC_ERR_DBE_IE UINT64_C(0x0000000000000008) 324 #define POW_ECC_ERR_SBE_IE UINT64_C(0x0000000000000004) 325 #define POW_ECC_ERR_DBE UINT64_C(0x0000000000000002) 326 #define POW_ECC_ERR_SBE UINT64_C(0x0000000000000001) 327 328 #define POW_NOS_CNT_XXX_63_7 UINT64_C(0xffffffffffffff80) 329 #define POW_NOS_CNT_NOS_CNT UINT64_C(0x000000000000007f) 330 #define POW_NOS_CNT_NOS_CNT_SHIFT 0 331 332 #define POW_WS_PC0_XXX_63_32 UINT64_C(0xffffffff00000000) 333 #define POW_WS_PC0_WS_PC UINT64_C(0x00000000ffffffff) 334 #define POW_WS_PC0_WS_PC_SHIFT 0 335 336 #define POW_WA_PC0_XXX_63_32 UINT64_C(0xffffffff00000000) 337 #define POW_WA_PC0_WA_PC UINT64_C(0x00000000ffffffff) 338 #define POW_WA_PC0_WA_PC_SHIFT 0 339 340 #define POW_IQ_CNT0_XXX_63_32 UINT64_C(0xffffffff00000000) 341 #define POW_IQ_CNT0_IQ_CNT UINT64_C(0x00000000ffffffff) 342 #define POW_IQ_CNT0_IQ_CNT_SHIFT 0 343 344 #define POW_WA_COM_PC_XXX_63_32 UINT64_C(0xffffffff00000000) 345 #define POW_WA_COM_PC_WA_PC UINT64_C(0x00000000ffffffff) 346 #define POW_WA_COM_PC_WA_PC_SHIFT 0 347 348 #define POW_WQ_COM_CNT_XXX_63_32 UINT64_C(0xffffffff00000000) 349 #define POW_WQ_COM_CNT_IQ_CNT UINT64_C(0x00000000ffffffff) 350 #define POW_WQ_COM_CNT_IQ_CNT_SHIFT 0 351 352 #define POW_TS_PC_XXX_63_32 UINT64_C(0xffffffff00000000) 353 #define POW_TS_PC_TS_PC UINT64_C(0x00000000ffffffff) 354 #define POW_TS_PC_TS_PC_SHIFT 0 355 356 #define POW_DS_PC_XXX_63_32 UINT64_C(0xffffffff00000000) 357 #define POW_DS_PC_DS_PC UINT64_C(0x00000000ffffffff) 358 #define POW_DS_PC_DS_PC_SHIFT 0 359 360 #define POW_BIST_STAT_XXX_63_7 UINT64_C(0xfffffffffffe0000) 361 #define POW_BIST_STAT_PP UINT64_C(0x0000000000010000) 362 #define POW_BIST_STAT_XXX_15_9 UINT64_C(0x000000000000fe00) 363 #define POW_BIST_STAT_CAM UINT64_C(0x0000000000000100) 364 #define POW_BIST_STAT_NBT1 UINT64_C(0x0000000000000080) 365 #define POW_BIST_STAT_NBT0 UINT64_C(0x0000000000000040) 366 #define POW_BIST_STAT_IDX UINT64_C(0x0000000000000020) 367 #define POW_BIST_STAT_FIDX UINT64_C(0x0000000000000010) 368 #define POW_BIST_STAT_NBR1 UINT64_C(0x0000000000000008) 369 #define POW_BIST_STAT_NBR0 UINT64_C(0x0000000000000004) 370 #define POW_BIST_STAT_PEND UINT64_C(0x0000000000000002) 371 #define POW_BIST_STAT_ADR UINT64_C(0x0000000000000001) 372 373 /* ---- pow operations */ 374 375 /* pow operations base */ 376 #define POW_OPERATION_BASE_IO_BIT UINT64_C(0x0001000000000000) 377 #define POW_OPERATION_BASE_MAJOR_DID UINT64_C(0x0000f80000000000) 378 #define POW_OPERATION_BASE_SUB_DID UINT64_C(0x0000070000000000) 379 #define POW_OPERATION_BASE_IO_BIT_SHIFT 48 380 #define POW_OPERATION_BASE_MAJOR_DID_SHIFT 43 381 #define POW_OPERATION_BASE_SUB_DID_SHIFT 40 382 383 /* get work load (subid = 0) */ 384 #define POW_GET_WORK_LOAD_WAIT UINT64_C(0x0000000000000008) 385 #define POW_GET_WORK_LOAD_2_0 UINT64_C(0x0000000000000007) 386 #define POW_GET_WORK_LOAD_WAIT_SHIFT 3 387 #define POW_GET_WORK_LOAD_2_0_SHIFT 0 388 389 #define POW_GET_WORK_LOAD_RESULT_NO_WORK UINT64_C(0x8000000000000000) 390 #define POW_GET_WORK_LOAD_RESULT_62_40 UINT64_C(0x7fffff0000000000) 391 #define POW_GET_WORK_LOAD_RESULT_ADDR UINT64_C(0x000000ffffffffff) 392 393 /* pow status load (subid = 1) */ 394 #define POW_STATUS_LOAD_COREID UINT64_C(0x00000000000003c0) 395 #define POW_STATUS_LOAD_GET_REV UINT64_C(0x0000000000000020) 396 #define POW_STATUS_LOAD_GET_CUR UINT64_C(0x0000000000000010) 397 #define POW_STATUS_LOAD_GET_WQP UINT64_C(0x0000000000000008) 398 #define POW_STATUS_LOAD_GET_2_0 UINT64_C(0x0000000000000007) 399 #define POW_STATUS_LOAD_GET_WQP_SHIFT 3 400 #define POW_STATUS_LOAD_GET_CUR_SHIFT 4 401 #define POW_STATUS_LOAD_COREID_SHIFT 6 402 #define POW_STATUS_LOAD_GET_2_0_SHIFT 0 403 #define POW_STATUS_LOAD_GET_REV_SHIFT 5 404 405 /* get_cur = 0 and get_wqp = 0 ("pend_tag") */ 406 #define POW_STATUS_LOAD_RESULT_PEND_TAG_XXX_63_62 UINT64_C(0xc000000000000000) 407 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH UINT64_C(0x2000000000000000) 408 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH_FULL UINT64_C(0x1000000000000000) 409 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_SWITCH_NULL UINT64_C(0x0800000000000000) 410 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_DESCHED UINT64_C(0x0400000000000000) 411 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_DESCHED_SWITCH UINT64_C(0x0200000000000000) 412 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NOSCHED UINT64_C(0x0100000000000000) 413 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NEW_WORK UINT64_C(0x0080000000000000) 414 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NEW_WORK_WAIT UINT64_C(0x0040000000000000) 415 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NULL_RD UINT64_C(0x0020000000000000) 416 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_NOSCHED_CLR UINT64_C(0x0010000000000000) 417 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_XXX_51 UINT64_C(0x0008000000000000) 418 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_INDEX UINT64_C(0x0007ff0000000000) 419 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_GRP UINT64_C(0x000000f000000000) 420 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_XXX_35_34 UINT64_C(0x0000000c00000000) 421 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_TYPE UINT64_C(0x0000000300000000) 422 #define POW_STATUS_LOAD_RESULT_PEND_TAG_PEND_TAG UINT64_C(0x00000000ffffffff) 423 #define POW_STATUS_LOAD_RESULT_PEND_TAG_BITS \ 424 "\177" /* new format */ \ 425 "\020" /* hex display */ \ 426 "\020" /* %016x format */ \ 427 "b\x3d" "PEND_SWITCH\0" \ 428 "b\x3c" "PEND_SWITCH_FULL\0" \ 429 "b\x3b" "PEND_SWITCH_NULL\0" \ 430 "b\x3a" "PEND_DESCHED\0" \ 431 "b\x39" "PEND_DESCHED_SWITCH\0" \ 432 "b\x38" "PEND_NOSCHED\0" \ 433 "b\x37" "PEND_NEW_WORK\0" \ 434 "b\x36" "PEND_NEW_WORK_WAIT\0" \ 435 "b\x35" "PEND_NULL_RD\0" \ 436 "b\x34" "PEND_NOSCHED_CLR\0" \ 437 "f\x28\x0b" "PEND_INDEX\0" \ 438 "f\x24\x04" "PEND_GRP\0" \ 439 "f\x20\x02" "PEND_TYPE\0" \ 440 "f\x00\x20" "PEND_TAG\0" 441 442 /* get_cur = 0 and get_wqp = 1 ("pend_wqp") */ 443 #define POW_STATUS_LOAD_RESULT_PEND_WQP_XXX_63_62 UINT64_C(0xc000000000000000) 444 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH UINT64_C(0x2000000000000000) 445 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH_FULL UINT64_C(0x1000000000000000) 446 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_SWITCH_NULL UINT64_C(0x0800000000000000) 447 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_DESCHED UINT64_C(0x0400000000000000) 448 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_DESCHED_SWITCH UINT64_C(0x0200000000000000) 449 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NOSCHED UINT64_C(0x0100000000000000) 450 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NEW_WORK UINT64_C(0x0080000000000000) 451 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NEW_WORK_WAIT UINT64_C(0x0040000000000000) 452 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NULL_RD UINT64_C(0x0020000000000000) 453 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_NOSCHED_CLR UINT64_C(0x0010000000000000) 454 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_XXX_51 UINT64_C(0x0008000000000000) 455 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_INDEX UINT64_C(0x0007ff0000000000) 456 #define POW_STATUS_LOAD_RESULT_PEND_WQP_PEND_WQP UINT64_C(0x0000000fffffffff) 457 #define POW_STATUS_LOAD_RESULT_PEND_WQP_BITS \ 458 "\177" /* new format */ \ 459 "\020" /* hex display */ \ 460 "\020" /* %016x format */ \ 461 "b\x3d" "PEND_SWITCH\0" \ 462 "b\x3c" "PEND_SWITCH_FULL\0" \ 463 "b\x3b" "PEND_SWITCH_NULL\0" \ 464 "b\x3a" "PEND_DESCHED\0" \ 465 "b\x39" "PEND_DESCHED_SWITCH\0" \ 466 "b\x38" "PEND_NOSCHED\0" \ 467 "b\x37" "PEND_NEW_WORK\0" \ 468 "b\x36" "PEND_NEW_WORK_WAIT\0" \ 469 "b\x35" "PEND_NULL_RD\0" \ 470 "b\x34" "PEND_NOSCHED_CLR\0" \ 471 "f\x28\x0b" "PEND_INDEX\0" \ 472 "f\x00\x24" "PEND_WQP\0" 473 474 /* get_cur = 1 and get_wqp = 0 and get_rev = 0 ("cur_tag_next") */ 475 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_XXX_63_62 UINT64_C(0xc000000000000000) 476 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_LINK_INDEX UINT64_C(0x3ff8000000000000) 477 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_INDEX UINT64_C(0x0007ff0000000000) 478 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_GRP UINT64_C(0x000000f000000000) 479 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_HEAD UINT64_C(0x0000000800000000) 480 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAIL UINT64_C(0x0000000400000000) 481 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAG_TYPE UINT64_C(0x0000000300000000) 482 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_TAG UINT64_C(0x00000000ffffffff) 483 #define POW_STATUS_LOAD_RESULT_CUR_TAG_NEXT_BITS \ 484 "\177" /* new format */ \ 485 "\020" /* hex display */ \ 486 "\020" /* %016x format */ \ 487 "f\x33\x0b" "LINK_INDEX\0" \ 488 "f\x28\x0b" "INDEX\0" \ 489 "f\x24\x04" "GRP\0" \ 490 "b\x23" "HEAD\0" \ 491 "b\x22" "TAIL\0" \ 492 "f\x20\x02" "TAG_TYPE\0" \ 493 "f\x00\x20" "TAG\0" 494 495 /* get_cur = 1 and get_wqp = 0 and get_rev = 1 ("cur_tag_prev") */ 496 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_XXX_63_62 UINT64_C(0xc000000000000000) 497 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_REVLINK_INDEX UINT64_C(0x3ff8000000000000) 498 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_INDEX UINT64_C(0x0007ff0000000000) 499 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_GRP UINT64_C(0x000000f000000000) 500 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_HEAD UINT64_C(0x0000000800000000) 501 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAIL UINT64_C(0x0000000400000000) 502 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAG_TYPE UINT64_C(0x0000000300000000) 503 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_TAG UINT64_C(0x00000000ffffffff) 504 #define POW_STATUS_LOAD_RESULT_CUR_TAG_PREV_BITS \ 505 "\177" /* new format */ \ 506 "\020" /* hex display */ \ 507 "\020" /* %016x format */ \ 508 "f\x33\x0b" "REVLINK_INDEX\0" \ 509 "f\x28\x0b" "INDEX\0" \ 510 "f\x24\x04" "GRP\0" \ 511 "b\x23" "HEAD\0" \ 512 "b\x22" "TAIL\0" \ 513 "f\x20\x02" "TAG_TYPE\0" \ 514 "f\x00\x20" "TAG\0" 515 516 /* get_cur = 1 and get_wqp = 1 and get_rev = 0 ("cur_wqp_next") */ 517 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_XXX_63_62 UINT64_C(0xc000000000000000) 518 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_LINK_INDEX UINT64_C(0x3ff8000000000000) 519 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_INDEX UINT64_C(0x0007ff0000000000) 520 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_GRP UINT64_C(0x000000f000000000) 521 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_WQP UINT64_C(0x0000000fffffffff) 522 #define POW_STATUS_LOAD_RESULT_CUR_WQP_NEXT_BITS \ 523 "\177" /* new format */ \ 524 "\020" /* hex display */ \ 525 "\020" /* %016x format */ \ 526 "f\x33\x0b" "LINK_INDEX\0" \ 527 "f\x28\x0b" "INDEX\0" \ 528 "f\x24\x04" "GRP\0" \ 529 "f\x00\x24" "WQP\0" 530 531 /* get_cur = 1 and get_wqp = 1 and get_rev = 1 ("cur_wqp_prev") */ 532 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_XXX_63_62 UINT64_C(0xc000000000000000) 533 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_REVLINK_INDEX UINT64_C(0x3ff8000000000000) 534 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_INDEX UINT64_C(0x0007ff0000000000) 535 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_GRP UINT64_C(0x000000f000000000) 536 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_WQP UINT64_C(0x0000000fffffffff) 537 #define POW_STATUS_LOAD_RESULT_CUR_WQP_PREV_BITS \ 538 "\177" /* new format */ \ 539 "\020" /* hex display */ \ 540 "\020" /* %016x format */ \ 541 "f\x33\x0b" "REVLINK_INDEX\0" \ 542 "f\x28\x0b" "INDEX\0" \ 543 "f\x24\x04" "GRP\0" \ 544 "f\x00\x24" "WQP\0" 545 546 /* pow memory load (subid = 2) */ 547 #define POW_MEMORY_LOAD_INDEX UINT64_C(0x000000000000ffe0) 548 #define POW_MEMORY_LOAD_GET_DES UINT64_C(0x0000000000000010) 549 #define POW_MEMORY_LOAD_GET_WQP UINT64_C(0x0000000000000008) 550 #define POW_MEMORY_LOAD_2_0 UINT64_C(0x0000000000000007) 551 #define POW_MEMORY_LOAD_2_0_SHIFT 0 552 #define POW_MEMORY_LOAD_GET_WQP_SHIFT 3 553 #define POW_MEMORY_LOAD_INDEX_SHIFT 5 554 #define POW_MEMORY_LOAD_GET_DES_SHIFT 4 555 556 /* get_des = 0 and get_wqp = 0 ("tag") */ 557 #define POW_MEMORY_LOAD_RESULT_TAG_XXX_63_51 UINT64_C(0xfff8000000000000) 558 #define POW_MEMORY_LOAD_RESULT_TAG_NEXT_INDEX UINT64_C(0x0007ff0000000000) 559 #define POW_MEMORY_LOAD_RESULT_TAG_GRP UINT64_C(0x000000f000000000) 560 #define POW_MEMORY_LOAD_RESULT_TAG_XXX_35 UINT64_C(0x0000000800000000) 561 #define POW_MEMORY_LOAD_RESULT_TAG_TAIL UINT64_C(0x0000000400000000) 562 #define POW_MEMORY_LOAD_RESULT_TAG_TAG_TYPE UINT64_C(0x0000000300000000) 563 #define POW_MEMORY_LOAD_RESULT_TAG_TAG UINT64_C(0x00000000ffffffff) 564 #define POW_MEMORY_LOAD_RESULT_TAG_BITS \ 565 "\177" /* new format */ \ 566 "\020" /* hex display */ \ 567 "\020" /* %016x format */ \ 568 "f\x28\x0b" "NEXT_INDEX\0" \ 569 "f\x24\x04" "GRP\0" \ 570 "b\x22" "TAIL\0" \ 571 "f\x20\x02" "TAG_TYPE\0" \ 572 "f\x00\x20" "TAG\0" 573 574 /* get_des = 0 and get_wqp = 1 ("wqp") */ 575 #define POW_MEMORY_LOAD_RESULT_WQP_XXX_63_51 UINT64_C(0xfff8000000000000) 576 #define POW_MEMORY_LOAD_RESULT_WQP_NEXT_INDEX UINT64_C(0x0007ff0000000000) 577 #define POW_MEMORY_LOAD_RESULT_WQP_GRP UINT64_C(0x000000f000000000) 578 #define POW_MEMORY_LOAD_RESULT_WQP_WQP UINT64_C(0x0000000fffffffff) 579 #define POW_MEMORY_LOAD_RESULT_WQP_BITS \ 580 "\177" /* new format */ \ 581 "\020" /* hex display */ \ 582 "\020" /* %016x format */ \ 583 "f\x28\x0b" "NEXT_INDEX\0" \ 584 "f\x24\x04" "GRP\0" \ 585 "f\x00\x24" "WQP\0" 586 587 /* get_des = 1 ("desched") */ 588 #define POW_MEMORY_LOAD_RESULT_DESCHED_XXX_63_51 UINT64_C(0xfff8000000000000) 589 #define POW_MEMORY_LOAD_RESULT_DESCHED_FWD_INDEX UINT64_C(0x0007ff0000000000) 590 #define POW_MEMORY_LOAD_RESULT_DESCHED_GRP UINT64_C(0x000000f000000000) 591 #define POW_MEMORY_LOAD_RESULT_DESCHED_NOSCHED UINT64_C(0x0000000800000000) 592 #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_SWITCH UINT64_C(0x0000000400000000) 593 #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_TYPE UINT64_C(0x0000000300000000) 594 #define POW_MEMORY_LOAD_RESULT_DESCHED_PEND_TAG UINT64_C(0x00000000ffffffff) 595 #define POW_MEMORY_LOAD_RESULT_DESCHED_BITS \ 596 "\177" /* new format */ \ 597 "\020" /* hex display */ \ 598 "\020" /* %016x format */ \ 599 "f\x28\x0b" "FWD_INDEX\0" \ 600 "f\x24\x04" "GRP\0" \ 601 "b\x23" "NOSCHED\0" \ 602 "b\x22" "PEND_SWITCH\0" \ 603 "f\x20\x02" "PEND_TYPE\0" \ 604 "f\x00\x20" "PEND_TAG\0" 605 606 /* pow index/pointer load (subid = 3) */ 607 #define POW_IDXPTR_LOAD_QOSGRP UINT64_C(0x00000000000001e0) 608 #define POW_IDXPTR_LOAD_GET_DES_GET_TAIL UINT64_C(0x0000000000000010) 609 #define POW_IDXPTR_LOAD_GET_RMT UINT64_C(0x0000000000000008) 610 #define POW_IDXPTR_LOAD_2_0 UINT64_C(0x0000000000000007) 611 #define POW_IDXPTR_LOAD_QOSGRP_SHIFT 5 612 #define POW_IDXPTR_LOAD_GET_DES_GET_TAIL_SHIFT 4 613 #define POW_IDXPTR_LOAD_2_0_SHIFT 0 614 #define POW_IDXPTR_LOAD_GET_RMT_SHIFT 3 615 616 /* get_rmt = 0 and get_des_get_tail = 0 ("qos") */ 617 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_63_52 UINT64_C(0xfff0000000000000) 618 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_VAL UINT64_C(0x0008000000000000) 619 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_ONE UINT64_C(0x0004000000000000) 620 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_49 UINT64_C(0x0002000000000000) 621 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_HEAD UINT64_C(0x0001ffc000000000) 622 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_37 UINT64_C(0x0000002000000000) 623 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_FREE_TAIL UINT64_C(0x0000001ffc000000) 624 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_VAL UINT64_C(0x0000000002000000) 625 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_ONE UINT64_C(0x0000000001000000) 626 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_23 UINT64_C(0x0000000000800000) 627 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_HEAD UINT64_C(0x00000000007ff000) 628 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_XXX_11 UINT64_C(0x0000000000000800) 629 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_LOC_TAIL UINT64_C(0x00000000000007ff) 630 #define POW_IDXPTR_LOAD_RESULT_QOS_FREE_LOC_BITS \ 631 "\177" /* new format */ \ 632 "\020" /* hex display */ \ 633 "\020" /* %016x format */ \ 634 "b\x33" "FREE_VAL\0" \ 635 "b\x32" "FREE_ONE\0" \ 636 "f\x26\x0b" "FREE_HEAD\0" \ 637 "f\x1a\x0b" "FREE_TAIL\0" \ 638 "b\x19" "LOC_VAL\0" \ 639 "b\x18" "LOC_ONE\0" \ 640 "f\x0c\x0b" "LOC_HEAD\0" \ 641 "f\x00\x0b" "LOC_TAIL\0" 642 643 /* get_rmt = 0 and get_des_get_tail = 1 ("desched") */ 644 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_63_52 UINT64_C(0xfff0000000000000) 645 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_VAL UINT64_C(0x0008000000000000) 646 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_ONE UINT64_C(0x0004000000000000) 647 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_49 UINT64_C(0x0002000000000000) 648 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_HEAD UINT64_C(0x0001ffc000000000) 649 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_37 UINT64_C(0x0000002000000000) 650 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_NOSCHED_TAIL UINT64_C(0x0000001ffc000000) 651 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_VAL UINT64_C(0x0000000002000000) 652 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_ONE UINT64_C(0x0000000001000000) 653 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_23 UINT64_C(0x0000000000800000) 654 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_HEAD UINT64_C(0x00000000007ff000) 655 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_XXX_11 UINT64_C(0x0000000000000800) 656 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_DES_TAIL UINT64_C(0x00000000000007ff) 657 #define POW_IDXPTR_LOAD_RESULT_GRP_NOSCHED_DES_BITS \ 658 "\177" /* new format */ \ 659 "\020" /* hex display */ \ 660 "\020" /* %016x format */ \ 661 "b\x33" "NOSCHED_VAL\0" \ 662 "b\x32" "NOSCHED_ONE\0" \ 663 "f\x26\x0b" "NOSCHED_HEAD\0" \ 664 "f\x1a\x0b" "NOSCHED_TAIL\0" \ 665 "b\x19" "DES_VAL\0" \ 666 "b\x18" "DES_ONE\0" \ 667 "f\x0c\x0b" "DES_HEAD\0" \ 668 "f\x00\x0b" "DES_TAIL\0" 669 670 /* get_rmt = 1 and get_des_get_tail = 0 ("remote_head") */ 671 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_XXX_63_39 UINT64_C(0xffffff8000000000) 672 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_IS_HEAD UINT64_C(0x0000004000000000) 673 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_VAL UINT64_C(0x0000002000000000) 674 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_ONE UINT64_C(0x0000001000000000) 675 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_RMT_HEAD UINT64_C(0x0000000fffffffff) 676 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_HEAD_BITS \ 677 "\177" /* new format */ \ 678 "\020" /* hex display */ \ 679 "\020" /* %016x format */ \ 680 "b\x26" "RMT_IS_HEAD\0" \ 681 "b\x25" "RMT_VAL\0" \ 682 "b\x24" "RMT_ONE\0" \ 683 "f\x00\x24" "RMT_HEAD\0" 684 685 /* get_rmt = 1 and get_des_get_tail = 1 ("remote_tail") */ 686 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_XXX_63_39 UINT64_C(0xffffff8000000000) 687 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_IS_HEAD UINT64_C(0x0000004000000000) 688 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_VAL UINT64_C(0x0000002000000000) 689 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_ONE UINT64_C(0x0000001000000000) 690 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_RMT_TAIL UINT64_C(0x0000000fffffffff) 691 #define POW_IDXPTR_LOAD_RESULT_QUEUE_REMOTE_TAIL_BITS \ 692 "\177" /* new format */ \ 693 "\020" /* hex display */ \ 694 "\020" /* %016x format */ \ 695 "b\x26" "RMT_IS_HEAD\0" \ 696 "b\x25" "RMT_VAL\0" \ 697 "b\x24" "RMT_ONE\0" \ 698 "f\x00\x24" "RMT_TAIL\0" 699 700 /* pow index/pointer load (subid = 2) */ 701 #define POW_NULL_RD_LOAD_39_3 UINT64_C(0x000000fffffffff8) 702 #define POW_NULL_RD_LOAD_2_0 UINT64_C(0x0000000000000007) 703 #define POW_NULL_RD_LOAD_39_3_SHIFT 3 704 #define POW_NULL_RD_LOAD_2_0_SHIFT 0 705 706 #define POW_NULL_RD_LOAD_RESULT_63_2 UINT64_C(0xfffffffffffffffc) 707 #define POW_NULL_RD_LOAD_RESULT_STATUS UINT64_C(0x0000000000000003) 708 709 /* pow store operations */ 710 711 #define POW_PHY_ADDR_STORE_ADDR UINT64_C(0x0000000fffffffff) 712 #define POW_PHY_ADDR_STORE_ADDR_SHIFT 0 713 714 #define POW_STORE_DATA_NO_SCHED UINT64_C(0x8000000000000000) 715 #define POW_STORE_DATA_62_61 UINT64_C(0x6000000000000000) 716 #define POW_STORE_DATA_INDEX UINT64_C(0x1fff000000000000) 717 #define POW_STORE_DATA_OP UINT64_C(0x0000f00000000000) 718 #define POW_STORE_DATA_43_42 UINT64_C(0x00000c0000000000) 719 #define POW_STORE_DATA_QOS UINT64_C(0x0000038000000000) 720 #define POW_STORE_DATA_GRP UINT64_C(0x0000007800000000) 721 #define POW_STORE_DATA_TYPE UINT64_C(0x0000000700000000) 722 #define POW_STORE_DATA_TAG UINT64_C(0x00000000ffffffff) 723 #define POW_STORE_DATA_INDEX_SHIFT 48 724 #define POW_STORE_DATA_OP_SHIFT 44 725 #define POW_STORE_DATA_NO_SCHED_SHIFT 63 726 #define POW_STORE_DATA_62_61_SHIFT 61 727 #define POW_STORE_DATA_43_42_SHIFT 42 728 #define POW_STORE_DATA_QOS_SHIFT 39 729 #define POW_STORE_DATA_GRP_SHIFT 35 730 #define POW_STORE_DATA_TYPE_SHIFT 32 731 #define POW_STORE_DATA_TAG_SHIFT 0 732 733 /* pow iobdma operations */ 734 735 /* pow iobdma operations base*/ 736 #define POW_IOBDMA_BASE_SCRADDR UINT64_C(0xff00000000000000) 737 #define POW_IOBDMA_BASE_LEN UINT64_C(0x00ff000000000000) 738 #define POW_IOBDMA_BASE_MAJOR_DID UINT64_C(0x0000f80000000000) 739 #define POW_IOBDMA_BASE_SUB_DID UINT64_C(0x0000070000000000) 740 #define POW_IOBDMA_BASE_39_0 UINT64_C(0x000000ffffffffff) 741 #define POW_IOBDMA_BASE_MAJOR_DID_SHIFT 43 742 #define POW_IOBDMA_BASE_LEN_SHIFT 48 743 #define POW_IOBDMA_BASE_39_0_SHIFT 0 744 #define POW_IOBDMA_BASE_SCRADDR_SHIFT 56 745 #define POW_IOBDMA_BASE_SUB_DID_SHIFT 40 746 747 /* pow iobdma get work (subid = 0) */ 748 #define POW_IOBDMA_GET_WORK_39_4 UINT64_C(0x000000ffffffffff) 749 #define POW_IOBDMA_GET_WORK_WAIT UINT64_C(0x0000000000000008) 750 #define POW_IOBDMA_GET_WORK_2_0 UINT64_C(0x0000000000000007) 751 #define POW_IOBDMA_GET_WORK_WAIT_SHIFT 3 752 #define POW_IOBDMA_GET_WORK_39_4_SHIFT 0 753 #define POW_IOBDMA_GET_WORK_2_0_SHIFT 0 754 755 #define POW_IOBDMA_GET_WORK_RESULT_NO_WORK UINT64_C(0x8000000000000000) 756 #define POW_IOBDMA_GET_WORK_RESULT_62_40 UINT64_C(0x7fffff0000000000) 757 #define POW_IOBDMA_GET_WORK_RESULT_ADDR UINT64_C(0x000000ffffffffff) 758 759 /* pow iobdma null rd (subid = 4) */ 760 #define POW_IOBDMA_NULL_RD_39_0 UINT64_C(0x000000ffffffffff) 761 #define POW_IOBDMA_NULL_RD_39_0_SHIFT 0 762 763 #define POW_IOBDMA_NULL_RD_RESULT_63_2 UINT64_C(0xfffffffffffffffc) 764 #define POW_IOBDMA_NULL_RD_RESULT_STATUS UINT64_C(0x0000000000000003) 765 766 /* ------------------------------------------------------------------------- */ 767 768 /* Work Queue Entry */ 769 770 #define POW_WQE_WORD0_XXX_63_40 UINT64_C(0xffffff0000000000) 771 #define POW_WQE_WORD0_NEXT UINT64_C(0x000000ffffffffff) 772 #define POW_WQE_WORD0_BITS \ 773 "\177" /* new format */ \ 774 "\020" /* hex display */ \ 775 "\020" /* %016x format */ \ 776 "f\x00\x28" "NEXT\0" 777 #define POW_WQE_WORD0_NEXT_SHIFT 0 778 779 #define POW_WQE_WORD1_XXX_63_42 UINT64_C(0xfffffc0000000000) 780 #define POW_WQE_WORD1_QOS UINT64_C(0x0000038000000000) 781 #define POW_WQE_WORD1_GRP UINT64_C(0x0000007800000000) 782 #define POW_WQE_WORD1_TT UINT64_C(0x0000000700000000) 783 #define POW_WQE_WORD1_TAG UINT64_C(0x00000000ffffffff) 784 #define POW_WQE_WORD1_BITS \ 785 "\177" /* new format */ \ 786 "\020" /* hex display */ \ 787 "\020" /* %016x format */ \ 788 "f\x27\x03" "QOS\0" \ 789 "f\x23\x04" "GRP\0" \ 790 "f\x20\x03" "TT\0" \ 791 "f\x00\x20" "TAG\0" 792 #define POW_WQE_WORD1_TT_SHIFT 32 793 #define POW_WQE_WORD1_QOS_SHIFT 39 794 #define POW_WQE_WORD1_GRP_SHIFT 35 795 #define POW_WQE_WORD1_TAG_SHIFT 0 796 797 /* ------------------------------------------------------------------------- */ 798 799 /* for snprintb(9) */ 800 801 #define POW_PP_GRP_MSKX_BITS \ 802 "\177" /* new format */ \ 803 "\020" /* hex display */ \ 804 "\020" /* %016x format */ \ 805 "f\x00\x10" "GRP_MSK\0" 806 #define POW_PP_GRP_MSK0_BITS POW_PP_GRP_MSKX_BITS 807 #define POW_PP_GRP_MSK1_BITS POW_PP_GRP_MSKX_BITS 808 #define POW_WQ_INT_THRX_BITS \ 809 "\177" /* new format */ \ 810 "\020" /* hex display */ \ 811 "\020" /* %016x format */ \ 812 "b\x1c" "TC_EN\0" \ 813 "f\x18\x04" "TC_THR\0" \ 814 "f\x0c\x06" "DS_THR\0" \ 815 "f\x00\x06" "IQ_THR\0" 816 #define POW_WQ_INT_THR0_BITS POW_WQ_INT_THRX_BITS 817 #define POW_WQ_INT_THR1_BITS POW_WQ_INT_THRX_BITS 818 #define POW_WQ_INT_THR2_BITS POW_WQ_INT_THRX_BITS 819 #define POW_WQ_INT_THR3_BITS POW_WQ_INT_THRX_BITS 820 #define POW_WQ_INT_THR4_BITS POW_WQ_INT_THRX_BITS 821 #define POW_WQ_INT_THR5_BITS POW_WQ_INT_THRX_BITS 822 #define POW_WQ_INT_THR6_BITS POW_WQ_INT_THRX_BITS 823 #define POW_WQ_INT_THR7_BITS POW_WQ_INT_THRX_BITS 824 #define POW_WQ_INT_THR8_BITS POW_WQ_INT_THRX_BITS 825 #define POW_WQ_INT_THR9_BITS POW_WQ_INT_THRX_BITS 826 #define POW_WQ_INT_THR10_BITS POW_WQ_INT_THRX_BITS 827 #define POW_WQ_INT_THR11_BITS POW_WQ_INT_THRX_BITS 828 #define POW_WQ_INT_THR12_BITS POW_WQ_INT_THRX_BITS 829 #define POW_WQ_INT_THR13_BITS POW_WQ_INT_THRX_BITS 830 #define POW_WQ_INT_THR14_BITS POW_WQ_INT_THRX_BITS 831 #define POW_WQ_INT_THR15_BITS POW_WQ_INT_THRX_BITS 832 #define POW_WQ_INT_CNTX_BITS \ 833 "\177" /* new format */ \ 834 "\020" /* hex display */ \ 835 "\020" /* %016x format */ \ 836 "f\x18\x04" "TC_CNT\0" \ 837 "f\x0c\x06" "DS_CNT\0" \ 838 "f\x00\x06" "IQ_CNT\0" 839 #define POW_WQ_INT_CNT0_BITS POW_WQ_INT_CNTX_BITS 840 #define POW_WQ_INT_CNT1_BITS POW_WQ_INT_CNTX_BITS 841 #define POW_WQ_INT_CNT2_BITS POW_WQ_INT_CNTX_BITS 842 #define POW_WQ_INT_CNT3_BITS POW_WQ_INT_CNTX_BITS 843 #define POW_WQ_INT_CNT4_BITS POW_WQ_INT_CNTX_BITS 844 #define POW_WQ_INT_CNT5_BITS POW_WQ_INT_CNTX_BITS 845 #define POW_WQ_INT_CNT6_BITS POW_WQ_INT_CNTX_BITS 846 #define POW_WQ_INT_CNT7_BITS POW_WQ_INT_CNTX_BITS 847 #define POW_WQ_INT_CNT8_BITS POW_WQ_INT_CNTX_BITS 848 #define POW_WQ_INT_CNT9_BITS POW_WQ_INT_CNTX_BITS 849 #define POW_WQ_INT_CNT10_BITS POW_WQ_INT_CNTX_BITS 850 #define POW_WQ_INT_CNT11_BITS POW_WQ_INT_CNTX_BITS 851 #define POW_WQ_INT_CNT12_BITS POW_WQ_INT_CNTX_BITS 852 #define POW_WQ_INT_CNT13_BITS POW_WQ_INT_CNTX_BITS 853 #define POW_WQ_INT_CNT14_BITS POW_WQ_INT_CNTX_BITS 854 #define POW_WQ_INT_CNT15_BITS POW_WQ_INT_CNTX_BITS 855 #define POW_QOS_THRX_BITS \ 856 "\177" /* new format */ \ 857 "\020" /* hex display */ \ 858 "\020" /* %016x format */ \ 859 "f\x30\x07" "DES_CNT\0" \ 860 "f\x24\x07" "BUF_CNT\0" \ 861 "f\x18\x07" "FREE_CNT\0" \ 862 "f\x0c\x06" "MAX_THR\0" \ 863 "f\x00\x06" "MIN_THR\0" 864 #define POW_QOS_THR0_BITS POW_QOS_THRX_BITS 865 #define POW_QOS_THR1_BITS POW_QOS_THRX_BITS 866 #define POW_QOS_THR2_BITS POW_QOS_THRX_BITS 867 #define POW_QOS_THR3_BITS POW_QOS_THRX_BITS 868 #define POW_QOS_THR4_BITS POW_QOS_THRX_BITS 869 #define POW_QOS_THR5_BITS POW_QOS_THRX_BITS 870 #define POW_QOS_THR6_BITS POW_QOS_THRX_BITS 871 #define POW_QOS_THR7_BITS POW_QOS_THRX_BITS 872 #define POW_QOS_RNDX_BITS \ 873 "\177" /* new format */ \ 874 "\020" /* hex display */ \ 875 "\020" /* %016x format */ \ 876 "f\x18\x08" "RND_P3\0" \ 877 "f\x10\x08" "RND_P2\0" \ 878 "f\x08\x08" "RND_P1\0" \ 879 "f\x00\x08" "RND\0" 880 #define POW_QOS_RND0_BITS POW_QOS_RNDX_BITS 881 #define POW_QOS_RND1_BITS POW_QOS_RNDX_BITS 882 #define POW_QOS_RND2_BITS POW_QOS_RNDX_BITS 883 #define POW_QOS_RND3_BITS POW_QOS_RNDX_BITS 884 #define POW_QOS_RND4_BITS POW_QOS_RNDX_BITS 885 #define POW_QOS_RND5_BITS POW_QOS_RNDX_BITS 886 #define POW_QOS_RND6_BITS POW_QOS_RNDX_BITS 887 #define POW_QOS_RND7_BITS POW_QOS_RNDX_BITS 888 #define POW_WQ_INT_BITS \ 889 "\177" /* new format */ \ 890 "\020" /* hex display */ \ 891 "\020" /* %016x format */ \ 892 "f\x10\x10" "IQ_DIS\0" \ 893 "f\x00\x10" "WQ_INT\0" 894 #define POW_WQ_INT_PC_BITS \ 895 "\177" /* new format */ \ 896 "\020" /* hex display */ \ 897 "\020" /* %016x format */ \ 898 "f\x20\x1c" "PC\0" \ 899 "f\x08\x14" "PC_THR\0" 900 #define POW_NW_TIM_BITS \ 901 "\177" /* new format */ \ 902 "\020" /* hex display */ \ 903 "\020" /* %016x format */ \ 904 "f\x00\x0a" "NW_TIM\0" 905 #define POW_ECC_ERR_BITS \ 906 "\177" /* new format */ \ 907 "\020" /* hex display */ \ 908 "\020" /* %016x format */ \ 909 "f\x20\x0d" "IOP_IE\0" \ 910 "f\x10\x0d" "IOP\0" \ 911 "b\x0d" "RPE_IE\0" \ 912 "b\x0c" "RPE\0" \ 913 "f\x04\x05" "SYN\0" \ 914 "b\x03" "DBE_IE\0" \ 915 "b\x02" "SBE_IE\0" \ 916 "b\x01" "DBE\0" \ 917 "b\x00" "SBE\0" 918 #define POW_NOS_CNT_BITS \ 919 "\177" /* new format */ \ 920 "\020" /* hex display */ \ 921 "\020" /* %016x format */ \ 922 "f\x00\x07" "NOS_CNT\0" 923 #define POW_WS_PCX_BITS \ 924 "\177" /* new format */ \ 925 "\020" /* hex display */ \ 926 "\020" /* %016x format */ \ 927 928 #define POW_WS_PC0_BITS POW_WS_PCX_BITS 929 #define POW_WS_PC1_BITS POW_WS_PCX_BITS 930 #define POW_WS_PC2_BITS POW_WS_PCX_BITS 931 #define POW_WS_PC3_BITS POW_WS_PCX_BITS 932 #define POW_WS_PC4_BITS POW_WS_PCX_BITS 933 #define POW_WS_PC5_BITS POW_WS_PCX_BITS 934 #define POW_WS_PC6_BITS POW_WS_PCX_BITS 935 #define POW_WS_PC7_BITS POW_WS_PCX_BITS 936 #define POW_WS_PC8_BITS POW_WS_PCX_BITS 937 #define POW_WS_PC9_BITS POW_WS_PCX_BITS 938 #define POW_WS_PC10_BITS POW_WS_PCX_BITS 939 #define POW_WS_PC11_BITS POW_WS_PCX_BITS 940 #define POW_WS_PC12_BITS POW_WS_PCX_BITS 941 #define POW_WS_PC13_BITS POW_WS_PCX_BITS 942 #define POW_WS_PC14_BITS POW_WS_PCX_BITS 943 #define POW_WS_PC15_BITS POW_WS_PCX_BITS 944 #define POW_WA_PCX_BITS \ 945 "\177" /* new format */ \ 946 "\020" /* hex display */ \ 947 "\020" /* %016x format */ \ 948 949 #define POW_WA_PC0_BITS POW_WA_PCX_BITS 950 #define POW_WA_PC1_BITS POW_WA_PCX_BITS 951 #define POW_WA_PC2_BITS POW_WA_PCX_BITS 952 #define POW_WA_PC3_BITS POW_WA_PCX_BITS 953 #define POW_WA_PC4_BITS POW_WA_PCX_BITS 954 #define POW_WA_PC5_BITS POW_WA_PCX_BITS 955 #define POW_WA_PC6_BITS POW_WA_PCX_BITS 956 #define POW_WA_PC7_BITS POW_WA_PCX_BITS 957 #define POW_IQ_CNTX_BITS \ 958 "\177" /* new format */ \ 959 "\020" /* hex display */ \ 960 "\020" /* %016x format */ \ 961 962 #define POW_IQ_CNT0_BITS POW_IQ_CNTX_BITS 963 #define POW_IQ_CNT1_BITS POW_IQ_CNTX_BITS 964 #define POW_IQ_CNT2_BITS POW_IQ_CNTX_BITS 965 #define POW_IQ_CNT3_BITS POW_IQ_CNTX_BITS 966 #define POW_IQ_CNT4_BITS POW_IQ_CNTX_BITS 967 #define POW_IQ_CNT5_BITS POW_IQ_CNTX_BITS 968 #define POW_IQ_CNT6_BITS POW_IQ_CNTX_BITS 969 #define POW_IQ_CNT7_BITS POW_IQ_CNTX_BITS 970 #define POW_WA_COM_PC_BITS \ 971 "\177" /* new format */ \ 972 "\020" /* hex display */ \ 973 "\020" /* %016x format */ \ 974 "f\x00\x20" "WA_PC\0" 975 #define POW_IQ_COM_CNT_BITS \ 976 "\177" /* new format */ \ 977 "\020" /* hex display */ \ 978 "\020" /* %016x format */ \ 979 980 #define POW_TS_PC_BITS \ 981 "\177" /* new format */ \ 982 "\020" /* hex display */ \ 983 "\020" /* %016x format */ \ 984 "f\x00\x20" "TS_PC\0" 985 #define POW_DS_PC_BITS \ 986 "\177" /* new format */ \ 987 "\020" /* hex display */ \ 988 "\020" /* %016x format */ \ 989 "f\x00\x20" "DS_PC\0" 990 #define POW_BIST_STAT_BITS \ 991 "\177" /* new format */ \ 992 "\020" /* hex display */ \ 993 "\020" /* %016x format */ \ 994 "b\x10" "PP\0" \ 995 "b\x08" "CAM\0" \ 996 "b\x07" "NBT1\0" \ 997 "b\x06" "NBT0\0" \ 998 "b\x05" "IDX\0" \ 999 "b\x04" "FIDX\0" \ 1000 "b\x03" "NBR1\0" \ 1001 "b\x02" "NBR0\0" \ 1002 "b\x01" "PEND\0" \ 1003 "b\x00" "ADR\0" 1004 1005 #endif /* _OCTEON_POWREG_H_ */ 1006
Indexes created Sun Sep 28 16:09:52 GMT 2025