octeon_rnmreg.h revision 1.1.2.2
1 1.1.2.2 skrll /* $NetBSD: octeon_rnmreg.h,v 1.1.2.2 2015/06/06 14:40:01 skrll Exp $ */ 2 1.1.2.2 skrll 3 1.1.2.2 skrll /* 4 1.1.2.2 skrll * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 1.1.2.2 skrll * All rights reserved. 6 1.1.2.2 skrll * 7 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 skrll * modification, are permitted provided that the following conditions 9 1.1.2.2 skrll * are met: 10 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.1.2.2 skrll * 16 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 1.1.2.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.1.2.2 skrll * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.1.2.2 skrll * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 1.1.2.2 skrll * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.1.2.2 skrll * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.1.2.2 skrll * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1.2.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.1.2.2 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1.2.2 skrll * SUCH DAMAGE. 27 1.1.2.2 skrll */ 28 1.1.2.2 skrll 29 1.1.2.2 skrll /* 30 1.1.2.2 skrll * RNM Registers 31 1.1.2.2 skrll */ 32 1.1.2.2 skrll 33 1.1.2.2 skrll #ifndef _OCTEON_RNMREG_H_ 34 1.1.2.2 skrll #define _OCTEON_RNMREG_H_ 35 1.1.2.2 skrll 36 1.1.2.2 skrll /* ---- register addresses */ 37 1.1.2.2 skrll 38 1.1.2.2 skrll #define RNM_CTL_STATUS 0x0001180040000000ULL 39 1.1.2.2 skrll #define RNM_BIST_STATUS 0x0001180040000008ULL 40 1.1.2.2 skrll 41 1.1.2.2 skrll /* ---- register bits */ 42 1.1.2.2 skrll 43 1.1.2.2 skrll #define RNM_CTL_STATUS_XXX_63_4 UINT64_C(0xfffffffffffffff0) 44 1.1.2.2 skrll #define RNM_CTL_STATUS_RNG_RST UINT64_C(0x0000000000000008) 45 1.1.2.2 skrll #define RNM_CTL_STATUS_RNM_RST UINT64_C(0x0000000000000004) 46 1.1.2.2 skrll #define RNM_CTL_STATUS_RNG_EN UINT64_C(0x0000000000000002) 47 1.1.2.2 skrll #define RNM_CTL_STATUS_ENT_EN UINT64_C(0x0000000000000001) 48 1.1.2.2 skrll 49 1.1.2.2 skrll #define RNM_BIST_STATUS_XXX_63_2 UINT64_C(0xfffffffffffffffc) 50 1.1.2.2 skrll #define RNM_BIST_STATUS_RRC UINT64_C(0x0000000000000002) 51 1.1.2.2 skrll #define RNM_BIST_STATUS_MEM UINT64_C(0x0000000000000001) 52 1.1.2.2 skrll 53 1.1.2.2 skrll /* ---- operations */ 54 1.1.2.2 skrll #define RNM_OPERATION_BASE_IO_BIT UINT64_C(0x0001000000000000) 55 1.1.2.2 skrll #define RNM_OPERATION_BASE_MAJOR_DID UINT64_C(0x0000f80000000000) 56 1.1.2.2 skrll #define RNM_OPERATION_BASE_SUB_DID UINT64_C(0x0000070000000000) 57 1.1.2.2 skrll #define RNM_OPERATION_BASE_MAJOR_DID_SHIFT 43 58 1.1.2.2 skrll #define RNM_OPERATION_BASE_SUB_DID_SHIFT 40 59 1.1.2.2 skrll #define RNM_OPERATION_BASE_IO_BIT_SHIFT 48 60 1.1.2.2 skrll 61 1.1.2.2 skrll /* ---- snprintb */ 62 1.1.2.2 skrll 63 1.1.2.2 skrll #define RNM_CTL_STATUS_BITS \ 64 1.1.2.2 skrll "\177" /* new format */ \ 65 1.1.2.2 skrll "\020" /* hex display */ \ 66 1.1.2.2 skrll "\020" /* %016x format */ \ 67 1.1.2.2 skrll "b\x03" "RNG_RST\0" \ 68 1.1.2.2 skrll "b\x02" "RNM_RST\0" \ 69 1.1.2.2 skrll "b\x01" "RNG_EN\0" \ 70 1.1.2.2 skrll "b\x00" "ENT_EN\0" 71 1.1.2.2 skrll 72 1.1.2.2 skrll #define RNM_BIST_STATUS_BITS \ 73 1.1.2.2 skrll "\177" /* new format */ \ 74 1.1.2.2 skrll "\020" /* hex display */ \ 75 1.1.2.2 skrll "\020" /* %016x format */ \ 76 1.1.2.2 skrll "b\x01" "RRC\0" \ 77 1.1.2.2 skrll "b\x00" "MEM\0" 78 1.1.2.2 skrll 79 1.1.2.2 skrll /* ---- bus_space */ 80 1.1.2.2 skrll 81 1.1.2.2 skrll #define RNM_BASE 0x0001180040000000ULL 82 1.1.2.2 skrll #define RNM_SIZE 0x0010 83 1.1.2.2 skrll #define RNM_NUNITS 1 84 1.1.2.2 skrll 85 1.1.2.2 skrll #define RNM_CTL_STATUS_OFFSET 0x0000 86 1.1.2.2 skrll #define RNM_BIST_STATUS_OFFSET 0x0008 87 1.1.2.2 skrll 88 1.1.2.2 skrll #endif /* _OCTEON_RNMREG_H_ */ 89
Indexes created Tue Oct 21 12:09:54 GMT 2025