octeon_bootbus.c revision 1.1.2.2
1 1.1.2.2 skrll /* $NetBSD: octeon_bootbus.c,v 1.1.2.2 2015/06/06 14:40:01 skrll Exp $ */ 2 1.1.2.2 skrll 3 1.1.2.2 skrll /* 4 1.1.2.2 skrll * Copyright (c) 2007 5 1.1.2.2 skrll * Internet Initiative Japan, Inc. All rights reserved. 6 1.1.2.2 skrll * 7 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 skrll * modification, are permitted provided that the following conditions 9 1.1.2.2 skrll * are met: 10 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.1.2.2 skrll * 16 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 1.1.2.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.1.2.2 skrll * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.1.2.2 skrll * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 1.1.2.2 skrll * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.1.2.2 skrll * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.1.2.2 skrll * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1.2.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.1.2.2 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1.2.2 skrll * SUCH DAMAGE. 27 1.1.2.2 skrll */ 28 1.1.2.2 skrll 29 1.1.2.2 skrll #include <sys/cdefs.h> 30 1.1.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: octeon_bootbus.c,v 1.1.2.2 2015/06/06 14:40:01 skrll Exp $"); 31 1.1.2.2 skrll 32 1.1.2.2 skrll #include "locators.h" 33 1.1.2.2 skrll 34 1.1.2.2 skrll #include <sys/param.h> 35 1.1.2.2 skrll #include <sys/systm.h> 36 1.1.2.2 skrll #include <sys/device.h> 37 1.1.2.2 skrll 38 1.1.2.2 skrll #define _MIPS_BUS_DMA_PRIVATE 39 1.1.2.2 skrll #include <sys/bus.h> 40 1.1.2.2 skrll 41 1.1.2.2 skrll #include <mips/cavium/octeonvar.h> 42 1.1.2.2 skrll #include <mips/cavium/include/bootbusvar.h> 43 1.1.2.2 skrll 44 1.1.2.2 skrll static int bootbus_match(device_t, struct cfdata *, void *); 45 1.1.2.2 skrll static void bootbus_attach(device_t, device_t, void *); 46 1.1.2.2 skrll static int bootbus_submatch(device_t, struct cfdata *, 47 1.1.2.2 skrll const int *, void *); 48 1.1.2.2 skrll static int bootbus_print(void *, const char *); 49 1.1.2.2 skrll static void bootbus_init(void); 50 1.1.2.2 skrll 51 1.1.2.2 skrll static void bootbus_bus_io_init(bus_space_tag_t, void *); 52 1.1.2.2 skrll 53 1.1.2.2 skrll static struct mips_bus_space *bootbus_bust; 54 1.1.2.2 skrll static struct mips_bus_dma_tag *bootbus_dmat; 55 1.1.2.2 skrll 56 1.1.2.2 skrll void 57 1.1.2.2 skrll bootbus_bootstrap(struct octeon_config *mcp) 58 1.1.2.2 skrll { 59 1.1.2.2 skrll 60 1.1.2.2 skrll bootbus_bus_io_init(&mcp->mc_bootbus_bust, mcp); 61 1.1.2.2 skrll 62 1.1.2.2 skrll bootbus_bust = &mcp->mc_bootbus_bust; 63 1.1.2.2 skrll bootbus_dmat = &mcp->mc_bootbus_dmat; 64 1.1.2.2 skrll } 65 1.1.2.2 skrll 66 1.1.2.2 skrll /* ---- autoconf */ 67 1.1.2.2 skrll 68 1.1.2.2 skrll CFATTACH_DECL_NEW(bootbus, sizeof(device_t), bootbus_match, bootbus_attach, NULL, 69 1.1.2.2 skrll NULL); 70 1.1.2.2 skrll 71 1.1.2.2 skrll static int 72 1.1.2.2 skrll bootbus_match(device_t parent, struct cfdata *match, void *aux) 73 1.1.2.2 skrll { 74 1.1.2.2 skrll 75 1.1.2.2 skrll return 1; 76 1.1.2.2 skrll } 77 1.1.2.2 skrll 78 1.1.2.2 skrll static void 79 1.1.2.2 skrll bootbus_attach(device_t parent, device_t self, void *aux) 80 1.1.2.2 skrll { 81 1.1.2.2 skrll const struct bootbus_dev *dev; 82 1.1.2.2 skrll struct bootbus_attach_args aa; 83 1.1.2.2 skrll int i, j; 84 1.1.2.2 skrll 85 1.1.2.2 skrll aprint_normal("\n"); 86 1.1.2.2 skrll 87 1.1.2.2 skrll bootbus_init(); 88 1.1.2.2 skrll 89 1.1.2.2 skrll for (i = 0; i < (int)bootbus_ndevs; i++) { 90 1.1.2.2 skrll dev = bootbus_devs[i]; 91 1.1.2.2 skrll for (j = 0; j < dev->nunits; j++) { 92 1.1.2.2 skrll aa.aa_name = dev->name; 93 1.1.2.2 skrll aa.aa_unitno = j; 94 1.1.2.2 skrll aa.aa_unit = &dev->units[j]; 95 1.1.2.2 skrll aa.aa_bust = bootbus_bust; 96 1.1.2.2 skrll aa.aa_dmat = bootbus_dmat; 97 1.1.2.2 skrll 98 1.1.2.2 skrll (void)config_found_sm_loc( 99 1.1.2.2 skrll self, 100 1.1.2.2 skrll "bootbus", 101 1.1.2.2 skrll NULL, 102 1.1.2.2 skrll &aa, 103 1.1.2.2 skrll bootbus_print, 104 1.1.2.2 skrll bootbus_submatch); 105 1.1.2.2 skrll } 106 1.1.2.2 skrll } 107 1.1.2.2 skrll } 108 1.1.2.2 skrll 109 1.1.2.2 skrll static int 110 1.1.2.2 skrll bootbus_submatch(device_t parent, struct cfdata *cf, 111 1.1.2.2 skrll const int *ldesc, void *aux) 112 1.1.2.2 skrll { 113 1.1.2.2 skrll 114 1.1.2.2 skrll return config_match(parent, cf, aux); 115 1.1.2.2 skrll } 116 1.1.2.2 skrll 117 1.1.2.2 skrll static int 118 1.1.2.2 skrll bootbus_print(void *aux, const char *pnp) 119 1.1.2.2 skrll { 120 1.1.2.2 skrll struct bootbus_attach_args *aa = aux; 121 1.1.2.2 skrll 122 1.1.2.2 skrll if (pnp) 123 1.1.2.2 skrll aprint_normal("%s at %s", aa->aa_name, pnp); 124 1.1.2.2 skrll 125 1.1.2.2 skrll aprint_normal(": address=0x%016" PRIx64, aa->aa_unit->addr); 126 1.1.2.2 skrll 127 1.1.2.2 skrll return UNCONF; 128 1.1.2.2 skrll } 129 1.1.2.2 skrll 130 1.1.2.2 skrll static void 131 1.1.2.2 skrll bootbus_init(void) 132 1.1.2.2 skrll { 133 1.1.2.2 skrll 134 1.1.2.2 skrll } 135 1.1.2.2 skrll 136 1.1.2.2 skrll 137 1.1.2.2 skrll /* ---- bus_space(9) */ 138 1.1.2.2 skrll 139 1.1.2.2 skrll #define CHIP bootbus 140 1.1.2.2 skrll #define CHIP_IO 141 1.1.2.2 skrll #define CHIP_ACCESS_SIZE 8 142 1.1.2.2 skrll 143 1.1.2.2 skrll #define CHIP_W1_BUS_START(v) 0x0000000000000000ULL 144 1.1.2.2 skrll #define CHIP_W1_BUS_END(v) 0x000000001fffffffULL 145 1.1.2.2 skrll #define CHIP_W1_SYS_START(v) 0x00000000a0000000ULL 146 1.1.2.2 skrll #define CHIP_W1_SYS_END(v) 0x00000000bfffffffULL 147 1.1.2.2 skrll 148 1.1.2.2 skrll #include <mips/mips/bus_space_alignstride_chipdep.c> 149
Indexes created Mon Oct 13 08:09:50 GMT 2025