1 1.5 andvar # $NetBSD: files.rmixl,v 1.5 2024/10/07 15:04:32 andvar Exp $ 2 1.2 matt # 3 1.2 matt # Configuration info for RMI XLP, XLR, XLS 4 1.2 matt # 5 1.2 matt 6 1.3 matt file arch/mips/rmi/rmixl_spl.S 7 1.2 matt file arch/mips/rmi/rmixl_intr.c 8 1.2 matt file arch/mips/rmi/rmixl_subr.S 9 1.3 matt file arch/mips/rmi/rmixl_fmn.c 10 1.3 matt 11 1.3 matt 12 1.3 matt # node is parent of one or more core 13 1.3 matt device cpunode { [ core = -1] } 14 1.3 matt attach cpunode at mainbus with cpunode_rmixl 15 1.3 matt file arch/mips/rmi/rmixl_cpunode.c cpunode_rmixl 16 1.3 matt 17 1.3 matt # core is parent of one or more cpu 18 1.3 matt device cpucore { [ thread = -1] } 19 1.3 matt attach cpucore at cpunode with cpucore_rmixl 20 1.3 matt file arch/mips/rmi/rmixl_cpucore.c cpucore_rmixl 21 1.3 matt 22 1.3 matt # each cpu is a RMI 'thread' or 'vCPU' 23 1.3 matt device cpu 24 1.3 matt attach cpu at cpucore with cpu_rmixl 25 1.3 matt file arch/mips/rmi/rmixl_cpu.c cpu_rmixl 26 1.2 matt 27 1.2 matt # OBIO: offsets are from System Bridge Controller base 28 1.3 matt define obio { [addr=-1], [size=0], [intr=-1], [tmsk=-1], [mult=1] } 29 1.2 matt device obio: obio 30 1.3 matt attach obio at cpunode with obio_rmixl 31 1.3 matt file arch/mips/rmi/rmixl_obio.c obio_rmixl 32 1.3 matt file arch/mips/rmi/rmixl_obio_eb_space.c obio_rmixl 33 1.3 matt file arch/mips/rmi/rmixl_obio_el_space.c obio_rmixl 34 1.3 matt file arch/mips/rmi/rmixl_pci_cfg_space.c rmixl_pcix | rmixl_pcie 35 1.3 matt file arch/mips/rmi/rmixl_pci_ecfg_space.c rmixl_pcie 36 1.3 matt file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie 37 1.3 matt file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie 38 1.2 matt 39 1.2 matt # NS16550 compatible serial ports 40 1.3 matt attach com at obio with com_rmixl 41 1.3 matt file arch/mips/rmi/rmixl_com.c com_rmixl 42 1.2 matt defparam opt_com.h CONSADDR CONSFREQ CONSPEED CONMODE 43 1.2 matt 44 1.4 cliff # GPIO 45 1.4 cliff device rmixl_gpio: gpiobus 46 1.4 cliff attach rmixl_gpio at obio 47 1.4 cliff file arch/mips/rmi/rmixl_gpio.c rmixl_gpio 48 1.4 cliff 49 1.3 matt # PCIe 50 1.2 matt device rmixl_pcie: pcibus 51 1.2 matt attach rmixl_pcie at obio 52 1.3 matt file arch/mips/rmi/rmixl_pcie.c rmixl_pcie needs-flag 53 1.3 matt 54 1.3 matt # PCI-X 55 1.3 matt device rmixl_pcix: pcibus 56 1.3 matt attach rmixl_pcix at obio 57 1.3 matt file arch/mips/rmi/rmixl_pcix.c rmixl_pcix needs-flag 58 1.3 matt 59 1.5 andvar # RMI Peripheral IO Bus to Flash, PCMCIA memory controllers 60 1.4 cliff define rmixl_iobus { [cs=-1], [addr=-1], [size=-1], [intr=-1] } 61 1.4 cliff device rmixl_iobus: rmixl_iobus 62 1.4 cliff attach rmixl_iobus at obio 63 1.4 cliff file arch/mips/rmi/rmixl_iobus_space.c rmixl_iobus 64 1.4 cliff file arch/mips/rmi/rmixl_iobus.c rmixl_iobus 65 1.4 cliff 66 1.4 cliff # NAND flash controller 67 1.4 cliff device rmixl_nand: nandbus 68 1.4 cliff attach rmixl_nand at rmixl_iobus 69 1.4 cliff file arch/mips/rmi/rmixl_nand.c rmixl_nand 70 1.4 cliff 71 1.4 cliff # PCMCIA controller 72 1.4 cliff device rmixl_pcic: pcmciabus 73 1.4 cliff attach rmixl_pcic at rmixl_iobus 74 1.4 cliff file arch/mips/rmi/rmixl_pcic.c rmixl_pcic 75 1.4 cliff 76 1.3 matt # On-chip USB interface 77 1.3 matt define rmixl_usbi { [addr=-1], [size=-1], [intr=-1] } 78 1.3 matt device rmixl_usbi: rmixl_usbi 79 1.3 matt attach rmixl_usbi at obio 80 1.3 matt file arch/mips/rmi/rmixl_usbi.c rmixl_usbi 81 1.3 matt 82 1.3 matt # On-chip OHCI USB controller 83 1.3 matt attach ohci at rmixl_usbi with rmixl_ohci 84 1.3 matt file arch/mips/rmi/rmixl_ohci.c ohci 85 1.3 matt 86 1.3 matt # On-chip EHCI USB controller 87 1.3 matt attach ehci at rmixl_usbi with rmixl_ehci 88 1.3 matt file arch/mips/rmi/rmixl_ehci.c ehci 89 1.2 matt 90
Indexes created Tue Sep 23 07:09:52 GMT 2025