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files.sibyte revision 1.1.8.3
      1  1.1.8.2  nathanw ###
      2  1.1.8.2  nathanw ### SBMIPS DEVICES
      3  1.1.8.2  nathanw ###
      4  1.1.8.2  nathanw 
      5  1.1.8.2  nathanw # System Control/Debug
      6  1.1.8.2  nathanw device	sbscd {[offset = -1], [intr[2] = {-1,-1}]}
      7  1.1.8.2  nathanw attach	sbscd at zbbus
      8  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbscd.c		sbscd
      9  1.1.8.2  nathanw 
     10  1.1.8.2  nathanw # On-board I/O (slow I/O bridge)
     11  1.1.8.2  nathanw device	sbobio {[offset = -1], [intr[2] = {-1,-1}]}
     12  1.1.8.2  nathanw attach	sbobio at zbbus
     13  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbobio.c		sbobio
     14  1.1.8.2  nathanw 
     15  1.1.8.2  nathanw # Generic bus, hang off of sbobio
     16  1.1.8.2  nathanw device	sbgbus {[chipsel = -1], [offset = 0], [intr[2] = {-1,-1}]}
     17  1.1.8.2  nathanw attach	sbgbus at sbobio
     18  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbgbus.c		sbgbus
     19  1.1.8.2  nathanw 
     20  1.1.8.2  nathanw # I/O Bridge Zero attachment to ZBbus
     21  1.1.8.2  nathanw device	sbbrz: pcibus
     22  1.1.8.2  nathanw attach	sbbrz at zbbus
     23  1.1.8.2  nathanw file	arch/mips/sibyte/pci/sbbrz.c		sbbrz
     24  1.1.8.2  nathanw file	arch/mips/sibyte/pci/sbbrz_pci.c	sbbrz
     25  1.1.8.2  nathanw 
     26  1.1.8.2  nathanw # Instantiated SB-1250 PCI Host bridge
     27  1.1.8.2  nathanw device	sbpcihb
     28  1.1.8.2  nathanw attach	sbpcihb at pci
     29  1.1.8.2  nathanw file	arch/mips/sibyte/pci/sbpcihb.c		sbpcihb
     30  1.1.8.2  nathanw 
     31  1.1.8.2  nathanw # SB-1250 LDT Host bridge (acts like ppb)
     32  1.1.8.2  nathanw device	sbldthb: pcibus
     33  1.1.8.2  nathanw attach	sbldthb at pci
     34  1.1.8.2  nathanw file	arch/mips/sibyte/pci/sbldthb.c		sbldthb
     35  1.1.8.2  nathanw 
     36  1.1.8.2  nathanw # sbscd children
     37  1.1.8.2  nathanw 
     38  1.1.8.2  nathanw device	sbtimer
     39  1.1.8.2  nathanw attach	sbtimer at sbscd
     40  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbtimer.c		sbtimer
     41  1.1.8.2  nathanw 
     42  1.1.8.2  nathanw device	sbwdog
     43  1.1.8.2  nathanw attach	sbwdog at sbscd
     44  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbwdog.c		sbwdog
     45  1.1.8.2  nathanw 
     46  1.1.8.2  nathanw # sbobio children
     47  1.1.8.2  nathanw 
     48  1.1.8.2  nathanw # SB1250 MAC (XXX: maybe add mii_bitbang?)
     49  1.1.8.2  nathanw device	sbmac: arp, ether, ifnet, mii, mii_bitbang
     50  1.1.8.2  nathanw attach	sbmac at sbobio
     51  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbmac.c		sbmac
     52  1.1.8.2  nathanw 
     53  1.1.8.2  nathanw # SB1250 built-in (asynchronous) serial ports
     54  1.1.8.2  nathanw device	sbscn: tty
     55  1.1.8.2  nathanw attach	sbscn at sbobio
     56  1.1.8.2  nathanw file	arch/mips/sibyte/dev/sbscn.c		sbscn	needs-flag
     57  1.1.8.2  nathanw 
     58  1.1.8.3  nathanw # XXX XXX
     59  1.1.8.3  nathanw # need to think about SMBus more, just hack something together
     60  1.1.8.3  nathanw # temporariliy so we can use the RTC.
     61  1.1.8.3  nathanw 
     62  1.1.8.3  nathanw # SB1250 SMBus
     63  1.1.8.3  nathanw device	smbus {[chan = -1], [dev = -1]}
     64  1.1.8.3  nathanw attach	smbus at sbobio
     65  1.1.8.3  nathanw file	arch/mips/sibyte/dev/sbsmbus.c		smbus
     66  1.1.8.3  nathanw 
     67  1.1.8.3  nathanw # XXX XXX
     68  1.1.8.3  nathanw # Bogus RTC attachment
     69  1.1.8.3  nathanw device	rtc
     70  1.1.8.3  nathanw attach	rtc at smbus
     71  1.1.8.3  nathanw file	arch/sbmips/sbmips/rtc.c
     72