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files.sibyte revision 1.7.48.1 
      1 ###
      2 ### SBMIPS DEVICES
      3 ###
      4 
      5 # System Control/Debug
      6 device	sbscd {[offset = -1], [intr[2] = {-1,-1}]}
      7 attach	sbscd at zbbus
      8 file	arch/mips/sibyte/dev/sbscd.c		sbscd
      9 
     10 # On-board I/O (slow I/O bridge)
     11 device	sbobio {[offset = -1], [intr[2] = {-1,-1}]}
     12 attach	sbobio at zbbus
     13 file	arch/mips/sibyte/dev/sbobio.c		sbobio
     14 
     15 # Generic bus, hang off of sbobio
     16 device	sbgbus {[chipsel = -1], [offset = 0], [intr[2] = {-1,-1}]}
     17 attach	sbgbus at sbobio
     18 file	arch/mips/sibyte/dev/sbgbus.c		sbgbus
     19 
     20 # I/O Bridge Zero attachment to ZBbus
     21 device	sbbrz: pcibus
     22 attach	sbbrz at zbbus
     23 file	arch/mips/sibyte/pci/sbbrz.c		sbbrz
     24 file	arch/mips/sibyte/pci/sbbrz_pci.c	sbbrz
     25 file	arch/mips/sibyte/pci/sbbrz_bus_io.c	sbbrz
     26 file	arch/mips/sibyte/pci/sbbrz_bus_mem.c	sbbrz
     27 
     28 
     29 # sbscd children
     30 
     31 device	sbtimer
     32 attach	sbtimer at sbscd
     33 file	arch/mips/sibyte/dev/sbtimer.c		sbtimer
     34 
     35 device	sbwdog: sysmon_wdog
     36 attach	sbwdog at sbscd
     37 file	arch/mips/sibyte/dev/sbwdog.c		sbwdog
     38 
     39 # sbobio children
     40 
     41 # SB1250 MAC (XXX: maybe add mii_bitbang?)
     42 device	sbmac: arp, ether, ifnet, mii, mii_bitbang
     43 attach	sbmac at sbobio
     44 file	arch/mips/sibyte/dev/sbmac.c		sbmac
     45 
     46 # SB1250 built-in (asynchronous) serial ports
     47 device	sbscn: tty
     48 attach	sbscn at sbobio
     49 file	arch/mips/sibyte/dev/sbscn.c		sbscn	needs-flag
     50 
     51 # XXX XXX
     52 # need to think about SMBus more, just hack something together
     53 # temporariliy so we can use the RTC.
     54 
     55 # SB1250 SMBus
     56 device	smbus {[chan = -1], [dev = -1]}
     57 attach	smbus at sbobio
     58 file	arch/mips/sibyte/dev/sbsmbus.c		smbus
     59 
     60 # XXX XXX
     61 # XXX also, this should be in sbmips/conf/files.sbmips
     62 # Bogus RTC attachment
     63 device	xirtc
     64 attach	xirtc at smbus
     65 
     66 device	m41t81rtc
     67 attach	m41t81rtc at smbus
     68 
     69 # XXX move to arch/mips/sibyte?
     70 file	arch/evbmips/sbmips/rtc.c		xirtc | m41t81rtc
     71 
     72 file	arch/mips/sibyte/dev/sbbuswatch.c
     73