cpu_counter.h revision 1.6 1 1.6 simonb /* $NetBSD: cpu_counter.h,v 1.6 2020/07/26 08:08:41 simonb Exp $ */
2 1.1 nakayama
3 1.1 nakayama /*
4 1.1 nakayama * Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
5 1.1 nakayama *
6 1.1 nakayama * Redistribution and use in source and binary forms, with or without
7 1.1 nakayama * modification, are permitted provided that the following conditions
8 1.1 nakayama * are met:
9 1.1 nakayama * 1. Redistributions of source code must retain the above copyright
10 1.1 nakayama * notice, this list of conditions, and the following disclaimer.
11 1.1 nakayama * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 nakayama * notice, this list of conditions and the following disclaimer in the
13 1.1 nakayama * documentation and/or other materials provided with the distribution.
14 1.1 nakayama *
15 1.1 nakayama * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 1.1 nakayama * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 1.1 nakayama * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 1.1 nakayama * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 1.1 nakayama * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 1.1 nakayama * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 1.1 nakayama * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 1.1 nakayama * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 1.1 nakayama * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1 nakayama * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1 nakayama * SUCH DAMAGE.
26 1.1 nakayama */
27 1.1 nakayama
28 1.1 nakayama #ifndef _MIPS_CPU_COUNTER_H_
29 1.6 simonb #define _MIPS_CPU_COUNTER_H_
30 1.1 nakayama
31 1.1 nakayama /*
32 1.1 nakayama * Machine-specific support for CPU counter.
33 1.1 nakayama */
34 1.1 nakayama
35 1.1 nakayama #ifdef _KERNEL
36 1.5 matt #if __mips < 3
37 1.5 matt #include <mips/locore.h>
38 1.5 matt #endif
39 1.1 nakayama
40 1.3 perry static __inline int
41 1.1 nakayama cpu_hascounter(void)
42 1.1 nakayama {
43 1.1 nakayama /*
44 1.1 nakayama * MIPS III and MIPS IV CPU's have a cycle counter
45 1.1 nakayama * running at half the internal pipeline rate.
46 1.1 nakayama */
47 1.5 matt #if __mips >= 3
48 1.5 matt return 1;
49 1.5 matt #elif !defined(__mips_o32) || defined(MIPS3_PLUS)
50 1.1 nakayama return (MIPS_HAS_CLOCK);
51 1.5 matt #else
52 1.5 matt return 0;
53 1.5 matt #endif
54 1.1 nakayama }
55 1.1 nakayama
56 1.5 matt #if __mips >= 3 || !defined(__mips_o32) || defined(MIPS3_PLUS)
57 1.6 simonb #define cpu_counter() cpu_counter32()
58 1.1 nakayama
59 1.4 matt uint32_t cpu_counter32(void); /* weak alias of mips3_cp0_count_read */
60 1.5 matt #else
61 1.5 matt #define cpu_counter() (0)
62 1.6 simonb #define cpu_counter32() (0)
63 1.5 matt #endif
64 1.1 nakayama
65 1.3 perry static __inline uint64_t
66 1.1 nakayama cpu_frequency(struct cpu_info *ci)
67 1.1 nakayama {
68 1.4 matt return ci->ci_cctr_freq;
69 1.1 nakayama }
70 1.1 nakayama
71 1.1 nakayama #endif /* _KERNEL */
72 1.1 nakayama #endif /* !_MIPS_CPU_COUNTER_H_ */
73