mips_param.h revision 1.45 1 1.45 simonb /* $NetBSD: mips_param.h,v 1.45 2020/07/26 08:08:41 simonb Exp $ */
2 1.16 simonb
3 1.34 christos /*-
4 1.34 christos * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.34 christos * All rights reserved.
6 1.34 christos *
7 1.34 christos * Redistribution and use in source and binary forms, with or without
8 1.34 christos * modification, are permitted provided that the following conditions
9 1.34 christos * are met:
10 1.34 christos * 1. Redistributions of source code must retain the above copyright
11 1.34 christos * notice, this list of conditions and the following disclaimer.
12 1.34 christos * 2. Redistributions in binary form must reproduce the above copyright
13 1.34 christos * notice, this list of conditions and the following disclaimer in the
14 1.34 christos * documentation and/or other materials provided with the distribution.
15 1.34 christos *
16 1.34 christos * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.34 christos * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.34 christos * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.34 christos * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.34 christos * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.34 christos * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.34 christos * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.34 christos * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.34 christos * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.34 christos * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.34 christos * POSSIBILITY OF SUCH DAMAGE.
27 1.34 christos */
28 1.5 jonathan /*
29 1.26 matt * No reason this can't be common
30 1.26 matt */
31 1.26 matt #if defined(__MIPSEB__)
32 1.26 matt # if defined(__mips_n32) || defined(__mips_n64)
33 1.26 matt # define _MACHINE_ARCH mips64eb
34 1.26 matt # define MACHINE_ARCH "mips64eb"
35 1.26 matt # define _MACHINE32_ARCH mipseb
36 1.26 matt # define MACHINE32_ARCH "mipseb"
37 1.26 matt # else
38 1.26 matt # define _MACHINE_ARCH mipseb
39 1.26 matt # define MACHINE_ARCH "mipseb"
40 1.26 matt # endif
41 1.26 matt #elif defined(__MIPSEL__)
42 1.26 matt # if defined(__mips_n32) || defined(__mips_n64)
43 1.26 matt # define _MACHINE_ARCH mips64el
44 1.26 matt # define MACHINE_ARCH "mips64el"
45 1.26 matt # define _MACHINE32_ARCH mipsel
46 1.26 matt # define MACHINE32_ARCH "mipsel"
47 1.26 matt # else
48 1.26 matt # define _MACHINE_ARCH mipsel
49 1.26 matt # define MACHINE_ARCH "mipsel"
50 1.26 matt #endif
51 1.26 matt #else
52 1.26 matt #error neither __MIPSEL__ nor __MIPSEB__ are defined.
53 1.26 matt #endif
54 1.26 matt
55 1.26 matt /*
56 1.29 matt * Userland code should be using uname/sysctl to get MACHINE so simply
57 1.29 matt * export a generic MACHINE of "mips"
58 1.29 matt */
59 1.29 matt #ifndef _KERNEL
60 1.29 matt #undef MACHINE
61 1.45 simonb #define MACHINE "mips"
62 1.29 matt #endif
63 1.29 matt
64 1.45 simonb #define ALIGNBYTES32 (sizeof(double) - 1)
65 1.45 simonb #define ALIGN32(p) (((uintptr_t)(p) + ALIGNBYTES32) &~ALIGNBYTES32)
66 1.33 matt
67 1.29 matt /*
68 1.5 jonathan * On mips, UPAGES is fixed by sys/arch/mips/mips/locore code
69 1.5 jonathan * to be the number of per-process-wired kernel-stack pages/PTES.
70 1.5 jonathan */
71 1.5 jonathan
72 1.6 jonathan #define SSIZE 1 /* initial stack size/NBPG */
73 1.6 jonathan #define SINCR 1 /* increment of stack/NBPG */
74 1.6 jonathan
75 1.38 matt #if (ENABLE_MIPS_16KB_PAGE + ENABLE_MIPS_8KB_PAGE + ENABLE_MIPS_4KB_PAGE) > 1
76 1.38 matt #error only one of ENABLE_MIPS_{4,8,16}KB_PAGE can be defined.
77 1.24 matt #endif
78 1.5 jonathan
79 1.7 leo #ifndef MSGBUFSIZE
80 1.45 simonb #define MSGBUFSIZE NBPG /* default message buffer size */
81 1.7 leo #endif
82 1.1 jonathan
83 1.43 skrll /*
84 1.43 skrll * Most MIPS have a cache line size of 32 bytes, but Cavium chips
85 1.44 simonb * have a line size 128 bytes and we need to cover the larger size.
86 1.43 skrll */
87 1.45 simonb #define COHERENCY_UNIT 128
88 1.45 simonb #define CACHE_LINE_SIZE 128
89 1.28 matt
90 1.24 matt #ifdef ENABLE_MIPS_16KB_PAGE
91 1.24 matt #define PGSHIFT 14 /* LOG2(NBPG) */
92 1.38 matt #elif defined(ENABLE_MIPS_8KB_PAGE) \
93 1.38 matt || (!defined(ENABLE_MIPS_4KB_PAGE) && __mips >= 3)
94 1.38 matt #define PGSHIFT 13 /* LOG2(NBPG) */
95 1.24 matt #else
96 1.24 matt #define PGSHIFT 12 /* LOG2(NBPG) */
97 1.24 matt #endif
98 1.38 matt #define NBPG (1 << PGSHIFT) /* bytes/page */
99 1.40 skrll #define PGOFSET (NBPG - 1) /* byte offset into page */
100 1.38 matt #define PTPSHIFT 2
101 1.40 skrll #define PTPLENGTH (PGSHIFT - PTPSHIFT)
102 1.38 matt #define NPTEPG (1 << PTPLENGTH)
103 1.1 jonathan
104 1.40 skrll #define SEGSHIFT (PGSHIFT + PTPLENGTH) /* LOG2(NBSEG) */
105 1.40 skrll #define NBSEG (1 << SEGSHIFT) /* bytes/segment */
106 1.1 jonathan #define SEGOFSET (NBSEG-1) /* byte offset into segment */
107 1.28 matt
108 1.28 matt #ifdef _LP64
109 1.40 skrll #define SEGLENGTH (PGSHIFT - 3)
110 1.40 skrll #define XSEGSHIFT (SEGSHIFT + SEGLENGTH) /* LOG2(NBXSEG) */
111 1.39 skrll #define NBXSEG (1UL << XSEGSHIFT) /* bytes/xsegment */
112 1.40 skrll #define XSEGOFSET (NBXSEG - 1) /* byte offset into xsegment */
113 1.40 skrll #define XSEGLENGTH (PGSHIFT - 3)
114 1.38 matt #define NXSEGPG (1 << XSEGLENGTH)
115 1.38 matt #else
116 1.40 skrll #define SEGLENGTH (31 - SEGSHIFT)
117 1.28 matt #endif
118 1.38 matt #define NSEGPG (1 << SEGLENGTH)
119 1.38 matt
120 1.38 matt #if PGSHIFT >= 13
121 1.38 matt #define UPAGES 1 /* pages of u-area */
122 1.38 matt #else
123 1.38 matt #define UPAGES 2 /* pages of u-area */
124 1.38 matt #endif
125 1.38 matt #define USPACE (UPAGES*NBPG) /* size of u-area in bytes */
126 1.38 matt #define USPACE_ALIGN USPACE /* make sure it starts on a even VA */
127 1.1 jonathan
128 1.1 jonathan /*
129 1.17 thorpej * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
130 1.17 thorpej * logical pages.
131 1.13 simonb */
132 1.17 thorpej #define NKMEMPAGES_MIN_DEFAULT ((8 * 1024 * 1024) >> PAGE_SHIFT)
133 1.17 thorpej #define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT)
134 1.1 jonathan
135 1.1 jonathan /*
136 1.1 jonathan * Mach derived conversion macros
137 1.1 jonathan */
138 1.45 simonb #define mips_round_page(x) ((((uintptr_t)(x)) + NBPG - 1) & ~(NBPG-1))
139 1.45 simonb #define mips_trunc_page(x) ((uintptr_t)(x) & ~(NBPG-1))
140 1.45 simonb #define mips_btop(x) ((paddr_t)(x) >> PGSHIFT)
141 1.45 simonb #define mips_ptob(x) ((paddr_t)(x) << PGSHIFT)
142 1.25 matt
143 1.25 matt #ifdef __MIPSEL__
144 1.26 matt #define MID_MACHINE MID_PMAX /* MID_PMAX (little-endian) */
145 1.25 matt #endif
146 1.25 matt #ifdef __MIPSEB__
147 1.26 matt #define MID_MACHINE MID_MIPS /* MID_MIPS (big-endian) */
148 1.25 matt #endif
149 1.25 matt
150 1.26 matt /*
151 1.26 matt * Constants related to network buffer management.
152 1.26 matt * MCLBYTES must be no larger than NBPG (the software page size), and,
153 1.26 matt * on machines that exchange pages of input or output buffers with mbuf
154 1.26 matt * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
155 1.26 matt * of the hardware page size.
156 1.26 matt */
157 1.26 matt #ifndef MSIZE
158 1.26 matt #ifdef _LP64
159 1.26 matt #define MSIZE 512 /* size of an mbuf */
160 1.26 matt #else
161 1.26 matt #define MSIZE 256 /* size of an mbuf */
162 1.26 matt #endif
163 1.26 matt
164 1.26 matt #ifndef MCLSHIFT
165 1.26 matt # define MCLSHIFT 11 /* convert bytes to m_buf clusters */
166 1.26 matt #endif /* MCLSHIFT */
167 1.26 matt
168 1.26 matt #define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */
169 1.26 matt
170 1.26 matt #endif
171