mips_param.h revision 1.54 1 1.54 riastrad /* $NetBSD: mips_param.h,v 1.54 2025/04/25 00:26:58 riastradh Exp $ */
2 1.16 simonb
3 1.34 christos /*-
4 1.34 christos * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.34 christos * All rights reserved.
6 1.34 christos *
7 1.34 christos * Redistribution and use in source and binary forms, with or without
8 1.34 christos * modification, are permitted provided that the following conditions
9 1.34 christos * are met:
10 1.34 christos * 1. Redistributions of source code must retain the above copyright
11 1.34 christos * notice, this list of conditions and the following disclaimer.
12 1.34 christos * 2. Redistributions in binary form must reproduce the above copyright
13 1.34 christos * notice, this list of conditions and the following disclaimer in the
14 1.34 christos * documentation and/or other materials provided with the distribution.
15 1.34 christos *
16 1.34 christos * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.34 christos * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.34 christos * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.34 christos * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.34 christos * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.34 christos * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.34 christos * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.34 christos * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.34 christos * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.34 christos * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.34 christos * POSSIBILITY OF SUCH DAMAGE.
27 1.34 christos */
28 1.51 simonb
29 1.51 simonb #ifdef _KERNEL_OPT
30 1.51 simonb #include "opt_param.h"
31 1.51 simonb #endif
32 1.51 simonb
33 1.5 jonathan /*
34 1.26 matt * No reason this can't be common
35 1.26 matt */
36 1.26 matt #if defined(__MIPSEB__)
37 1.48 christos # define _MACHINE_SUFFIX eb
38 1.48 christos # define MACHINE_SUFFIX "eb"
39 1.26 matt #elif defined(__MIPSEL__)
40 1.48 christos # define _MACHINE_SUFFIX el
41 1.48 christos # define MACHINE_SUFFIX "el"
42 1.48 christos #else
43 1.48 christos # error neither __MIPSEL__ nor __MIPSEB__ are defined.
44 1.26 matt #endif
45 1.48 christos
46 1.50 mrg #define ___MACHINE32_OARCH mips##_MACHINE_SUFFIX
47 1.50 mrg #define __MACHINE32_OARCH "mips" MACHINE_SUFFIX
48 1.50 mrg #define ___MACHINE32_NARCH mips64##_MACHINE_SUFFIX
49 1.50 mrg #define __MACHINE32_NARCH "mips64" MACHINE_SUFFIX
50 1.50 mrg #define ___MACHINE64_NARCH mipsn64##_MACHINE_SUFFIX
51 1.50 mrg #define __MACHINE64_NARCH "mipsn64" MACHINE_SUFFIX
52 1.50 mrg
53 1.48 christos #if defined(__mips_n32) || defined(__mips_n64)
54 1.48 christos # if defined(__mips_n32)
55 1.50 mrg # define _MACHINE_ARCH ___MACHINE32_NARCH
56 1.50 mrg # define MACHINE_ARCH __MACHINE32_NARCH
57 1.48 christos # else /* __mips_n64 */
58 1.50 mrg # define _MACHINE_ARCH ___MACHINE64_NARCH
59 1.50 mrg # define MACHINE_ARCH __MACHINE64_NARCH
60 1.50 mrg # define _MACHINE32_NARCH ___MACHINE32_NARCH
61 1.50 mrg # define MACHINE32_NARCH __MACHINE32_NARCH
62 1.48 christos # endif
63 1.50 mrg # define _MACHINE32_OARCH ___MACHINE32_OARCH
64 1.50 mrg # define MACHINE32_OARCH __MACHINE32_OARCH
65 1.48 christos #else /* o32 */
66 1.50 mrg # define _MACHINE_ARCH ___MACHINE32_OARCH
67 1.50 mrg # define MACHINE_ARCH __MACHINE32_OARCH
68 1.26 matt #endif
69 1.26 matt
70 1.26 matt /*
71 1.29 matt * Userland code should be using uname/sysctl to get MACHINE so simply
72 1.29 matt * export a generic MACHINE of "mips"
73 1.29 matt */
74 1.29 matt #ifndef _KERNEL
75 1.29 matt #undef MACHINE
76 1.45 simonb #define MACHINE "mips"
77 1.29 matt #endif
78 1.29 matt
79 1.53 riastrad #if defined(__mips_n64) || defined(__mips_n32)
80 1.53 riastrad #define STACK_ALIGNBYTES (16 - 1)
81 1.53 riastrad #else
82 1.53 riastrad #define STACK_ALIGNBYTES (8 - 1)
83 1.53 riastrad #endif
84 1.53 riastrad
85 1.54 riastrad #define STACK_ALIGNBYTES_O32 (8 - 1)
86 1.54 riastrad
87 1.45 simonb #define ALIGNBYTES32 (sizeof(double) - 1)
88 1.45 simonb #define ALIGN32(p) (((uintptr_t)(p) + ALIGNBYTES32) &~ALIGNBYTES32)
89 1.33 matt
90 1.29 matt /*
91 1.5 jonathan * On mips, UPAGES is fixed by sys/arch/mips/mips/locore code
92 1.5 jonathan * to be the number of per-process-wired kernel-stack pages/PTES.
93 1.5 jonathan */
94 1.5 jonathan
95 1.6 jonathan #define SSIZE 1 /* initial stack size/NBPG */
96 1.6 jonathan #define SINCR 1 /* increment of stack/NBPG */
97 1.6 jonathan
98 1.38 matt #if (ENABLE_MIPS_16KB_PAGE + ENABLE_MIPS_8KB_PAGE + ENABLE_MIPS_4KB_PAGE) > 1
99 1.38 matt #error only one of ENABLE_MIPS_{4,8,16}KB_PAGE can be defined.
100 1.24 matt #endif
101 1.5 jonathan
102 1.7 leo #ifndef MSGBUFSIZE
103 1.45 simonb #define MSGBUFSIZE NBPG /* default message buffer size */
104 1.7 leo #endif
105 1.1 jonathan
106 1.43 skrll /*
107 1.43 skrll * Most MIPS have a cache line size of 32 bytes, but Cavium chips
108 1.44 simonb * have a line size 128 bytes and we need to cover the larger size.
109 1.43 skrll */
110 1.45 simonb #define COHERENCY_UNIT 128
111 1.45 simonb #define CACHE_LINE_SIZE 128
112 1.28 matt
113 1.24 matt #ifdef ENABLE_MIPS_16KB_PAGE
114 1.24 matt #define PGSHIFT 14 /* LOG2(NBPG) */
115 1.38 matt #elif defined(ENABLE_MIPS_8KB_PAGE) \
116 1.38 matt || (!defined(ENABLE_MIPS_4KB_PAGE) && __mips >= 3)
117 1.38 matt #define PGSHIFT 13 /* LOG2(NBPG) */
118 1.24 matt #else
119 1.24 matt #define PGSHIFT 12 /* LOG2(NBPG) */
120 1.24 matt #endif
121 1.38 matt #define NBPG (1 << PGSHIFT) /* bytes/page */
122 1.40 skrll #define PGOFSET (NBPG - 1) /* byte offset into page */
123 1.38 matt #define PTPSHIFT 2
124 1.40 skrll #define PTPLENGTH (PGSHIFT - PTPSHIFT)
125 1.38 matt #define NPTEPG (1 << PTPLENGTH)
126 1.1 jonathan
127 1.40 skrll #define SEGSHIFT (PGSHIFT + PTPLENGTH) /* LOG2(NBSEG) */
128 1.40 skrll #define NBSEG (1 << SEGSHIFT) /* bytes/segment */
129 1.49 skrll #define SEGOFSET (NBSEG - 1) /* byte offset into segment */
130 1.28 matt
131 1.28 matt #ifdef _LP64
132 1.40 skrll #define SEGLENGTH (PGSHIFT - 3)
133 1.40 skrll #define XSEGSHIFT (SEGSHIFT + SEGLENGTH) /* LOG2(NBXSEG) */
134 1.39 skrll #define NBXSEG (1UL << XSEGSHIFT) /* bytes/xsegment */
135 1.40 skrll #define XSEGOFSET (NBXSEG - 1) /* byte offset into xsegment */
136 1.40 skrll #define XSEGLENGTH (PGSHIFT - 3)
137 1.38 matt #define NXSEGPG (1 << XSEGLENGTH)
138 1.38 matt #else
139 1.40 skrll #define SEGLENGTH (31 - SEGSHIFT)
140 1.28 matt #endif
141 1.38 matt #define NSEGPG (1 << SEGLENGTH)
142 1.38 matt
143 1.46 simonb #ifdef _LP64
144 1.46 simonb #define __MIN_USPACE 16384 /* LP64 needs a 16kB stack */
145 1.38 matt #else
146 1.46 simonb /*
147 1.46 simonb * Note for the non-LP64 case, cpu_switch_resume has the assumption
148 1.46 simonb * that UPAGES == 2. For MIPS-I we wire USPACE in TLB #0 and #1.
149 1.52 andvar * For MIPS3+ we wire USPACE in the TLB #0 pair.
150 1.46 simonb */
151 1.46 simonb #define __MIN_USPACE 8192 /* otherwise use an 8kB stack */
152 1.38 matt #endif
153 1.46 simonb #define USPACE MAX(__MIN_USPACE, PAGE_SIZE)
154 1.46 simonb #define UPAGES (USPACE / PAGE_SIZE) /* number of pages for u-area */
155 1.38 matt #define USPACE_ALIGN USPACE /* make sure it starts on a even VA */
156 1.47 simonb #define UPAGES_MAX 8 /* a (constant) max for userland use */
157 1.1 jonathan
158 1.1 jonathan /*
159 1.17 thorpej * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
160 1.17 thorpej * logical pages.
161 1.13 simonb */
162 1.17 thorpej #define NKMEMPAGES_MIN_DEFAULT ((8 * 1024 * 1024) >> PAGE_SHIFT)
163 1.17 thorpej #define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT)
164 1.1 jonathan
165 1.1 jonathan /*
166 1.1 jonathan * Mach derived conversion macros
167 1.1 jonathan */
168 1.45 simonb #define mips_round_page(x) ((((uintptr_t)(x)) + NBPG - 1) & ~(NBPG-1))
169 1.45 simonb #define mips_trunc_page(x) ((uintptr_t)(x) & ~(NBPG-1))
170 1.45 simonb #define mips_btop(x) ((paddr_t)(x) >> PGSHIFT)
171 1.45 simonb #define mips_ptob(x) ((paddr_t)(x) << PGSHIFT)
172 1.25 matt
173 1.25 matt #ifdef __MIPSEL__
174 1.26 matt #define MID_MACHINE MID_PMAX /* MID_PMAX (little-endian) */
175 1.25 matt #endif
176 1.25 matt #ifdef __MIPSEB__
177 1.26 matt #define MID_MACHINE MID_MIPS /* MID_MIPS (big-endian) */
178 1.25 matt #endif
179 1.25 matt
180 1.26 matt /*
181 1.26 matt * Constants related to network buffer management.
182 1.26 matt * MCLBYTES must be no larger than NBPG (the software page size), and,
183 1.26 matt * on machines that exchange pages of input or output buffers with mbuf
184 1.26 matt * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
185 1.26 matt * of the hardware page size.
186 1.26 matt */
187 1.26 matt #ifndef MSIZE
188 1.26 matt #ifdef _LP64
189 1.26 matt #define MSIZE 512 /* size of an mbuf */
190 1.26 matt #else
191 1.26 matt #define MSIZE 256 /* size of an mbuf */
192 1.26 matt #endif
193 1.26 matt
194 1.26 matt #ifndef MCLSHIFT
195 1.26 matt # define MCLSHIFT 11 /* convert bytes to m_buf clusters */
196 1.26 matt #endif /* MCLSHIFT */
197 1.26 matt
198 1.26 matt #define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */
199 1.26 matt
200 1.26 matt #endif
201