mips_param.h revision 1.6 1 /* $NetBSD: mips_param.h,v 1.6 1997/08/20 03:47:17 jonathan Exp $ */
2
3 /*
4 * Architecture name.
5 */
6 #define _MACHINE_ARCH mips
7 #define MACHINE_ARCH "mips"
8
9 /*
10 * NOTE: SSIZE, SINCR and UPAGES must be multiples of CLSIZE.
11 * On mips, UPAGES is fixed by sys/arch/mips/mips/locore code
12 * to be the number of per-process-wired kernel-stack pages/PTES.
13 */
14
15 #define SSIZE 1 /* initial stack size/NBPG */
16 #define SINCR 1 /* increment of stack/NBPG */
17
18 #define UPAGES 2 /* pages of u-area */
19 #define UADDR 0xffffc000 /* address of u */
20 #define USPACE (UPAGES*NBPG) /* size of u-area in bytes */
21 #define UVPN (UADDR>>PGSHIFT)/* virtual page number of u */
22 #define KERNELSTACK (UADDR+UPAGES*NBPG) /* top of kernel stack */
23
24
25 /*
26 * Round p (pointer or byte index) up to a correctly-aligned value for all
27 * data types (int, long, ...). The result is u_int and must be cast to
28 * any desired pointer type.
29 */
30 #define ALIGNBYTES 7
31 #define ALIGN(p) (((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES)
32 #define ALIGNED_POINTER(p,t) ((((u_long)(p)) & (sizeof(t)-1)) == 0)
33
34 #define NBPG 4096 /* bytes/page */
35 #define PGOFSET (NBPG-1) /* byte offset into page */
36 #define PGSHIFT 12 /* LOG2(NBPG) */
37 #define NPTEPG (NBPG/4)
38
39 #define NBSEG 0x400000 /* bytes/segment */
40 #define SEGOFSET (NBSEG-1) /* byte offset into segment */
41 #define SEGSHIFT 22 /* LOG2(NBSEG) */
42
43 /*
44 * Size of kernel malloc arena in CLBYTES-sized logical pages
45 */
46 #ifndef NKMEMCLUSTERS
47 #define NKMEMCLUSTERS (512*1024/CLBYTES)
48 #endif
49
50 /* pages ("clicks") (4096 bytes) to disk blocks */
51 #define ctod(x) ((x) << (PGSHIFT - DEV_BSHIFT))
52 #define dtoc(x) ((x) >> (PGSHIFT - DEV_BSHIFT))
53
54 /* pages to bytes */
55 #define ctob(x) ((x) << PGSHIFT)
56 #define btoc(x) (((x) + PGOFSET) >> PGSHIFT)
57
58 /* bytes to disk blocks */
59 #define btodb(x) ((x) >> DEV_BSHIFT)
60 #define dbtob(x) ((x) << DEV_BSHIFT)
61
62 /*
63 * Map a ``block device block'' to a file system block.
64 * This should be device dependent, and should use the bsize
65 * field from the disk label.
66 * For now though just use DEV_BSIZE.
67 */
68 #define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE))
69
70 /*
71 * Mach derived conversion macros
72 */
73 #define mips_round_page(x) ((((unsigned)(x)) + NBPG - 1) & ~(NBPG-1))
74 #define mips_trunc_page(x) ((unsigned)(x) & ~(NBPG-1))
75 #define mips_btop(x) ((unsigned)(x) >> PGSHIFT)
76 #define mips_ptob(x) ((unsigned)(x) << PGSHIFT)
77
78 #ifdef _KERNEL
79 #ifndef _LOCORE
80 typedef int spl_t;
81 extern spl_t splx __P((spl_t));
82 extern spl_t splsoftnet __P((void)), splsoftclock __P((void));
83 extern spl_t splhigh __P((void));
84 extern spl_t spl0 __P((void)); /* XXX should not enable TC on 3min */
85
86 extern void setsoftnet __P((void)), clearsoftnet __P((void));
87 extern void setsoftclock __P((void)), clearsoftclock __P((void));
88
89
90 extern int (*Mach_splnet) __P((void)), (*Mach_splbio) __P((void)),
91 (*Mach_splimp) __P((void)), (*Mach_spltty) __P((void)),
92 (*Mach_splclock) __P((void)), (*Mach_splstatclock) __P((void)),
93 (*Mach_splnone) __P((void));
94 #define splnet() ((*Mach_splnet)())
95 #define splbio() ((*Mach_splbio)())
96 #define splimp() ((*Mach_splimp)())
97 #define spltty() ((*Mach_spltty)())
98 #define splclock() ((*Mach_splclock)())
99 #define splstatclock() ((*Mach_splstatclock)())
100
101 extern void delay __P((int n));
102 extern int cpuspeed;
103 #define DELAY(n) { register int N = cpuspeed * (n); while (--N > 0); }
104
105
106 #endif /* !_LOCORE */
107 #endif /* _KERNEL */
108