pmap.h revision 1.54.26.17
1 /* $NetBSD: pmap.h,v 1.54.26.17 2011/02/05 06:31:05 cliff Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * Copyright (c) 1987 Carnegie-Mellon University 39 * 40 * This code is derived from software contributed to Berkeley by 41 * Ralph Campbell. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 72 */ 73 74 #ifndef _MIPS_PMAP_H_ 75 #define _MIPS_PMAP_H_ 76 77 #ifdef _KERNEL_OPT 78 #include "opt_multiprocessor.h" 79 #endif 80 81 #include <mips/cpuregs.h> /* for KSEG0 below */ 82 //#include <mips/pte.h> 83 84 /* 85 * The user address space is 2Gb (0x0 - 0x80000000). 86 * User programs are laid out in memory as follows: 87 * address 88 * USRTEXT 0x00001000 89 * USRDATA USRTEXT + text_size 90 * USRSTACK 0x7FFFFFFF 91 * 92 * The user address space is mapped using a two level structure where 93 * virtual address bits 30..22 are used to index into a segment table which 94 * points to a page worth of PTEs (4096 page can hold 1024 PTEs). 95 * Bits 21..12 are then used to index a PTE which describes a page within 96 * a segment. 97 * 98 * The wired entries in the TLB will contain the following: 99 * 0-1 (UPAGES) for curproc user struct and kernel stack. 100 * 101 * Note: The kernel doesn't use the same data structures as user programs. 102 * All the PTE entries are stored in a single array in Sysmap which is 103 * dynamically allocated at boot time. 104 */ 105 106 #define mips_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET) 107 #define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) & ~SEGOFSET) 108 109 #ifdef _LP64 110 #define PMAP_SEGTABSIZE NSEGPG 111 #else 112 #define PMAP_SEGTABSIZE (1 << (31 - SEGSHIFT)) 113 #endif 114 115 union pt_entry; 116 117 union segtab { 118 #ifdef _LP64 119 union segtab *seg_seg[PMAP_SEGTABSIZE]; 120 #endif 121 union pt_entry *seg_tab[PMAP_SEGTABSIZE]; 122 }; 123 124 /* 125 * Structure defining an tlb entry data set. 126 */ 127 struct tlb { 128 vaddr_t tlb_hi; /* should be 64 bits */ 129 uint32_t tlb_lo0; /* XXX maybe 64 bits (only 32 really used) */ 130 uint32_t tlb_lo1; /* XXX maybe 64 bits (only 32 really used) */ 131 }; 132 133 struct tlbmask { 134 vaddr_t tlb_hi; /* should be 64 bits */ 135 uint32_t tlb_lo0; /* XXX maybe 64 bits (only 32 really used) */ 136 uint32_t tlb_lo1; /* XXX maybe 64 bits (only 32 really used) */ 137 uint32_t tlb_mask; 138 }; 139 140 #ifdef _KERNEL 141 struct pmap; 142 typedef bool (*pte_callback_t)(struct pmap *, vaddr_t, vaddr_t, 143 union pt_entry *, uintptr_t); 144 union pt_entry *pmap_pte_lookup(struct pmap *, vaddr_t); 145 union pt_entry *pmap_pte_reserve(struct pmap *, vaddr_t, int); 146 void pmap_pte_process(struct pmap *, vaddr_t, vaddr_t, pte_callback_t, 147 uintptr_t); 148 void pmap_segtab_activate(struct pmap *, struct lwp *); 149 void pmap_segtab_init(struct pmap *); 150 void pmap_segtab_destroy(struct pmap *); 151 #endif /* _KERNEL */ 152 153 /* 154 * Per TLB (normally same as CPU) asid info 155 */ 156 struct pmap_asid_info { 157 LIST_ENTRY(pmap_asid_info) pai_link; 158 uint32_t pai_asid; /* TLB address space tag */ 159 }; 160 161 #define TLBINFO_LOCK(ti) mutex_spin_enter((ti)->ti_lock) 162 #define TLBINFO_UNLOCK(ti) mutex_spin_exit((ti)->ti_lock) 163 #define PMAP_PAI_ASIDVALID_P(pai, ti) ((pai)->pai_asid != 0) 164 #define PMAP_PAI(pmap, ti) (&(pmap)->pm_pai[tlbinfo_index(ti)]) 165 #define PAI_PMAP(pai, ti) \ 166 ((pmap_t)((intptr_t)(pai) \ 167 - offsetof(struct pmap, pm_pai[tlbinfo_index(ti)]))) 168 169 /* 170 * Machine dependent pmap structure. 171 */ 172 typedef struct pmap { 173 #ifdef MULTIPROCESSOR 174 volatile uint32_t pm_active; /* pmap was active on ... */ 175 volatile uint32_t pm_onproc; /* pmap is active on ... */ 176 volatile u_int pm_shootdown_pending; 177 #endif 178 union segtab *pm_segtab; /* pointers to pages of PTEs */ 179 u_int pm_count; /* pmap reference count */ 180 u_int pm_flags; 181 #define PMAP_DEFERRED_ACTIVATE 0x0001 182 struct pmap_statistics pm_stats; /* pmap statistics */ 183 struct pmap_asid_info pm_pai[1]; 184 } *pmap_t; 185 186 enum tlb_invalidate_op { 187 TLBINV_NOBODY=0, 188 TLBINV_ONE=1, 189 TLBINV_ALLUSER=2, 190 TLBINV_ALLKERNEL=3, 191 TLBINV_ALL=4 192 }; 193 194 struct pmap_tlb_info { 195 char ti_name[8]; 196 uint32_t ti_asid_hint; /* probable next ASID to use */ 197 uint32_t ti_asids_free; /* # of ASIDs free */ 198 #define tlbinfo_noasids_p(ti) ((ti)->ti_asids_free == 0) 199 kmutex_t *ti_lock; 200 u_int ti_wired; /* # of wired TLB entries */ 201 uint32_t ti_asid_mask; 202 uint32_t ti_asid_max; 203 LIST_HEAD(, pmap_asid_info) ti_pais; /* list of active ASIDs */ 204 #ifdef MULTIPROCESSOR 205 pmap_t ti_victim; 206 uint32_t ti_synci_page_bitmap; /* page indices needing a syncicache */ 207 uint32_t ti_cpu_mask; /* bitmask of CPUs sharing this TLB */ 208 enum tlb_invalidate_op ti_tlbinvop; 209 u_int ti_index; 210 #define tlbinfo_index(ti) ((ti)->ti_index) 211 struct evcnt ti_evcnt_synci_asts; 212 struct evcnt ti_evcnt_synci_all; 213 struct evcnt ti_evcnt_synci_pages; 214 struct evcnt ti_evcnt_synci_deferred; 215 struct evcnt ti_evcnt_synci_desired; 216 struct evcnt ti_evcnt_synci_duplicate; 217 #else 218 #define tlbinfo_index(ti) (0) 219 #endif 220 u_long ti_asid_bitmap[256 / (sizeof(u_long) * 8)]; 221 }; 222 223 224 #ifdef _KERNEL 225 226 struct pmap_kernel { 227 struct pmap kernel_pmap; 228 #ifdef MULTIPROCESSOR 229 struct pmap_asid_info kernel_pai[MAXCPUS-1]; 230 #endif 231 }; 232 233 extern struct pmap_kernel kernel_pmap_store; 234 extern struct pmap_tlb_info pmap_tlb0_info; 235 #ifdef MULTIPROCESSOR 236 extern struct pmap_tlb_info *pmap_tlbs[MAXCPUS]; 237 extern u_int pmap_ntlbs; 238 #endif 239 extern paddr_t mips_avail_start; 240 extern paddr_t mips_avail_end; 241 extern vaddr_t mips_virtual_end; 242 243 #define pmap_kernel() (&kernel_pmap_store.kernel_pmap) 244 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 245 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 246 247 #define pmap_phys_address(x) mips_ptob(x) 248 249 /* 250 * Bootstrap the system enough to run with virtual memory. 251 */ 252 void pmap_bootstrap(void); 253 254 void pmap_remove_all(pmap_t); 255 void pmap_set_modified(paddr_t); 256 void pmap_procwr(struct proc *, vaddr_t, size_t); 257 #define PMAP_NEED_PROCWR 258 259 #ifdef MULTIPROCESSOR 260 void pmap_tlb_shootdown_process(void); 261 bool pmap_tlb_shootdown_bystanders(pmap_t pmap); 262 void pmap_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *); 263 void pmap_tlb_syncicache_ast(struct cpu_info *); 264 void pmap_tlb_syncicache_wanted(struct cpu_info *); 265 void pmap_tlb_syncicache(vaddr_t, uint32_t); 266 #endif 267 void pmap_tlb_info_init(struct pmap_tlb_info *); 268 void pmap_tlb_asid_acquire(pmap_t pmap, struct lwp *l); 269 void pmap_tlb_asid_deactivate(pmap_t pmap); 270 void pmap_tlb_asid_check(void); 271 void pmap_tlb_asid_release_all(pmap_t pmap); 272 int pmap_tlb_update_addr(pmap_t pmap, vaddr_t, uint32_t, bool); 273 void pmap_tlb_invalidate_addr(pmap_t pmap, vaddr_t); 274 275 uint16_t pmap_pvlist_lock(struct vm_page *, bool); 276 277 /* 278 * pmap_prefer() helps reduce virtual-coherency exceptions in 279 * the virtually-indexed cache on mips3 CPUs. 280 */ 281 #ifdef MIPS3_PLUS 282 #define PMAP_PREFER(pa, va, sz, td) pmap_prefer((pa), (va), (sz), (td)) 283 void pmap_prefer(vaddr_t, vaddr_t *, vsize_t, int); 284 #endif /* MIPS3_PLUS */ 285 286 #define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */ 287 288 /* 289 * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. 290 */ 291 vaddr_t mips_pmap_map_poolpage(paddr_t); 292 paddr_t mips_pmap_unmap_poolpage(vaddr_t); 293 struct vm_page *mips_pmap_alloc_poolpage(int); 294 #define PMAP_ALLOC_POOLPAGE(flags) mips_pmap_alloc_poolpage(flags) 295 #define PMAP_MAP_POOLPAGE(pa) mips_pmap_map_poolpage(pa) 296 #define PMAP_UNMAP_POOLPAGE(va) mips_pmap_unmap_poolpage(va) 297 298 /* 299 * Other hooks for the pool allocator. 300 */ 301 #ifdef _LP64 302 #define POOL_VTOPHYS(va) (MIPS_KSEG0_P(va) \ 303 ? MIPS_KSEG0_TO_PHYS(va) \ 304 : MIPS_XKPHYS_TO_PHYS(va)) 305 #else 306 #define POOL_VTOPHYS(va) MIPS_KSEG0_TO_PHYS((vaddr_t)(va)) 307 #endif 308 309 /* 310 * Select CCA to use for unmanaged pages. 311 */ 312 #define PMAP_CCA_FOR_PA(pa) CCA_UNCACHED /* uncached */ 313 314 #if defined(_MIPS_PADDR_T_64BIT) || defined(_LP64) 315 #define PMAP_NOCACHE 0x4000000000000000ULL 316 #endif 317 318 #endif /* _KERNEL */ 319 #endif /* _MIPS_PMAP_H_ */ 320
Indexes created Sun Oct 19 16:10:00 GMT 2025