r3900regs.h revision 1.4.2.2
1 1.4.2.2 bouyer /* $NetBSD: r3900regs.h,v 1.4.2.2 2000/11/20 20:13:32 bouyer Exp $ */ 2 1.4.2.2 bouyer 3 1.4.2.2 bouyer /*- 4 1.4.2.2 bouyer * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 1.4.2.2 bouyer * All rights reserved. 6 1.4.2.2 bouyer * 7 1.4.2.2 bouyer * This code is derived from software contributed to The NetBSD Foundation 8 1.4.2.2 bouyer * by UCHIYAMA Yasushi. 9 1.4.2.2 bouyer * 10 1.4.2.2 bouyer * Redistribution and use in source and binary forms, with or without 11 1.4.2.2 bouyer * modification, are permitted provided that the following conditions 12 1.4.2.2 bouyer * are met: 13 1.4.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 14 1.4.2.2 bouyer * notice, this list of conditions and the following disclaimer. 15 1.4.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 16 1.4.2.2 bouyer * notice, this list of conditions and the following disclaimer in the 17 1.4.2.2 bouyer * documentation and/or other materials provided with the distribution. 18 1.4.2.2 bouyer * 3. All advertising materials mentioning features or use of this software 19 1.4.2.2 bouyer * must display the following acknowledgement: 20 1.4.2.2 bouyer * This product includes software developed by the NetBSD 21 1.4.2.2 bouyer * Foundation, Inc. and its contributors. 22 1.4.2.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.4.2.2 bouyer * contributors may be used to endorse or promote products derived 24 1.4.2.2 bouyer * from this software without specific prior written permission. 25 1.4.2.2 bouyer * 26 1.4.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.4.2.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.4.2.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.4.2.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.4.2.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.4.2.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.4.2.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.4.2.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.4.2.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.4.2.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.4.2.2 bouyer * POSSIBILITY OF SUCH DAMAGE. 37 1.4.2.2 bouyer */ 38 1.4.2.2 bouyer 39 1.4.2.2 bouyer /* 40 1.4.2.2 bouyer * [address space] 41 1.4.2.2 bouyer * kseg2 0xc0000000 - 0xfeffffff 42 1.4.2.2 bouyer * reserved 0xff000000 - 0xfffeffff 43 1.4.2.2 bouyer * kseg2 0xffff0000 - 0xffffffff 44 1.4.2.2 bouyer * -> vmparam.h VM_MAX_KERNEL_ADDRESS 45 1.4.2.2 bouyer */ 46 1.4.2.2 bouyer 47 1.4.2.2 bouyer /* 48 1.4.2.2 bouyer * [cause register] 49 1.4.2.2 bouyer */ 50 1.4.2.2 bouyer #define R3900_CR_EXC_CODE MIPS3_CR_EXC_CODE /* five bits */ 51 1.4.2.2 bouyer #undef MIPS1_CR_EXC_CODE 52 1.4.2.2 bouyer #define MIPS1_CR_EXC_CODE R3900_CR_EXC_CODE 53 1.4.2.2 bouyer 54 1.4.2.2 bouyer /* 55 1.4.2.2 bouyer * [status register] 56 1.4.2.2 bouyer * R3900 don't have PE, CM, PZ, SwC and IsC. 57 1.4.2.2 bouyer */ 58 1.4.2.2 bouyer #define R3900_SR_NMI 0x00100000 /* r3k PE position */ 59 1.4.2.2 bouyer #undef MIPS1_PARITY_ERR 60 1.4.2.2 bouyer #undef MIPS1_CACHE_MISS 61 1.4.2.2 bouyer #undef MIPS1_PARITY_ZERO 62 1.4.2.2 bouyer #undef MIPS1_SWAP_CACHES 63 1.4.2.2 bouyer #undef MIPS1_ISOL_CACHES 64 1.4.2.2 bouyer 65 1.4.2.2 bouyer /* 66 1.4.2.2 bouyer * [context register] 67 1.4.2.2 bouyer * - no changes. 68 1.4.2.2 bouyer */ 69 1.4.2.2 bouyer 70 1.4.2.2 bouyer 71 1.4.2.2 bouyer /* 72 1.4.2.2 bouyer * TX3900 Coprocessor 0 registers 73 1.4.2.2 bouyer */ 74 1.4.2.2 bouyer #define R3900_COP_0_CONFIG $3 75 1.4.2.2 bouyer #define R3900_COP_0_DEBUG $16 76 1.4.2.2 bouyer #define R3900_COP_0_DEPC $17 77 1.4.2.2 bouyer 78 1.4.2.2 bouyer #define R3920_COP_0_PAGEMASK $5 79 1.4.2.2 bouyer #define R3920_COP_0_WIRED $6 80 1.4.2.2 bouyer #define R3920_COP_0_CACHE $7 81 1.4.2.2 bouyer #define R3920_COP_0_TAG_LO $20 82 1.4.2.2 bouyer 83 1.4.2.2 bouyer /* 84 1.4.2.2 bouyer * TLB entry 85 1.4.2.2 bouyer * 3912 ... TLB entry is 64bits wide and R3000A compatible 86 1.4.2.2 bouyer * 3922 ... TLB entry is 96bits wide 87 1.4.2.2 bouyer */ 88 1.4.2.2 bouyer 89 1.4.2.2 bouyer /* 90 1.4.2.2 bouyer * Index register 91 1.4.2.2 bouyer * 3912 ... index field[8:12] (32 entry) 92 1.4.2.2 bouyer */ 93 1.4.2.2 bouyer #define R3900_TLB_NUM_TLB_ENTRIES 32 94 1.4.2.2 bouyer #define R3920_TLB_NUM_TLB_ENTRIES 64 95 1.4.2.2 bouyer #undef MIPS1_TLB_NUM_TLB_ENTRIES 96 1.4.2.2 bouyer #ifdef TX391X 97 1.4.2.2 bouyer #define MIPS1_TLB_NUM_TLB_ENTRIES R3900_TLB_NUM_TLB_ENTRIES 98 1.4.2.2 bouyer #elif defined TX392X 99 1.4.2.2 bouyer #define MIPS1_TLB_NUM_TLB_ENTRIES R3920_TLB_NUM_TLB_ENTRIES 100 1.4.2.2 bouyer #endif 101 1.4.2.2 bouyer 102 1.4.2.2 bouyer /* 103 1.4.2.2 bouyer * Config register (R3900 specific) 104 1.4.2.2 bouyer */ 105 1.4.2.2 bouyer #define R3900_CONFIG_ICS_SHIFT 19 106 1.4.2.2 bouyer #define R3900_CONFIG_ICS_MASK 0x00380000 107 1.4.2.2 bouyer #define R3900_CONFIG_ICS_1KB 0x00000000 108 1.4.2.2 bouyer #define R3900_CONFIG_ICS_2KB 0x00080000 109 1.4.2.2 bouyer #define R3900_CONFIG_ICS_4KB 0x00100000 110 1.4.2.2 bouyer #define R3900_CONFIG_ICS_8KB 0x00180000 111 1.4.2.2 bouyer #define R3900_CONFIG_ICS_16KB 0x00200000 112 1.4.2.2 bouyer 113 1.4.2.2 bouyer #define R3900_CONFIG_DCS_SHIFT 16 114 1.4.2.2 bouyer #define R3900_CONFIG_DCS_1KB 0x00000000 115 1.4.2.2 bouyer #define R3900_CONFIG_DCS_2KB 0x00010000 116 1.4.2.2 bouyer #define R3900_CONFIG_DCS_4KB 0x00020000 117 1.4.2.2 bouyer #define R3900_CONFIG_DCS_8KB 0x00030000 118 1.4.2.2 bouyer #define R3900_CONFIG_DCS_16KB 0x00040000 119 1.4.2.2 bouyer 120 1.4.2.2 bouyer #define R3900_CONFIG_DCS_MASK 0x00070000 121 1.4.2.2 bouyer #define R3900_CONFIG_CWFON 0x00004000 122 1.4.2.2 bouyer #define R3900_CONFIG_WBON 0x00002000 123 1.4.2.2 bouyer #define R3900_CONFIG_RF_SHIFT 10 124 1.4.2.2 bouyer #define R3900_CONFIG_RF_MASK 0x00000c00 125 1.4.2.2 bouyer #define R3900_CONFIG_DOZE 0x00000200 126 1.4.2.2 bouyer #define R3900_CONFIG_HALT 0x00000100 127 1.4.2.2 bouyer #define R3900_CONFIG_LOCK 0x00000080 128 1.4.2.2 bouyer #define R3900_CONFIG_ICE 0x00000020 129 1.4.2.2 bouyer #define R3900_CONFIG_DCE 0x00000010 130 1.4.2.2 bouyer #define R3900_CONFIG_IRSIZE_SHIFT 2 131 1.4.2.2 bouyer #define R3900_CONFIG_IRSIZE_MASK 0x0000000c 132 1.4.2.2 bouyer #define R3900_CONFIG_DRSIZE_SHIFT 0 133 1.4.2.2 bouyer #define R3900_CONFIG_DRSIZE_MASK 0x00000003 134 1.4.2.2 bouyer 135 1.4.2.2 bouyer /* 136 1.4.2.2 bouyer * CACHE 137 1.4.2.2 bouyer */ 138 1.4.2.2 bouyer /* Cache size (limit) */ 139 1.4.2.2 bouyer /* R3900/R3920 */ 140 1.4.2.2 bouyer #define R3900_C_SIZE_MIN 1024 141 1.4.2.2 bouyer #define R3900_C_SIZE_MAX 8192 142 1.4.2.2 bouyer /* Cache line size */ 143 1.4.2.2 bouyer /* R3900 */ 144 1.4.2.2 bouyer #define R3900_C_LSIZE_I 16 145 1.4.2.2 bouyer #define R3900_C_LSIZE_D 4 146 1.4.2.2 bouyer /* R3920 */ 147 1.4.2.2 bouyer #define R3920_C_LSIZE_I 16 148 1.4.2.2 bouyer #define R3920_C_LSIZE_D 16 149 1.4.2.2 bouyer /* Cache operation */ 150 1.4.2.2 bouyer /* R3900 */ 151 1.4.2.2 bouyer #define R3900_C_IINV_I 0x00 152 1.4.2.2 bouyer #define R3900_C_IWBINV_D 0x01 153 1.4.2.2 bouyer #define R3900_C_ILRUC_I 0x04 154 1.4.2.2 bouyer #define R3900_C_ILRUC_D 0x05 155 1.4.2.2 bouyer #define R3900_C_ILCKC_D 0x09 /* R3900 only */ 156 1.4.2.2 bouyer #define R3900_C_HINV_D 0x11 157 1.4.2.2 bouyer /* R3920 */ 158 1.4.2.2 bouyer #define R3920_C_IINV_I 0x00 159 1.4.2.2 bouyer #define R3920_C_IWBINV_D 0x01 160 1.4.2.2 bouyer #define R3920_C_ILRUC_I 0x04 161 1.4.2.2 bouyer #define R3920_C_ILRUC_D 0x05 162 1.4.2.2 bouyer #define R3920_C_ILDTAG_I 0x0c /* R3920 only */ 163 1.4.2.2 bouyer #define R3920_C_ILDTAG_D 0x0d /* R3920 only */ 164 1.4.2.2 bouyer #define R3920_C_HINV_I 0x10 /* R3920 only */ 165 1.4.2.2 bouyer #define R3920_C_HINV_D 0x11 166 1.4.2.2 bouyer #define R3920_C_HWBINV_D 0x14 /* R3920 only */ 167 1.4.2.2 bouyer #define R3920_C_HWB_D 0x18 /* R3920 only */ 168 1.4.2.2 bouyer #define R3920_C_ISTTAG_I 0x1c /* R3920 only */ 169 1.4.2.2 bouyer #define R3920_C_ISTTAG_D 0x1d /* R3920 only */ 170
Indexes created Mon Oct 27 08:10:08 GMT 2025