regnum.h revision 1.10 1 /* $NetBSD: regnum.h,v 1.10 2011/02/08 20:20:19 rmind Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: Utah Hdr: reg.h 1.1 90/07/09
37 *
38 * @(#)reg.h 8.2 (Berkeley) 1/11/94
39 */
40
41 /*
42 * Location of the users' stored
43 * registers relative to ZERO.
44 * Usage is p->p_regs[XX].
45 */
46 #define _R_ZERO 0 /* hardware zero */
47 #define _R_AST 1 /* caller-saved */
48 #define _R_V0 2 /* caller-saved */
49 #define _R_V1 3 /* caller-saved */
50 #define _R_A0 4 /* caller-saved */
51 #define _R_A1 5 /* caller-saved */
52 #define _R_A2 6 /* caller-saved */
53 #define _R_A3 7 /* caller-saved */
54 #if defined(__mips_n32) || defined(__mips_n64)
55 #define _R_A4 8 /* caller-saved */
56 #define _R_A5 9 /* caller-saved */
57 #define _R_A6 10 /* caller-saved */
58 #define _R_A7 11 /* caller-saved */
59 #define _R_T0 12 /* caller-saved */
60 #define _R_T1 13 /* caller-saved */
61 #define _R_T2 14 /* caller-saved */
62 #define _R_T3 15 /* caller-saved */
63 #else
64 #define _R_T0 8 /* caller-saved */
65 #define _R_T1 9 /* caller-saved */
66 #define _R_T2 10 /* caller-saved */
67 #define _R_T3 11 /* caller-saved */
68 #define _R_T4 12 /* caller-saved */
69 #define _R_T5 13 /* caller-saved */
70 #define _R_T6 14 /* caller-saved */
71 #define _R_T7 15 /* caller-saved */
72 #endif /* __mips_n32 || __mips_n64 */
73 #define _R_S0 16 /* CALLEE-saved */
74 #define _R_S1 17 /* CALLEE-saved */
75 #define _R_S2 18 /* CALLEE-saved */
76 #define _R_S3 19 /* CALLEE-saved */
77 #define _R_S4 20 /* CALLEE-saved */
78 #define _R_S5 21 /* CALLEE-saved */
79 #define _R_S6 22 /* CALLEE-saved */
80 #define _R_S7 23 /* CALLEE-saved */
81 #define _R_T8 24 /* caller-saved */
82 #define _R_T9 25 /* caller-saved */
83 #define _R_K0 26 /* kernel reserved */
84 #define _R_K1 27 /* kernel reserved */
85 #define _R_GP 28 /* CALLEE-saved */
86 #define _R_SP 29 /* CALLEE-saved */
87 #define _R_S8 30 /* CALLEE-saved */
88 #define _R_RA 31 /* caller-saved */
89 #define _R_SR 32
90 #define _R_PS _R_SR /* alias for SR */
91
92 /* See <mips/regdef.h> for an explanation. */
93 #if defined(__mips_n32) || defined(__mips_n64)
94 #define _R_TA0 8
95 #define _R_TA1 9
96 #define _R_TA2 10
97 #define _R_TA3 11
98 #else
99 #define _R_TA0 12
100 #define _R_TA1 13
101 #define _R_TA2 14
102 #define _R_TA3 15
103 #endif /* __mips_n32 || __mips_n64 */
104
105 #define _R_MULLO 33
106 #define _R_MULHI 34
107 #define _R_BADVADDR 35
108 #define _R_CAUSE 36
109 #define _R_PC 37
110
111 #define _FPBASE 38
112 #define _R_F0 (_FPBASE+0)
113 #define _R_F1 (_FPBASE+1)
114 #define _R_F2 (_FPBASE+2)
115 #define _R_F3 (_FPBASE+3)
116 #define _R_F4 (_FPBASE+4)
117 #define _R_F5 (_FPBASE+5)
118 #define _R_F6 (_FPBASE+6)
119 #define _R_F7 (_FPBASE+7)
120 #define _R_F8 (_FPBASE+8)
121 #define _R_F9 (_FPBASE+9)
122 #define _R_F10 (_FPBASE+10)
123 #define _R_F11 (_FPBASE+11)
124 #define _R_F12 (_FPBASE+12)
125 #define _R_F13 (_FPBASE+13)
126 #define _R_F14 (_FPBASE+14)
127 #define _R_F15 (_FPBASE+15)
128 #define _R_F16 (_FPBASE+16)
129 #define _R_F17 (_FPBASE+17)
130 #define _R_F18 (_FPBASE+18)
131 #define _R_F19 (_FPBASE+19)
132 #define _R_F20 (_FPBASE+20)
133 #define _R_F21 (_FPBASE+21)
134 #define _R_F22 (_FPBASE+22)
135 #define _R_F23 (_FPBASE+23)
136 #define _R_F24 (_FPBASE+24)
137 #define _R_F25 (_FPBASE+25)
138 #define _R_F26 (_FPBASE+26)
139 #define _R_F27 (_FPBASE+27)
140 #define _R_F28 (_FPBASE+28)
141 #define _R_F29 (_FPBASE+29)
142 #define _R_F30 (_FPBASE+30)
143 #define _R_F31 (_FPBASE+31)
144 #define _R_FSR (_FPBASE+32)
145