ingenic_com.c revision 1.7
1 /* $NetBSD: ingenic_com.c,v 1.7 2018/12/08 17:46:12 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.7 2018/12/08 17:46:12 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/kernel.h> 36 #include <sys/termios.h> 37 #include <sys/ttydefaults.h> 38 #include <sys/types.h> 39 40 #include <sys/bus.h> 41 42 #include <dev/cons.h> 43 #include <dev/ic/comreg.h> 44 #include <dev/ic/comvar.h> 45 46 #include <mips/cpuregs.h> 47 48 #include <mips/ingenic/ingenic_var.h> 49 #include <mips/ingenic/ingenic_regs.h> 50 51 #include "opt_com.h" 52 53 #ifndef COM_REGMAP 54 #error We need COM_REGMAP 55 #endif 56 57 volatile int32_t *com0addr = (int32_t *)MIPS_PHYS_TO_KSEG1(JZ_UART0); 58 59 void ingenic_putchar_init(void); 60 void ingenic_puts(const char *); 61 void ingenic_putchar(char); 62 63 #ifndef CONMODE 64 # define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) 65 #endif 66 67 void ingenic_com_cnattach(void); 68 69 static int ingenic_com_match(device_t, cfdata_t , void *); 70 static void ingenic_com_attach(device_t, device_t, void *); 71 72 struct ingenic_com_softc { 73 struct com_softc sc_com; 74 bus_space_tag_t sc_tag; 75 bus_space_handle_t sc_regh; 76 }; 77 78 CFATTACH_DECL_NEW(ingenic_com, sizeof(struct ingenic_com_softc), 79 ingenic_com_match, ingenic_com_attach, NULL, NULL); 80 81 static bus_space_handle_t regh = 0; 82 static bus_addr_t cons_com = 0; 83 static struct com_regs cons_regs; 84 extern bus_space_tag_t apbus_memt; 85 86 static void 87 ingenic_com_init_regs(struct com_regs *regs, bus_space_tag_t st, 88 bus_space_handle_t sh, bus_addr_t addr) 89 { 90 91 com_init_regs(regs, st, sh, addr); 92 for (size_t i = 0; i < __arraycount(regs->cr_map); i++) { 93 regs->cr_map[i] = regs->cr_map[i] << 2; 94 } 95 regs->cr_nports <<= 2; 96 } 97 98 void 99 ingenic_putchar_init(void) 100 { 101 /* 102 * XXX don't screw with the UART's speed until we know what clock 103 * we're on 104 */ 105 #if 0 106 int rate; 107 #endif 108 extern int comspeed(long, long, int); 109 110 com0addr = (uint32_t *)MIPS_PHYS_TO_KSEG1(JZ_UART0); 111 #if 0 112 if (comcnfreq != -1) { 113 rate = comspeed(comcnspeed, comcnfreq, COM_TYPE_INGENIC); 114 if (rate < 0) 115 return; /* XXX */ 116 #endif 117 com0addr[com_ier] = 0; 118 com0addr[com_lctl] = htole32(LCR_DLAB); 119 #if 0 120 com0addr[com_dlbl] = htole32(rate & 0xff); 121 com0addr[com_dlbh] = htole32(rate >> 8); 122 #endif 123 com0addr[com_lctl] = htole32(LCR_8BITS); /* XXX */ 124 com0addr[com_mcr] = htole32(MCR_DTR|MCR_RTS); 125 com0addr[com_fifo] = htole32( 126 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 127 FIFO_TRIGGER_1 | FIFO_UART_ON); 128 #if 0 129 } 130 #endif 131 } 132 133 134 void 135 ingenic_putchar(char c) 136 { 137 int timo = 150000; 138 139 while ((le32toh(com0addr[com_lsr]) & LSR_TXRDY) == 0) 140 if (--timo == 0) 141 break; 142 143 com0addr[com_data] = htole32((uint32_t)c); 144 145 while ((le32toh(com0addr[com_lsr]) & LSR_TSRE) == 0) 146 if (--timo == 0) 147 break; 148 } 149 150 void 151 ingenic_puts(const char *restrict s) 152 { 153 char c; 154 155 while ((c = *s++) != 0) 156 ingenic_putchar(c); 157 } 158 159 void 160 ingenic_com_cnattach(void) 161 { 162 163 bus_space_map(apbus_memt, JZ_UART0, 0x100, 0, ®h); 164 cons_com = JZ_UART0; 165 ingenic_com_init_regs(&cons_regs, apbus_memt, regh, JZ_UART0); 166 167 comcnattach1(&cons_regs, 115200, 48000000, COM_TYPE_INGENIC, CONMODE); 168 } 169 170 static int 171 ingenic_com_match(device_t parent, cfdata_t cfdata, void *args) 172 { 173 struct mainbusdev { 174 const char *md_name; 175 } *aa = args; 176 if (strcmp(aa->md_name, "com") == 0) return 1; 177 return 0; 178 } 179 180 181 static void 182 ingenic_com_attach(device_t parent, device_t self, void *args) 183 { 184 struct ingenic_com_softc *isc = device_private(self); 185 struct com_softc *sc = &isc->sc_com; 186 struct apbus_attach_args *aa = args; 187 188 sc->sc_dev = self; 189 sc->sc_frequency = 48000000; 190 sc->sc_type = COM_TYPE_INGENIC; 191 isc->sc_tag = aa->aa_bst; 192 193 if (cons_com == aa->aa_addr) { 194 isc->sc_regh = regh; 195 } else { 196 bus_space_map(apbus_memt, aa->aa_addr, 0x1000, 0, &isc->sc_regh); 197 } 198 ingenic_com_init_regs(&sc->sc_regs, aa->aa_bst, isc->sc_regh, 199 aa->aa_addr); 200 201 com_attach_subr(sc); 202 evbmips_intr_establish(aa->aa_irq, comintr, sc); 203 } 204
Indexes created Sun Oct 26 13:09:57 GMT 2025