ingenic_dwctwo.c revision 1.9.2.2 1 1.9.2.2 skrll /* $NetBSD: ingenic_dwctwo.c,v 1.9.2.2 2015/04/06 15:17:59 skrll Exp $ */
2 1.9.2.2 skrll
3 1.9.2.2 skrll /*-
4 1.9.2.2 skrll * Copyright (c) 2014 Michael Lorenz
5 1.9.2.2 skrll * All rights reserved.
6 1.9.2.2 skrll *
7 1.9.2.2 skrll * Redistribution and use in source and binary forms, with or without
8 1.9.2.2 skrll * modification, are permitted provided that the following conditions
9 1.9.2.2 skrll * are met:
10 1.9.2.2 skrll * 1. Redistributions of source code must retain the above copyright
11 1.9.2.2 skrll * notice, this list of conditions and the following disclaimer.
12 1.9.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.9.2.2 skrll * notice, this list of conditions and the following disclaimer in the
14 1.9.2.2 skrll * documentation and/or other materials provided with the distribution.
15 1.9.2.2 skrll *
16 1.9.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.9.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.9.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.9.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.9.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.9.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.9.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.9.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.9.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.9.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.9.2.2 skrll * POSSIBILITY OF SUCH DAMAGE.
27 1.9.2.2 skrll */
28 1.9.2.2 skrll
29 1.9.2.2 skrll #include <sys/cdefs.h>
30 1.9.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.9.2.2 2015/04/06 15:17:59 skrll Exp $");
31 1.9.2.2 skrll
32 1.9.2.2 skrll /*
33 1.9.2.2 skrll * adapted from bcm2835_dwctwo.c
34 1.9.2.2 skrll */
35 1.9.2.2 skrll
36 1.9.2.2 skrll #include <sys/param.h>
37 1.9.2.2 skrll #include <sys/systm.h>
38 1.9.2.2 skrll #include <sys/device.h>
39 1.9.2.2 skrll #include <sys/mutex.h>
40 1.9.2.2 skrll #include <sys/bus.h>
41 1.9.2.2 skrll #include <sys/workqueue.h>
42 1.9.2.2 skrll
43 1.9.2.2 skrll #include <mips/ingenic/ingenic_var.h>
44 1.9.2.2 skrll #include <mips/ingenic/ingenic_regs.h>
45 1.9.2.2 skrll
46 1.9.2.2 skrll #include <dev/usb/usb.h>
47 1.9.2.2 skrll #include <dev/usb/usbdi.h>
48 1.9.2.2 skrll #include <dev/usb/usbdivar.h>
49 1.9.2.2 skrll #include <dev/usb/usb_mem.h>
50 1.9.2.2 skrll #include <dev/usb/usbdevs.h>
51 1.9.2.2 skrll
52 1.9.2.2 skrll #include <dwc2/dwc2var.h>
53 1.9.2.2 skrll #include <dwc2/dwc2.h>
54 1.9.2.2 skrll #include "dwc2_core.h"
55 1.9.2.2 skrll
56 1.9.2.2 skrll #include "opt_ingenic.h"
57 1.9.2.2 skrll
58 1.9.2.2 skrll struct ingenic_dwc2_softc {
59 1.9.2.2 skrll struct dwc2_softc sc_dwc2;
60 1.9.2.2 skrll
61 1.9.2.2 skrll void *sc_ih;
62 1.9.2.2 skrll };
63 1.9.2.2 skrll
64 1.9.2.2 skrll static struct dwc2_core_params ingenic_dwc2_params = {
65 1.9.2.2 skrll .otg_cap = -1, /* HNP/SRP capable */
66 1.9.2.2 skrll .otg_ver = -1, /* 1.3 */
67 1.9.2.2 skrll .dma_enable = 1,
68 1.9.2.2 skrll .dma_desc_enable = 0,
69 1.9.2.2 skrll .speed = -1, /* High Speed */
70 1.9.2.2 skrll .enable_dynamic_fifo = -1,
71 1.9.2.2 skrll .en_multiple_tx_fifo = -1,
72 1.9.2.2 skrll .host_rx_fifo_size = 1024, /* 1024 DWORDs */
73 1.9.2.2 skrll .host_nperio_tx_fifo_size = 1024, /* 1024 DWORDs */
74 1.9.2.2 skrll .host_perio_tx_fifo_size = 1024, /* 1024 DWORDs */
75 1.9.2.2 skrll .max_transfer_size = -1,
76 1.9.2.2 skrll .max_packet_count = -1,
77 1.9.2.2 skrll .host_channels = -1,
78 1.9.2.2 skrll .phy_type = -1, /* UTMI */
79 1.9.2.2 skrll .phy_utmi_width = -1, /* 16 bits */
80 1.9.2.2 skrll .phy_ulpi_ddr = -1, /* Single */
81 1.9.2.2 skrll .phy_ulpi_ext_vbus = -1,
82 1.9.2.2 skrll .i2c_enable = -1,
83 1.9.2.2 skrll .ulpi_fs_ls = -1,
84 1.9.2.2 skrll .host_support_fs_ls_low_power = -1,
85 1.9.2.2 skrll .host_ls_low_power_phy_clk = -1, /* 48 MHz */
86 1.9.2.2 skrll .ts_dline = -1,
87 1.9.2.2 skrll .reload_ctl = -1,
88 1.9.2.2 skrll .ahbcfg = -1,
89 1.9.2.2 skrll .uframe_sched = 0,
90 1.9.2.2 skrll };
91 1.9.2.2 skrll
92 1.9.2.2 skrll static int ingenic_dwc2_match(device_t, struct cfdata *, void *);
93 1.9.2.2 skrll static void ingenic_dwc2_attach(device_t, device_t, void *);
94 1.9.2.2 skrll static void ingenic_dwc2_deferred(device_t);
95 1.9.2.2 skrll
96 1.9.2.2 skrll CFATTACH_DECL_NEW(ingenic_dwctwo, sizeof(struct ingenic_dwc2_softc),
97 1.9.2.2 skrll ingenic_dwc2_match, ingenic_dwc2_attach, NULL, NULL);
98 1.9.2.2 skrll
99 1.9.2.2 skrll /* ARGSUSED */
100 1.9.2.2 skrll static int
101 1.9.2.2 skrll ingenic_dwc2_match(device_t parent, struct cfdata *match, void *aux)
102 1.9.2.2 skrll {
103 1.9.2.2 skrll struct apbus_attach_args *aa = aux;
104 1.9.2.2 skrll
105 1.9.2.2 skrll if (strcmp(aa->aa_name, "dwctwo") != 0)
106 1.9.2.2 skrll return 0;
107 1.9.2.2 skrll
108 1.9.2.2 skrll return 1;
109 1.9.2.2 skrll }
110 1.9.2.2 skrll
111 1.9.2.2 skrll /* ARGSUSED */
112 1.9.2.2 skrll static void
113 1.9.2.2 skrll ingenic_dwc2_attach(device_t parent, device_t self, void *aux)
114 1.9.2.2 skrll {
115 1.9.2.2 skrll struct ingenic_dwc2_softc *sc = device_private(self);
116 1.9.2.2 skrll struct apbus_attach_args *aa = aux;
117 1.9.2.2 skrll uint32_t reg;
118 1.9.2.2 skrll int error;
119 1.9.2.2 skrll
120 1.9.2.2 skrll sc->sc_dwc2.sc_dev = self;
121 1.9.2.2 skrll
122 1.9.2.2 skrll sc->sc_dwc2.sc_iot = aa->aa_bst;
123 1.9.2.2 skrll sc->sc_dwc2.sc_bus.ub_dmatag = aa->aa_dmat;
124 1.9.2.2 skrll sc->sc_dwc2.sc_params = &ingenic_dwc2_params;
125 1.9.2.2 skrll
126 1.9.2.2 skrll if (aa->aa_addr == 0)
127 1.9.2.2 skrll aa->aa_addr = JZ_DWC2_BASE;
128 1.9.2.2 skrll
129 1.9.2.2 skrll error = bus_space_map(aa->aa_bst, aa->aa_addr, 0x20000, 0,
130 1.9.2.2 skrll &sc->sc_dwc2.sc_ioh);
131 1.9.2.2 skrll if (error) {
132 1.9.2.2 skrll aprint_error_dev(self,
133 1.9.2.2 skrll "can't map registers for %s: %d\n", aa->aa_name, error);
134 1.9.2.2 skrll return;
135 1.9.2.2 skrll }
136 1.9.2.2 skrll
137 1.9.2.2 skrll aprint_naive(": USB controller\n");
138 1.9.2.2 skrll aprint_normal(": USB controller\n");
139 1.9.2.2 skrll
140 1.9.2.2 skrll gpio_set(5, 15, 0);
141 1.9.2.2 skrll delay(250000);
142 1.9.2.2 skrll gpio_set(5, 15, 1);
143 1.9.2.2 skrll
144 1.9.2.2 skrll reg = readreg(JZ_USBPCR);
145 1.9.2.2 skrll reg |= PCR_VBUSVLDEXTSEL;
146 1.9.2.2 skrll reg |= PCR_VBUSVLDEXT;
147 1.9.2.2 skrll reg |= PCR_USB_MODE;
148 1.9.2.2 skrll reg |= PCR_COMMONONN;
149 1.9.2.2 skrll reg &= ~PCR_OTG_DISABLE;
150 1.9.2.2 skrll writereg(JZ_USBPCR, reg);
151 1.9.2.2 skrll #ifdef INGENIC_DEBUG
152 1.9.2.2 skrll printf("JZ_USBPCR %08x\n", reg);
153 1.9.2.2 skrll #endif
154 1.9.2.2 skrll
155 1.9.2.2 skrll reg = readreg(JZ_USBPCR1);
156 1.9.2.2 skrll reg |= PCR_SYNOPSYS;
157 1.9.2.2 skrll reg |= PCR_REFCLK_CORE;
158 1.9.2.2 skrll reg &= ~PCR_CLK_M;
159 1.9.2.2 skrll reg |= PCR_CLK_48;
160 1.9.2.2 skrll reg |= PCR_WORD_I_F0;
161 1.9.2.2 skrll reg |= PCR_WORD_I_F1;
162 1.9.2.2 skrll writereg(JZ_USBPCR1, reg);
163 1.9.2.2 skrll #ifdef INGENIC_DEBUG
164 1.9.2.2 skrll printf("JZ_USBPCR1 %08x\n", reg);
165 1.9.2.2 skrll printf("JZ_USBRDT %08x\n", readreg(JZ_USBRDT));
166 1.9.2.2 skrll #endif
167 1.9.2.2 skrll
168 1.9.2.2 skrll delay(10000);
169 1.9.2.2 skrll
170 1.9.2.2 skrll reg = readreg(JZ_USBPCR);
171 1.9.2.2 skrll reg |= PCR_POR;
172 1.9.2.2 skrll writereg(JZ_USBPCR, reg);
173 1.9.2.2 skrll delay(1000);
174 1.9.2.2 skrll reg &= ~PCR_POR;
175 1.9.2.2 skrll writereg(JZ_USBPCR, reg);
176 1.9.2.2 skrll
177 1.9.2.2 skrll delay(10000);
178 1.9.2.2 skrll
179 1.9.2.2 skrll sc->sc_ih = evbmips_intr_establish(aa->aa_irq, dwc2_intr, &sc->sc_dwc2);
180 1.9.2.2 skrll
181 1.9.2.2 skrll if (sc->sc_ih == NULL) {
182 1.9.2.2 skrll aprint_error_dev(self, "failed to establish interrupt %d\n",
183 1.9.2.2 skrll aa->aa_irq);
184 1.9.2.2 skrll goto fail;
185 1.9.2.2 skrll }
186 1.9.2.2 skrll
187 1.9.2.2 skrll config_defer(self, ingenic_dwc2_deferred);
188 1.9.2.2 skrll
189 1.9.2.2 skrll return;
190 1.9.2.2 skrll
191 1.9.2.2 skrll fail:
192 1.9.2.2 skrll if (sc->sc_ih) {
193 1.9.2.2 skrll evbmips_intr_disestablish(sc->sc_ih);
194 1.9.2.2 skrll sc->sc_ih = NULL;
195 1.9.2.2 skrll }
196 1.9.2.2 skrll bus_space_unmap(sc->sc_dwc2.sc_iot, sc->sc_dwc2.sc_ioh, 0x20000);
197 1.9.2.2 skrll }
198 1.9.2.2 skrll
199 1.9.2.2 skrll static void
200 1.9.2.2 skrll ingenic_dwc2_deferred(device_t self)
201 1.9.2.2 skrll {
202 1.9.2.2 skrll struct ingenic_dwc2_softc *sc = device_private(self);
203 1.9.2.2 skrll int error;
204 1.9.2.2 skrll
205 1.9.2.2 skrll error = dwc2_init(&sc->sc_dwc2);
206 1.9.2.2 skrll if (error != 0) {
207 1.9.2.2 skrll aprint_error_dev(self, "couldn't initialize host, error=%d\n",
208 1.9.2.2 skrll error);
209 1.9.2.2 skrll return;
210 1.9.2.2 skrll }
211 1.9.2.2 skrll sc->sc_dwc2.sc_child = config_found(sc->sc_dwc2.sc_dev,
212 1.9.2.2 skrll &sc->sc_dwc2.sc_bus, usbctlprint);
213 1.9.2.2 skrll }
214