ralink_ohci.c revision 1.5
1 /* $NetBSD: ralink_ohci.c,v 1.5 2018/04/09 16:21:10 jakllsch Exp $ */ 2 /*- 3 * Copyright (c) 2011 CradlePoint Technology, Inc. 4 * All rights reserved. 5 * 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY CRADLEPOINT TECHNOLOGY, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* ralink_ohci.c -- Ralink OHCI USB Driver */ 30 31 #include "ehci.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ralink_ohci.c,v 1.5 2018/04/09 16:21:10 jakllsch Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 39 #include <dev/usb/usb.h> 40 #include <dev/usb/usbdi.h> 41 #include <dev/usb/usbdivar.h> 42 #include <dev/usb/usb_mem.h> 43 44 #include <dev/usb/ohcireg.h> 45 #include <dev/usb/ohcivar.h> 46 47 #include <mips/ralink/ralink_var.h> 48 #include <mips/ralink/ralink_reg.h> 49 #include <mips/ralink/ralink_usbhcvar.h> 50 51 #define OREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a)) 52 #define OWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x)) 53 54 struct ralink_ohci_softc { 55 struct ohci_softc sc_ohci; 56 #if NEHCI > 0 57 struct ralink_usb_hc sc_hc; 58 #endif 59 void *sc_ih; 60 }; 61 62 static int ralink_ohci_match(device_t, cfdata_t, void *); 63 static void ralink_ohci_attach(device_t, device_t, void *); 64 static int ralink_ohci_detach(device_t, int); 65 66 CFATTACH_DECL2_NEW(ralink_ohci, sizeof(struct ralink_ohci_softc), 67 ralink_ohci_match, ralink_ohci_attach, ralink_ohci_detach, 68 ohci_activate, NULL, ohci_childdet); 69 70 /* 71 * ralink_ohci_match 72 */ 73 static int 74 ralink_ohci_match(device_t parent, cfdata_t cf, void *aux) 75 { 76 return 1; 77 } 78 79 /* 80 * ralink_ohci_attach 81 */ 82 static void 83 ralink_ohci_attach(device_t parent, device_t self, void *aux) 84 { 85 struct ralink_ohci_softc * const sc = device_private(self); 86 const struct mainbus_attach_args * const ma = aux; 87 int error; 88 #ifdef RALINK_OHCI_DEBUG 89 const char * const devname = device_xname(self); 90 #endif 91 92 aprint_naive(": OHCI USB controller\n"); 93 aprint_normal(": OHCI USB controller\n"); 94 95 sc->sc_ohci.sc_dev = self; 96 sc->sc_ohci.sc_bus.ub_hcpriv = sc; 97 sc->sc_ohci.iot = ma->ma_memt; 98 sc->sc_ohci.sc_bus.ub_dmatag = ma->ma_dmat; 99 100 /* Map I/O registers */ 101 if ((error = bus_space_map(sc->sc_ohci.iot, RA_USB_OHCI_BASE, 102 RA_USB_BLOCK_SIZE, 0, &sc->sc_ohci.ioh)) != 0) { 103 aprint_error_dev(self, "can't map OHCI registers, " 104 "error=%d\n", error); 105 return; 106 } 107 108 sc->sc_ohci.sc_size = RA_USB_BLOCK_SIZE; 109 110 #ifdef RALINK_OHCI_DEBUG 111 printf("%s sc: %p ma: %p\n", devname, sc, ma); 112 printf("%s memt: %p dmat: %p\n", devname, ma->ma_memt, ma->ma_dmat); 113 114 printf("%s: OHCI HcRevision=0x%x\n", devname, 115 OREAD4(&sc->sc_ohci, OHCI_REVISION)); 116 printf("%s: OHCI HcControl=0x%x\n", devname, 117 OREAD4(&sc->sc_ohci, OHCI_CONTROL)); 118 printf("%s: OHCI HcCommandStatus=0x%x\n", devname, 119 OREAD4(&sc->sc_ohci, OHCI_COMMAND_STATUS)); 120 printf("%s: OHCI HcInterruptStatus=0x%x\n", devname, 121 OREAD4(&sc->sc_ohci, OHCI_INTERRUPT_STATUS)); 122 #endif 123 124 /* Disable OHCI interrupts. */ 125 OWRITE4(&sc->sc_ohci, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 126 127 /* establish the MIPS level interrupt */ 128 sc->sc_ih = ra_intr_establish(RA_IRQ_USB, ohci_intr, sc, 0); 129 if (sc->sc_ih == NULL) { 130 aprint_error_dev(self, "unable to establish irq %d\n", 131 RA_IRQ_USB); 132 goto fail_0; 133 } 134 135 /* Initialize OHCI */ 136 error = ohci_init(&sc->sc_ohci); 137 if (error) { 138 aprint_error_dev(self, "init failed, error=%d\n", error); 139 goto fail_0; 140 } 141 142 #if NEHCI > 0 143 ralink_usb_hc_add(&sc->sc_hc, self); 144 #endif 145 146 if (!pmf_device_register1(self, ohci_suspend, ohci_resume, 147 ohci_shutdown)) 148 aprint_error_dev(self, "couldn't establish power handler\n"); 149 150 /* Attach usb device. */ 151 sc->sc_ohci.sc_child = config_found(self, &sc->sc_ohci.sc_bus, 152 usbctlprint); 153 154 return; 155 156 fail_0: 157 bus_space_unmap(sc->sc_ohci.iot, sc->sc_ohci.ioh, sc->sc_ohci.sc_size); 158 sc->sc_ohci.sc_size = 0; 159 } 160 161 static int 162 ralink_ohci_detach(device_t self, int flags) 163 { 164 struct ralink_ohci_softc *sc = device_private(self); 165 int rv; 166 167 pmf_device_deregister(self); 168 169 rv = ohci_detach(&sc->sc_ohci, flags); 170 if (rv != 0) 171 return rv; 172 173 if (sc->sc_ih != NULL) { 174 ra_intr_disestablish(sc->sc_ih); 175 sc->sc_ih = NULL; 176 } 177 178 if (sc->sc_ohci.sc_size == 0) { 179 bus_space_unmap(sc->sc_ohci.iot, sc->sc_ohci.ioh, 180 sc->sc_ohci.sc_size); 181 sc->sc_ohci.sc_size = 0; 182 } 183 184 #if NEHCI > 0 185 ralink_usb_hc_rem(&sc->sc_hc); 186 #endif 187 188 return 0; 189 } 190
Indexes created Mon Oct 13 08:09:50 GMT 2025