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ralink_wdog.c revision 1.1.2.1
      1  1.1.2.1  matt /*	$NetBSD: ralink_wdog.c,v 1.1.2.1 2011/07/01 05:45:45 matt Exp $	*/
      2  1.1.2.1  matt /*-
      3  1.1.2.1  matt  * Copyright (c) 2011 CradlePoint Technology, Inc.
      4  1.1.2.1  matt  * All rights reserved.
      5  1.1.2.1  matt  *
      6  1.1.2.1  matt  *
      7  1.1.2.1  matt  * Redistribution and use in source and binary forms, with or without
      8  1.1.2.1  matt  * modification, are permitted provided that the following conditions
      9  1.1.2.1  matt  * are met:
     10  1.1.2.1  matt  * 1. Redistributions of source code must retain the above copyright
     11  1.1.2.1  matt  *    notice, this list of conditions and the following disclaimer.
     12  1.1.2.1  matt  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1.2.1  matt  *    notice, this list of conditions and the following disclaimer in the
     14  1.1.2.1  matt  *    documentation and/or other materials provided with the distribution.
     15  1.1.2.1  matt  *
     16  1.1.2.1  matt  * THIS SOFTWARE IS PROVIDED BY CRADLEPOINT TECHNOLOGY, INC. AND CONTRIBUTORS
     17  1.1.2.1  matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  1.1.2.1  matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  1.1.2.1  matt  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
     20  1.1.2.1  matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  1.1.2.1  matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  1.1.2.1  matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  1.1.2.1  matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  1.1.2.1  matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  1.1.2.1  matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  1.1.2.1  matt  * POSSIBILITY OF SUCH DAMAGE.
     27  1.1.2.1  matt  */
     28  1.1.2.1  matt 
     29  1.1.2.1  matt /*
     30  1.1.2.1  matt  * ra_wdog.c -- Ralink 305x Watchdog Timer driver
     31  1.1.2.1  matt  *
     32  1.1.2.1  matt  * Timer 1 is used as a system reset watchdog timer
     33  1.1.2.1  matt  * Timer 0 is (optionally) used as a periodic watchdog service interrupt
     34  1.1.2.1  matt  *
     35  1.1.2.1  matt  * NetBSD sysmon watchdog is used in mode defined by RA_WDOG_DEFAULT_MODE
     36  1.1.2.1  matt  * (which can be set via kernel config), or by mode passed to
     37  1.1.2.1  matt  * our 'smw_setmode' function.  The mode used determines what
     38  1.1.2.1  matt  * mechanism is used to periodically service the watchdog.
     39  1.1.2.1  matt  *
     40  1.1.2.1  matt  * KTICKLE mode is default and supports 2 variants, allowing some control
     41  1.1.2.1  matt  * over the priority of the service routine:
     42  1.1.2.1  matt  *
     43  1.1.2.1  matt  * 1. the specified reset period is a positive integer:
     44  1.1.2.1  matt  *    A callout runs the 'smw_tickle' function at IPL_SOFTCLOCK for service.
     45  1.1.2.1  matt  *    If your system cannot make "forward progress" without softints running,
     46  1.1.2.1  matt  *    you should use this variant.
     47  1.1.2.1  matt  *
     48  1.1.2.1  matt  * 2. the specified reset period is a negative integer:
     49  1.1.2.1  matt  *    Timer 0 interrupt runs ra_wdog_timer0() at IPL_VM for service.
     50  1.1.2.1  matt  *    If your system can make "forward progress" while spelding long times
     51  1.1.2.1  matt  *    at IPL_VM, you should use this variant.
     52  1.1.2.1  matt  *    The numbner is rectified
     53  1.1.2.1  matt  *
     54  1.1.2.1  matt  * The reset period is defined by RA_WDOG_DEFAULT_PERIOD
     55  1.1.2.1  matt  * (which can be set via kernel config), or by period passed to
     56  1.1.2.1  matt  * our 'smw_setmode' function.  The interrupt service interval
     57  1.1.2.1  matt  * is half the reset interval.
     58  1.1.2.1  matt  *
     59  1.1.2.1  matt  */
     60  1.1.2.1  matt 
     61  1.1.2.1  matt #include "rwdog.h"
     62  1.1.2.1  matt 
     63  1.1.2.1  matt #include <sys/cdefs.h>
     64  1.1.2.1  matt __KERNEL_RCSID(0, "$NetBSD: ralink_wdog.c,v 1.1.2.1 2011/07/01 05:45:45 matt Exp $");
     65  1.1.2.1  matt 
     66  1.1.2.1  matt #include <sys/param.h>
     67  1.1.2.1  matt #include <sys/systm.h>
     68  1.1.2.1  matt #include <sys/device.h>
     69  1.1.2.1  matt #include <sys/wdog.h>
     70  1.1.2.1  matt 
     71  1.1.2.1  matt #include <machine/bus.h>
     72  1.1.2.1  matt 
     73  1.1.2.1  matt #include <mips/ralink/ralink_var.h>
     74  1.1.2.1  matt #include <mips/ralink/ralink_reg.h>
     75  1.1.2.1  matt 
     76  1.1.2.1  matt #include <dev/sysmon/sysmonvar.h>
     77  1.1.2.1  matt 
     78  1.1.2.1  matt #if 0
     79  1.1.2.1  matt # define DISABLE_WATCHDOG
     80  1.1.2.1  matt #endif
     81  1.1.2.1  matt 
     82  1.1.2.1  matt #ifndef RA_WDOG_DEFAULT_MODE
     83  1.1.2.1  matt # define RA_WDOG_DEFAULT_MODE	WDOG_MODE_KTICKLE
     84  1.1.2.1  matt #endif
     85  1.1.2.1  matt 
     86  1.1.2.1  matt /*
     87  1.1.2.1  matt  * PERIODs are in in seconds;
     88  1.1.2.1  matt  * the counter is 16-bits;
     89  1.1.2.1  matt  * maximum period depends on bus freq
     90  1.1.2.1  matt  */
     91  1.1.2.1  matt #ifndef RA_WDOG_DEFAULT_PERIOD
     92  1.1.2.1  matt # define RA_WDOG_DEFAULT_PERIOD	10
     93  1.1.2.1  matt #endif
     94  1.1.2.1  matt #define WDOG_COUNT_MASK		0xffff
     95  1.1.2.1  matt #define WDOG_MAX_COUNT		WDOG_COUNT_MASK
     96  1.1.2.1  matt #define WDOG_MAX_PERIOD	\
     97  1.1.2.1  matt 		(WDOG_MAX_COUNT / (RA_BUS_FREQ / WDOG_MAX_COUNT))
     98  1.1.2.1  matt 
     99  1.1.2.1  matt static int  ra_wdog_match(device_t, cfdata_t, void *);
    100  1.1.2.1  matt static void ra_wdog_attach(device_t, device_t, void *);
    101  1.1.2.1  matt static int  ra_wdog_tickle(struct sysmon_wdog *);
    102  1.1.2.1  matt static int  ra_wdog_timer0(void *);
    103  1.1.2.1  matt static int  ra_wdog_setmode(struct sysmon_wdog *);
    104  1.1.2.1  matt 
    105  1.1.2.1  matt extern int sysmon_wdog_setmode(struct sysmon_wdog *, int, u_int);
    106  1.1.2.1  matt 
    107  1.1.2.1  matt typedef struct ra_wdog_softc {
    108  1.1.2.1  matt 	device_t		sc_dev;
    109  1.1.2.1  matt 	struct sysmon_wdog 	sc_smw;
    110  1.1.2.1  matt 	bus_space_tag_t		sc_memt;
    111  1.1.2.1  matt 	bus_space_handle_t	sc_memh;
    112  1.1.2.1  matt 	void			*sc_ih;
    113  1.1.2.1  matt } ra_wdog_softc_t;
    114  1.1.2.1  matt 
    115  1.1.2.1  matt 
    116  1.1.2.1  matt CFATTACH_DECL_NEW(rwdog, sizeof(struct ra_wdog_softc),
    117  1.1.2.1  matt 	ra_wdog_match, ra_wdog_attach, NULL, NULL);
    118  1.1.2.1  matt 
    119  1.1.2.1  matt static const char *wdog_modestr[WDOG_MODE_MASK+1] = {
    120  1.1.2.1  matt 	[ WDOG_MODE_DISARMED ] = "DISARMED",
    121  1.1.2.1  matt 	[ WDOG_MODE_KTICKLE  ] = "KTICKLE",
    122  1.1.2.1  matt 	[ WDOG_MODE_UTICKLE  ] = "UTICKLE",
    123  1.1.2.1  matt 	[ WDOG_MODE_ETICKLE  ] = "ETICKLE"
    124  1.1.2.1  matt };
    125  1.1.2.1  matt 
    126  1.1.2.1  matt static inline void
    127  1.1.2.1  matt ra_wdog_reset(const ra_wdog_softc_t *sc)
    128  1.1.2.1  matt {
    129  1.1.2.1  matt 	uint32_t r;
    130  1.1.2.1  matt 
    131  1.1.2.1  matt 	r = bus_space_read_4(sc->sc_memt, sc->sc_memh, RA_TIMER_STAT);
    132  1.1.2.1  matt 	r |= TIMER_1_RESET;
    133  1.1.2.1  matt 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_STAT, r);
    134  1.1.2.1  matt }
    135  1.1.2.1  matt 
    136  1.1.2.1  matt static inline u_int32_t
    137  1.1.2.1  matt ra_wdog_sec_to_count(u_int nsec)
    138  1.1.2.1  matt {
    139  1.1.2.1  matt 	KASSERT(nsec <= WDOG_MAX_PERIOD);
    140  1.1.2.1  matt 	const u_int32_t count = (RA_BUS_FREQ / WDOG_MAX_COUNT) * nsec;
    141  1.1.2.1  matt 	KASSERT(count <= WDOG_MAX_COUNT);
    142  1.1.2.1  matt 	return count;
    143  1.1.2.1  matt }
    144  1.1.2.1  matt 
    145  1.1.2.1  matt static int
    146  1.1.2.1  matt ra_wdog_match(device_t parent, cfdata_t cf, void *aux)
    147  1.1.2.1  matt {
    148  1.1.2.1  matt 	return 1;
    149  1.1.2.1  matt }
    150  1.1.2.1  matt 
    151  1.1.2.1  matt static void
    152  1.1.2.1  matt ra_wdog_attach(device_t parent, device_t self, void *aux)
    153  1.1.2.1  matt {
    154  1.1.2.1  matt 	ra_wdog_softc_t * const sc = device_private(self);
    155  1.1.2.1  matt 	const struct mainbus_attach_args *ma = aux;
    156  1.1.2.1  matt 	bus_space_handle_t memh;
    157  1.1.2.1  matt 	int error;
    158  1.1.2.1  matt 
    159  1.1.2.1  matt 	aprint_naive(": Ralink watchdog controller\n");
    160  1.1.2.1  matt 	aprint_normal(": Ralink watchdog controller\n");
    161  1.1.2.1  matt 	aprint_normal_dev(self, "max period %d sec.\n", WDOG_MAX_PERIOD);
    162  1.1.2.1  matt 
    163  1.1.2.1  matt 	error = bus_space_map(ma->ma_memt, RA_TIMER_BASE, 0x100, 0, &memh);
    164  1.1.2.1  matt 	if (error != 0) {
    165  1.1.2.1  matt 		aprint_error_dev(self, "unable to map registers, "
    166  1.1.2.1  matt 			"error=%d\n", error);
    167  1.1.2.1  matt                 return;
    168  1.1.2.1  matt 	}
    169  1.1.2.1  matt 
    170  1.1.2.1  matt 	sc->sc_memt = ma->ma_memt;
    171  1.1.2.1  matt 	sc->sc_memh = memh;
    172  1.1.2.1  matt 
    173  1.1.2.1  matt 	sc->sc_smw.smw_name = device_xname(self);
    174  1.1.2.1  matt 	sc->sc_smw.smw_cookie = sc;
    175  1.1.2.1  matt 	sc->sc_smw.smw_setmode = ra_wdog_setmode;
    176  1.1.2.1  matt 	sc->sc_smw.smw_tickle = ra_wdog_tickle;
    177  1.1.2.1  matt 	sc->sc_smw.smw_period = RA_WDOG_DEFAULT_PERIOD;
    178  1.1.2.1  matt 
    179  1.1.2.1  matt 	error = sysmon_wdog_register(&sc->sc_smw);
    180  1.1.2.1  matt 	if (error != 0)
    181  1.1.2.1  matt 		aprint_error_dev(self, "unable to register with sysmon, "
    182  1.1.2.1  matt 			"error %d\n", error);
    183  1.1.2.1  matt 
    184  1.1.2.1  matt 	sc->sc_ih = ra_intr_establish(RA_IRQ_TIMER0, ra_wdog_timer0, sc, 0);
    185  1.1.2.1  matt 	if (sc->sc_ih == NULL)
    186  1.1.2.1  matt 		aprint_error_dev(self, "unable to establish interrupt\n");
    187  1.1.2.1  matt 			/* expect watchdog reset shortly */
    188  1.1.2.1  matt 
    189  1.1.2.1  matt 	if (RA_WDOG_DEFAULT_MODE == WDOG_MODE_DISARMED) {
    190  1.1.2.1  matt 		/*
    191  1.1.2.1  matt 		 * disarm the watchdog
    192  1.1.2.1  matt 		 */
    193  1.1.2.1  matt 		bus_space_write_4(sc->sc_memt, memh, RA_TIMER_0_CNTRL, 0);
    194  1.1.2.1  matt 		bus_space_write_4(sc->sc_memt, memh, RA_TIMER_1_CNTRL, 0);
    195  1.1.2.1  matt 		aprint_normal_dev(self, "%s mode\n",
    196  1.1.2.1  matt 			wdog_modestr[sc->sc_smw.smw_mode]);
    197  1.1.2.1  matt 	} else {
    198  1.1.2.1  matt 		/*
    199  1.1.2.1  matt 		 * initialize and arm the watchdog now.
    200  1.1.2.1  matt 		 * if boot loader already initialized the watchdog
    201  1.1.2.1  matt 		 * then we are re-initializing; this will buy some time
    202  1.1.2.1  matt 		 * until interrupts are enabled, and will establish our
    203  1.1.2.1  matt 		 * (default) mode and smw_period indedpendent of the
    204  1.1.2.1  matt 		 * boot loader.
    205  1.1.2.1  matt 		 */
    206  1.1.2.1  matt 		error = sysmon_wdog_setmode(&sc->sc_smw, RA_WDOG_DEFAULT_MODE,
    207  1.1.2.1  matt 			RA_WDOG_DEFAULT_PERIOD);
    208  1.1.2.1  matt 		if (error != 0) {
    209  1.1.2.1  matt 			aprint_error_dev(self, "unable to set sysmon wdog, "
    210  1.1.2.1  matt 				"mode %d, error %d\n",
    211  1.1.2.1  matt 				RA_WDOG_DEFAULT_MODE, error);
    212  1.1.2.1  matt 		} else {
    213  1.1.2.1  matt 			aprint_normal_dev(self, "%s mode, period %d sec.\n",
    214  1.1.2.1  matt 				wdog_modestr[sc->sc_smw.smw_mode],
    215  1.1.2.1  matt 				sc->sc_smw.smw_period);
    216  1.1.2.1  matt 		}
    217  1.1.2.1  matt 	}
    218  1.1.2.1  matt }
    219  1.1.2.1  matt 
    220  1.1.2.1  matt /*
    221  1.1.2.1  matt  * ra_wdog_tickle - smw watchdog service function
    222  1.1.2.1  matt  */
    223  1.1.2.1  matt static int
    224  1.1.2.1  matt ra_wdog_tickle(struct sysmon_wdog *smw)
    225  1.1.2.1  matt {
    226  1.1.2.1  matt 	const ra_wdog_softc_t * const sc = smw->smw_cookie;
    227  1.1.2.1  matt 	ra_wdog_reset(sc);
    228  1.1.2.1  matt 	return 0;
    229  1.1.2.1  matt }
    230  1.1.2.1  matt 
    231  1.1.2.1  matt /*
    232  1.1.2.1  matt  * ra_wdog_timer0 - periodic watchdog service ISR
    233  1.1.2.1  matt  */
    234  1.1.2.1  matt static int
    235  1.1.2.1  matt ra_wdog_timer0(void *arg)
    236  1.1.2.1  matt {
    237  1.1.2.1  matt 	const ra_wdog_softc_t * const sc = arg;
    238  1.1.2.1  matt 	ra_wdog_reset(sc);
    239  1.1.2.1  matt 	return 0;
    240  1.1.2.1  matt }
    241  1.1.2.1  matt 
    242  1.1.2.1  matt static int
    243  1.1.2.1  matt ra_wdog_setmode(struct sysmon_wdog *smw)
    244  1.1.2.1  matt {
    245  1.1.2.1  matt 	const ra_wdog_softc_t * const sc = smw->smw_cookie;
    246  1.1.2.1  matt 	u_int period = smw->smw_period;
    247  1.1.2.1  matt 	bool itickle = false;
    248  1.1.2.1  matt 	uint32_t r;
    249  1.1.2.1  matt 
    250  1.1.2.1  matt 	if (((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_KTICKLE) &&
    251  1.1.2.1  matt 	    ((int)period < 0)) {
    252  1.1.2.1  matt 		itickle = true;		/* use Timer 0 */
    253  1.1.2.1  matt 		period = -period;
    254  1.1.2.1  matt 	}
    255  1.1.2.1  matt 
    256  1.1.2.1  matt 	/* all configuration has to be done with the timer disabled */
    257  1.1.2.1  matt 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_CNTRL, 0);
    258  1.1.2.1  matt 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_CNTRL, 0);
    259  1.1.2.1  matt 
    260  1.1.2.1  matt 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED)
    261  1.1.2.1  matt 		return 0;
    262  1.1.2.1  matt 
    263  1.1.2.1  matt 	if (period > WDOG_MAX_PERIOD)
    264  1.1.2.1  matt 		return EOPNOTSUPP;
    265  1.1.2.1  matt 
    266  1.1.2.1  matt 	/* Set the new watchdog reset period in Timer 1 */
    267  1.1.2.1  matt 	r = ra_wdog_sec_to_count(period);
    268  1.1.2.1  matt 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_LOAD, r);
    269  1.1.2.1  matt 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_CNTRL,
    270  1.1.2.1  matt 		TIMER_EN | TIMER_MODE(TIMER_MODE_WDOG) |
    271  1.1.2.1  matt 			TIMER_PRESCALE(TIMER_PRESCALE_DIV_65536));
    272  1.1.2.1  matt 
    273  1.1.2.1  matt 	if (itickle) {
    274  1.1.2.1  matt 		/* Set the new watchdog service period in Timer 0 */
    275  1.1.2.1  matt 		r = ra_wdog_sec_to_count(period) / 2;
    276  1.1.2.1  matt 		bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_LOAD, r);
    277  1.1.2.1  matt 		bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_CNTRL,
    278  1.1.2.1  matt 			TIMER_EN | TIMER_MODE(TIMER_MODE_PERIODIC) |
    279  1.1.2.1  matt 				TIMER_PRESCALE(TIMER_PRESCALE_DIV_65536));
    280  1.1.2.1  matt 	}
    281  1.1.2.1  matt 
    282  1.1.2.1  matt 	return 0;
    283  1.1.2.1  matt }
    284