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ralink_wdog.c revision 1.1.2.1
      1 /*	$NetBSD: ralink_wdog.c,v 1.1.2.1 2011/07/01 05:45:45 matt Exp $	*/
      2 /*-
      3  * Copyright (c) 2011 CradlePoint Technology, Inc.
      4  * All rights reserved.
      5  *
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY CRADLEPOINT TECHNOLOGY, INC. AND CONTRIBUTORS
     17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 /*
     30  * ra_wdog.c -- Ralink 305x Watchdog Timer driver
     31  *
     32  * Timer 1 is used as a system reset watchdog timer
     33  * Timer 0 is (optionally) used as a periodic watchdog service interrupt
     34  *
     35  * NetBSD sysmon watchdog is used in mode defined by RA_WDOG_DEFAULT_MODE
     36  * (which can be set via kernel config), or by mode passed to
     37  * our 'smw_setmode' function.  The mode used determines what
     38  * mechanism is used to periodically service the watchdog.
     39  *
     40  * KTICKLE mode is default and supports 2 variants, allowing some control
     41  * over the priority of the service routine:
     42  *
     43  * 1. the specified reset period is a positive integer:
     44  *    A callout runs the 'smw_tickle' function at IPL_SOFTCLOCK for service.
     45  *    If your system cannot make "forward progress" without softints running,
     46  *    you should use this variant.
     47  *
     48  * 2. the specified reset period is a negative integer:
     49  *    Timer 0 interrupt runs ra_wdog_timer0() at IPL_VM for service.
     50  *    If your system can make "forward progress" while spelding long times
     51  *    at IPL_VM, you should use this variant.
     52  *    The numbner is rectified
     53  *
     54  * The reset period is defined by RA_WDOG_DEFAULT_PERIOD
     55  * (which can be set via kernel config), or by period passed to
     56  * our 'smw_setmode' function.  The interrupt service interval
     57  * is half the reset interval.
     58  *
     59  */
     60 
     61 #include "rwdog.h"
     62 
     63 #include <sys/cdefs.h>
     64 __KERNEL_RCSID(0, "$NetBSD: ralink_wdog.c,v 1.1.2.1 2011/07/01 05:45:45 matt Exp $");
     65 
     66 #include <sys/param.h>
     67 #include <sys/systm.h>
     68 #include <sys/device.h>
     69 #include <sys/wdog.h>
     70 
     71 #include <machine/bus.h>
     72 
     73 #include <mips/ralink/ralink_var.h>
     74 #include <mips/ralink/ralink_reg.h>
     75 
     76 #include <dev/sysmon/sysmonvar.h>
     77 
     78 #if 0
     79 # define DISABLE_WATCHDOG
     80 #endif
     81 
     82 #ifndef RA_WDOG_DEFAULT_MODE
     83 # define RA_WDOG_DEFAULT_MODE	WDOG_MODE_KTICKLE
     84 #endif
     85 
     86 /*
     87  * PERIODs are in in seconds;
     88  * the counter is 16-bits;
     89  * maximum period depends on bus freq
     90  */
     91 #ifndef RA_WDOG_DEFAULT_PERIOD
     92 # define RA_WDOG_DEFAULT_PERIOD	10
     93 #endif
     94 #define WDOG_COUNT_MASK		0xffff
     95 #define WDOG_MAX_COUNT		WDOG_COUNT_MASK
     96 #define WDOG_MAX_PERIOD	\
     97 		(WDOG_MAX_COUNT / (RA_BUS_FREQ / WDOG_MAX_COUNT))
     98 
     99 static int  ra_wdog_match(device_t, cfdata_t, void *);
    100 static void ra_wdog_attach(device_t, device_t, void *);
    101 static int  ra_wdog_tickle(struct sysmon_wdog *);
    102 static int  ra_wdog_timer0(void *);
    103 static int  ra_wdog_setmode(struct sysmon_wdog *);
    104 
    105 extern int sysmon_wdog_setmode(struct sysmon_wdog *, int, u_int);
    106 
    107 typedef struct ra_wdog_softc {
    108 	device_t		sc_dev;
    109 	struct sysmon_wdog 	sc_smw;
    110 	bus_space_tag_t		sc_memt;
    111 	bus_space_handle_t	sc_memh;
    112 	void			*sc_ih;
    113 } ra_wdog_softc_t;
    114 
    115 
    116 CFATTACH_DECL_NEW(rwdog, sizeof(struct ra_wdog_softc),
    117 	ra_wdog_match, ra_wdog_attach, NULL, NULL);
    118 
    119 static const char *wdog_modestr[WDOG_MODE_MASK+1] = {
    120 	[ WDOG_MODE_DISARMED ] = "DISARMED",
    121 	[ WDOG_MODE_KTICKLE  ] = "KTICKLE",
    122 	[ WDOG_MODE_UTICKLE  ] = "UTICKLE",
    123 	[ WDOG_MODE_ETICKLE  ] = "ETICKLE"
    124 };
    125 
    126 static inline void
    127 ra_wdog_reset(const ra_wdog_softc_t *sc)
    128 {
    129 	uint32_t r;
    130 
    131 	r = bus_space_read_4(sc->sc_memt, sc->sc_memh, RA_TIMER_STAT);
    132 	r |= TIMER_1_RESET;
    133 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_STAT, r);
    134 }
    135 
    136 static inline u_int32_t
    137 ra_wdog_sec_to_count(u_int nsec)
    138 {
    139 	KASSERT(nsec <= WDOG_MAX_PERIOD);
    140 	const u_int32_t count = (RA_BUS_FREQ / WDOG_MAX_COUNT) * nsec;
    141 	KASSERT(count <= WDOG_MAX_COUNT);
    142 	return count;
    143 }
    144 
    145 static int
    146 ra_wdog_match(device_t parent, cfdata_t cf, void *aux)
    147 {
    148 	return 1;
    149 }
    150 
    151 static void
    152 ra_wdog_attach(device_t parent, device_t self, void *aux)
    153 {
    154 	ra_wdog_softc_t * const sc = device_private(self);
    155 	const struct mainbus_attach_args *ma = aux;
    156 	bus_space_handle_t memh;
    157 	int error;
    158 
    159 	aprint_naive(": Ralink watchdog controller\n");
    160 	aprint_normal(": Ralink watchdog controller\n");
    161 	aprint_normal_dev(self, "max period %d sec.\n", WDOG_MAX_PERIOD);
    162 
    163 	error = bus_space_map(ma->ma_memt, RA_TIMER_BASE, 0x100, 0, &memh);
    164 	if (error != 0) {
    165 		aprint_error_dev(self, "unable to map registers, "
    166 			"error=%d\n", error);
    167                 return;
    168 	}
    169 
    170 	sc->sc_memt = ma->ma_memt;
    171 	sc->sc_memh = memh;
    172 
    173 	sc->sc_smw.smw_name = device_xname(self);
    174 	sc->sc_smw.smw_cookie = sc;
    175 	sc->sc_smw.smw_setmode = ra_wdog_setmode;
    176 	sc->sc_smw.smw_tickle = ra_wdog_tickle;
    177 	sc->sc_smw.smw_period = RA_WDOG_DEFAULT_PERIOD;
    178 
    179 	error = sysmon_wdog_register(&sc->sc_smw);
    180 	if (error != 0)
    181 		aprint_error_dev(self, "unable to register with sysmon, "
    182 			"error %d\n", error);
    183 
    184 	sc->sc_ih = ra_intr_establish(RA_IRQ_TIMER0, ra_wdog_timer0, sc, 0);
    185 	if (sc->sc_ih == NULL)
    186 		aprint_error_dev(self, "unable to establish interrupt\n");
    187 			/* expect watchdog reset shortly */
    188 
    189 	if (RA_WDOG_DEFAULT_MODE == WDOG_MODE_DISARMED) {
    190 		/*
    191 		 * disarm the watchdog
    192 		 */
    193 		bus_space_write_4(sc->sc_memt, memh, RA_TIMER_0_CNTRL, 0);
    194 		bus_space_write_4(sc->sc_memt, memh, RA_TIMER_1_CNTRL, 0);
    195 		aprint_normal_dev(self, "%s mode\n",
    196 			wdog_modestr[sc->sc_smw.smw_mode]);
    197 	} else {
    198 		/*
    199 		 * initialize and arm the watchdog now.
    200 		 * if boot loader already initialized the watchdog
    201 		 * then we are re-initializing; this will buy some time
    202 		 * until interrupts are enabled, and will establish our
    203 		 * (default) mode and smw_period indedpendent of the
    204 		 * boot loader.
    205 		 */
    206 		error = sysmon_wdog_setmode(&sc->sc_smw, RA_WDOG_DEFAULT_MODE,
    207 			RA_WDOG_DEFAULT_PERIOD);
    208 		if (error != 0) {
    209 			aprint_error_dev(self, "unable to set sysmon wdog, "
    210 				"mode %d, error %d\n",
    211 				RA_WDOG_DEFAULT_MODE, error);
    212 		} else {
    213 			aprint_normal_dev(self, "%s mode, period %d sec.\n",
    214 				wdog_modestr[sc->sc_smw.smw_mode],
    215 				sc->sc_smw.smw_period);
    216 		}
    217 	}
    218 }
    219 
    220 /*
    221  * ra_wdog_tickle - smw watchdog service function
    222  */
    223 static int
    224 ra_wdog_tickle(struct sysmon_wdog *smw)
    225 {
    226 	const ra_wdog_softc_t * const sc = smw->smw_cookie;
    227 	ra_wdog_reset(sc);
    228 	return 0;
    229 }
    230 
    231 /*
    232  * ra_wdog_timer0 - periodic watchdog service ISR
    233  */
    234 static int
    235 ra_wdog_timer0(void *arg)
    236 {
    237 	const ra_wdog_softc_t * const sc = arg;
    238 	ra_wdog_reset(sc);
    239 	return 0;
    240 }
    241 
    242 static int
    243 ra_wdog_setmode(struct sysmon_wdog *smw)
    244 {
    245 	const ra_wdog_softc_t * const sc = smw->smw_cookie;
    246 	u_int period = smw->smw_period;
    247 	bool itickle = false;
    248 	uint32_t r;
    249 
    250 	if (((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_KTICKLE) &&
    251 	    ((int)period < 0)) {
    252 		itickle = true;		/* use Timer 0 */
    253 		period = -period;
    254 	}
    255 
    256 	/* all configuration has to be done with the timer disabled */
    257 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_CNTRL, 0);
    258 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_CNTRL, 0);
    259 
    260 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED)
    261 		return 0;
    262 
    263 	if (period > WDOG_MAX_PERIOD)
    264 		return EOPNOTSUPP;
    265 
    266 	/* Set the new watchdog reset period in Timer 1 */
    267 	r = ra_wdog_sec_to_count(period);
    268 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_LOAD, r);
    269 	bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_1_CNTRL,
    270 		TIMER_EN | TIMER_MODE(TIMER_MODE_WDOG) |
    271 			TIMER_PRESCALE(TIMER_PRESCALE_DIV_65536));
    272 
    273 	if (itickle) {
    274 		/* Set the new watchdog service period in Timer 0 */
    275 		r = ra_wdog_sec_to_count(period) / 2;
    276 		bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_LOAD, r);
    277 		bus_space_write_4(sc->sc_memt, sc->sc_memh, RA_TIMER_0_CNTRL,
    278 			TIMER_EN | TIMER_MODE(TIMER_MODE_PERIODIC) |
    279 				TIMER_PRESCALE(TIMER_PRESCALE_DIV_65536));
    280 	}
    281 
    282 	return 0;
    283 }
    284