rmixl_cpunode.c revision 1.1.2.5
1 /* $NetBSD: rmixl_cpunode.c,v 1.1.2.5 2011/12/24 01:57:54 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1994,1995 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * mainbus.c 38 * 39 * cpunode configuration 40 * 41 * Created : 15/12/94 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: rmixl_cpunode.c,v 1.1.2.5 2011/12/24 01:57:54 matt Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/conf.h> 51 #include <sys/malloc.h> 52 #include <sys/device.h> 53 #include <sys/bus.h> 54 55 #include <dev/pci/pcidevs.h> 56 #include <dev/pci/pcireg.h> 57 58 #include <evbmips/rmixl/autoconf.h> 59 60 #include <mips/rmi/rmixlvar.h> 61 #include <mips/rmi/rmixl_cpunodevar.h> 62 63 #include <machine/bus.h> 64 #include "locators.h" 65 66 const char *rmixl_cpuname; 67 static char xlpxxx_cpuname[8]; 68 69 static int cpunode_rmixl_match(device_t, cfdata_t, void *); 70 static void cpunode_rmixl_attach(device_t, device_t, void *); 71 static int cpunode_rmixl_print(void *, const char *); 72 73 CFATTACH_DECL_NEW(cpunode_rmixl, sizeof(struct cpunode_softc), 74 cpunode_rmixl_match, cpunode_rmixl_attach, NULL, NULL); 75 76 rmixlp_variant_t rmixl_xlp_variant; 77 static u_int rmixl_nodes; 78 79 static int 80 cpunode_rmixl_match(device_t parent, cfdata_t cf, void *aux) 81 { 82 struct mainbus_attach_args * const ma = aux; 83 u_int node = ma->ma_node; 84 85 if (!cpu_rmixl(mips_options.mips_cpu)) 86 return 0; 87 88 if (node == MAINBUSCF_NODE_DEFAULT) { 89 node = ffs(rmixl_nodes) - 1; 90 if (node == 0) 91 return 0; 92 ma->ma_node = node; 93 } 94 95 /* max of 4 nodes */ 96 if (node >= 4) 97 return 0; 98 99 /* Make sure we haven't attached this node before */ 100 if (rmixl_nodes & __BIT(node)) 101 return 0; 102 103 /* Node 0 always is good */ 104 if (node == 0) 105 return 1; 106 107 /* XLR/XLS can only have one node */ 108 if (cpu_rmixlr(mips_options.mips_cpu) 109 || cpu_rmixls(mips_options.mips_cpu)) 110 return 0; 111 112 /* 113 * To see if a node is present, check to see if it PCI devices exist. 114 */ 115 const pcireg_t id = 116 rmixlp_read_4(_RMIXL_PCITAG(0, node * 8, 0), PCI_ID_REG); 117 if (id != PCI_ID_CODE(PCI_VENDOR_NETLOGIC,PCI_PRODUCT_NETLOGIC_XLP_SBC)) 118 return 0; 119 120 return 1; 121 } 122 123 static void 124 cpunode_rmixl_attach(device_t parent, device_t self, void *aux) 125 { 126 struct cpunode_softc * const sc = device_private(self); 127 struct mainbus_attach_args * const ma = aux; 128 struct cpunode_attach_args na; 129 const u_int cpu_cidflags = mips_options.mips_cpu->cpu_cidflags; 130 u_int sz; 131 132 aprint_naive("\n"); 133 aprint_normal("\n"); 134 135 sc->sc_dev = self; 136 sc->sc_node = ma->ma_node; 137 rmixl_nodes |= __BIT(ma->ma_node); 138 139 u_int ncores = MIPS_CIDFL_RMI_NCORES(cpu_cidflags); 140 const u_int rmi_type = cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 141 142 switch (rmi_type) { 143 case CIDFL_RMI_TYPE_XLR: 144 case CIDFL_RMI_TYPE_XLS: 145 /* 146 * L2 is unified on XLR, XLS 147 */ 148 sz = (size_t)MIPS_CIDFL_RMI_L2SZ(cpu_cidflags); 149 aprint_normal_dev(self, 150 "%uKB/32B %u-banked 8-way set associative" 151 " L2 unified cache\n", 152 sz/1024, sz/(256 * 1024)); 153 break; 154 case CIDFL_RMI_TYPE_XLP: { 155 uint32_t cfg_status0 = rmixlp_read_4(RMIXLP_SM_PCITAG, 156 RMIXLP_SM_EFUSE_DEVICE_CFG_STATUS0); 157 const char *sfx = ""; 158 char msd; 159 if (mips_options.mips_cpu->cpu_pid == MIPS_XLP8XX) { 160 /* 161 * From XLP 8xx-4XX PRM 1.41 (2011-12-16) 162 * 31.4 System Configuration 163 */ 164 uint32_t cfg_status1 = rmixlp_read_4(RMIXLP_SM_PCITAG, 165 RMIXLP_SM_EFUSE_DEVICE_CFG_STATUS1); 166 uint8_t id0 = cfg_status0; /* bits 7:0 */ 167 for (ncores = 8; id0 != 0; id0 >>= 1) { 168 ncores -= id0 & 1; 169 } 170 if ((cfg_status1 & 7) == 0) { 171 msd = '8'; 172 rmixl_xlp_variant = RMIXLP_8XX; 173 } else { 174 msd = '4'; 175 rmixl_xlp_variant = RMIXLP_4XX; 176 } 177 } else if (mips_options.mips_cpu->cpu_pid == MIPS_XLP3XX) { 178 /* 179 * From XLP3xx_3xx-Lite PRM 1.41 (2011-12-16) 180 * 30.4 System Configuration 181 */ 182 uint8_t idl = (cfg_status0 >> 8) & 0xf; 183 uint8_t idh = (cfg_status0 >> 16) & 0xff; 184 size_t variant = (cfg_status0 >> 4) & 0x3; 185 static const char sfxs[4][2] = { "", "L", "H", "Q" }; 186 sfx = sfxs[variant]; 187 if (idh == 0xff) { 188 ncores = 1; 189 } else if (idl != 0) { 190 ncores = 2; 191 } else { 192 ncores = 4; 193 } 194 msd = '3'; 195 rmixl_xlp_variant = RMIXLP_3XX + variant; 196 } else { 197 panic("%s: unknown RMI XLP variant %#x!", 198 __func__, mips_options.mips_cpu->cpu_pid); 199 } 200 201 snprintf(xlpxxx_cpuname, sizeof(xlpxxx_cpuname), 202 "XLP%c%02u%s", msd, ncores * 4, sfx); 203 rmixl_cpuname = xlpxxx_cpuname; 204 205 /* 206 * L3 is unified on XLP. Why they don't use COP0 Config2 for 207 * this bothers me (except 16-way doesn't have an encoding). 208 */ 209 sz = (size_t)MIPS_CIDFL_RMI_L3SZ(cpu_cidflags); 210 aprint_normal_dev(self, 211 "%u bank%s of %uKB/64B 16-way set associative L3 unified cache\n", 212 ncores, ncores == 1 ? "" : "s", sz/1024); 213 break; 214 } 215 } 216 217 aprint_normal_dev(self, "%u %s on node\n", ncores, 218 ncores == 1 ? "core" : "cores"); 219 220 /* 221 * Attach cpu (RMI thread) devices 222 */ 223 for (u_int i = 0; i < ncores; i++) { 224 na.na_name = "cpucore"; 225 na.na_node = ma->ma_node; 226 na.na_core = i; 227 na.na_dmat29 = ma->ma_dmat29; 228 na.na_dmat32 = ma->ma_dmat32; 229 na.na_dmat64 = ma->ma_dmat64; 230 config_found(self, &na, cpunode_rmixl_print); 231 } 232 233 /* 234 * Attach obio (XLR/XLS) 235 */ 236 switch (rmi_type) { 237 case CIDFL_RMI_TYPE_XLR: 238 case CIDFL_RMI_TYPE_XLS: 239 na.na_name = "obio"; 240 config_found(self, &na, NULL); 241 break; 242 case CIDFL_RMI_TYPE_XLP: 243 break; 244 } 245 } 246 247 static int 248 cpunode_rmixl_print(void *aux, const char *pnp) 249 { 250 struct cpunode_attach_args *na = aux; 251 252 if (pnp != NULL) 253 aprint_normal("%s:", pnp); 254 aprint_normal(" core %d", na->na_core); 255 256 return (UNCONF); 257 } 258
Indexes created Thu Oct 23 22:10:10 GMT 2025