1 1.2 matt /* $NetBSD: rmixl_cpuvar.h,v 1.2 2011/02/20 07:48:37 matt Exp $ */ 2 1.2 matt /*- 3 1.2 matt * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 1.2 matt * All rights reserved. 5 1.2 matt * 6 1.2 matt * This code is derived from software contributed to The NetBSD Foundation 7 1.2 matt * by Cliff Neighbors. 8 1.2 matt * 9 1.2 matt * Redistribution and use in source and binary forms, with or without 10 1.2 matt * modification, are permitted provided that the following conditions 11 1.2 matt * are met: 12 1.2 matt * 1. Redistributions of source code must retain the above copyright 13 1.2 matt * notice, this list of conditions and the following disclaimer. 14 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright 15 1.2 matt * notice, this list of conditions and the following disclaimer in the 16 1.2 matt * documentation and/or other materials provided with the distribution. 17 1.2 matt * 18 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.2 matt * POSSIBILITY OF SUCH DAMAGE. 29 1.2 matt */ 30 1.2 matt 31 1.2 matt #ifndef _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ 32 1.2 matt #define _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ 33 1.2 matt 34 1.2 matt struct rmixl_cpu_trampoline_args { 35 1.2 matt uint64_t ta_sp; 36 1.2 matt uint64_t ta_lwp; 37 1.2 matt uint64_t ta_cpuinfo; 38 1.2 matt }; 39 1.2 matt 40 1.2 matt struct rmixl_cpu_softc { 41 1.2 matt device_t sc_dev; 42 1.2 matt struct cpu_info *sc_ci; 43 1.2 matt struct evcnt sc_vec_evcnts[64]; 44 1.2 matt }; 45 1.2 matt 46 1.2 matt #endif /* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */ 47