1 1.4 msaitoh /* $NetBSD: rmixl_firmware.h,v 1.4 2020/05/14 08:34:20 msaitoh Exp $ */ 2 1.2 matt 3 1.2 matt /*- 4 1.2 matt * Copyright (c) 2009 The NetBSD Foundation, Inc. 5 1.2 matt * All rights reserved. 6 1.2 matt * 7 1.2 matt * This code is derived from software contributed to The NetBSD Foundation 8 1.2 matt * by Cliff Neighbors 9 1.2 matt * 10 1.2 matt * Redistribution and use in source and binary forms, with or without 11 1.2 matt * modification, are permitted provided that the following conditions 12 1.2 matt * are met: 13 1.2 matt * 1. Redistributions of source code must retain the above copyright 14 1.2 matt * notice, this list of conditions and the following disclaimer. 15 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright 16 1.2 matt * notice, this list of conditions and the following disclaimer in the 17 1.2 matt * documentation and/or other materials provided with the distribution. 18 1.2 matt * 19 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2 matt * POSSIBILITY OF SUCH DAMAGE. 30 1.2 matt */ 31 1.2 matt 32 1.2 matt /********************************************************************* 33 1.2 matt 34 1.2 matt Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights 35 1.2 matt reserved. 36 1.2 matt 37 1.2 matt Redistribution and use in source and binary forms, with or without 38 1.2 matt modification, are permitted provided that the following conditions 39 1.2 matt are met: 40 1.2 matt 41 1.2 matt 1. Redistributions of source code must retain the above copyright 42 1.2 matt notice, this list of conditions and the following disclaimer. 43 1.2 matt 2. Redistributions in binary form must reproduce the above copyright 44 1.2 matt notice, this list of conditions and the following disclaimer in 45 1.2 matt the documentation and/or other materials provided with the 46 1.2 matt distribution. 47 1.2 matt 48 1.2 matt THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND 49 1.2 matt ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 1.2 matt IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 51 1.2 matt PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE 52 1.2 matt FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 53 1.2 matt CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 54 1.2 matt SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 55 1.2 matt INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 56 1.2 matt CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 57 1.2 matt ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 58 1.2 matt THE POSSIBILITY OF SUCH DAMAGE. 59 1.2 matt 60 1.2 matt *****************************#RMI_2#**********************************/ 61 1.2 matt 62 1.2 matt #ifndef _ARCH_MIPS_RMI_RMIXL_FIRMWARE_H_ 63 1.2 matt #define _ARCH_MIPS_RMI_RMIXL_FIRMWARE_H_ 64 1.2 matt 65 1.2 matt typedef struct rmixlfw_info { 66 1.2 matt uint64_t boot_level; 67 1.2 matt uint64_t io_base; 68 1.2 matt uint64_t output_device; 69 1.2 matt uint64_t uart_print; 70 1.2 matt uint64_t led_output; 71 1.2 matt uint64_t init; 72 1.2 matt uint64_t exit; 73 1.2 matt uint64_t warm_reset; 74 1.2 matt uint64_t wakeup; 75 1.2 matt uint64_t cpu_online_map; 76 1.2 matt uint64_t master_reentry_sp; 77 1.2 matt uint64_t master_reentry_gp; 78 1.2 matt uint64_t master_reentry_fn; 79 1.2 matt uint64_t slave_reentry_fn; 80 1.2 matt uint64_t magic_dword; 81 1.2 matt uint64_t uart_putchar; 82 1.2 matt uint64_t size; 83 1.2 matt uint64_t uart_getchar; 84 1.2 matt uint64_t nmi_handler; 85 1.2 matt uint64_t psb_version; 86 1.2 matt uint64_t mac_addr; 87 1.2 matt uint64_t cpu_frequency; 88 1.2 matt uint64_t board_version; 89 1.2 matt uint64_t malloc; 90 1.2 matt uint64_t free; 91 1.2 matt uint64_t global_shmem_addr; 92 1.2 matt uint64_t global_shmem_size; 93 1.2 matt uint64_t psb_os_cpu_map; 94 1.2 matt uint64_t userapp_cpu_map; 95 1.2 matt uint64_t wakeup_os; 96 1.2 matt uint64_t psb_mem_map; 97 1.2 matt uint64_t board_major_version; 98 1.2 matt uint64_t board_minor_version; 99 1.2 matt uint64_t board_manf_revision; 100 1.2 matt uint64_t board_serial_number; 101 1.2 matt uint64_t psb_physaddr_map; 102 1.2 matt uint64_t xlr_loaderip_config; 103 1.2 matt uint64_t bldr_envp; 104 1.2 matt uint64_t avail_mem_map; 105 1.2 matt } rmixlfw_info_t; 106 1.2 matt 107 1.2 matt 108 1.2 matt #define RMIXLFW_MMAP_MAX_MMAPS 32 109 1.2 matt 110 1.2 matt #define RMIXLFW_MMAP_TYPE_RAM 1 111 1.2 matt #define RMIXLFW_MMAP_TYPE_ROM 2 112 1.2 matt #define RMIXLFW_MMAP_TYPE_RESERVED 3 113 1.2 matt #define RMIXLFW_MMAP_TYPE_DEV_IO 0x10 114 1.2 matt #define RMIXLFW_MMAP_TYPE_PCI_IO 0x11 115 1.2 matt #define RMIXLFW_MMAP_TYPE_PCI_CFG 0x12 116 1.2 matt #define RMIXLFW_MMAP_TYPE_PCI_MEM 0x13 117 1.2 matt #define RMIXLFW_MMAP_TYPE_UNKNOWN 0xff 118 1.2 matt 119 1.2 matt /* 120 1.2 matt * struct at psb_mem_map, psb_physaddr_map, avail_mem_map 121 1.2 matt */ 122 1.2 matt typedef struct rmixlfw_mmap { 123 1.2 matt uint32_t nmmaps; 124 1.2 matt struct rmixlfw_mmap_entry { 125 1.2 matt uint64_t start; 126 1.2 matt uint64_t size; 127 1.2 matt uint32_t type; 128 1.2 matt } entry[RMIXLFW_MMAP_MAX_MMAPS]; 129 1.2 matt } rmixlfw_mmap_t; 130 1.2 matt 131 1.3 matt #define XLR_ARGV_BUF_SIZE 256 132 1.3 matt #define XLR_ENV_BUF_SIZE 256 133 1.3 matt #define XLR_MAX_ARGV 32 134 1.3 matt #define XLR_MAX_ENV 32 135 1.3 matt #define MAX_ELF_SEGMENTS 16 136 1.3 matt #define MAX_TLB_MAPPINGS 16 137 1.3 matt 138 1.3 matt struct lib_cpu_tlb_mapping { 139 1.3 matt int page_size; 140 1.3 matt int asid; 141 1.3 matt int coherency; 142 1.3 matt int attr; 143 1.3 matt uint32_t virt; 144 1.3 matt uint64_t phys; 145 1.3 matt }; 146 1.3 matt 147 1.3 matt struct core_segment_info 148 1.3 matt { 149 1.3 matt uint64_t vaddr; 150 1.3 matt uint64_t memsz; 151 1.3 matt uint32_t flags; 152 1.3 matt }; 153 1.3 matt 154 1.3 matt typedef struct rmixlfw_cpu_wakeup_info { 155 1.3 matt volatile uint32_t cpu_status; 156 1.3 matt int valid; /* structure is valid */ 157 1.3 matt struct { 158 1.3 matt int32_t addr; 159 1.3 matt int32_t args; 160 1.3 matt uint64_t sp; 161 1.3 matt uint64_t gp; 162 1.3 matt } entry; 163 1.3 matt u_int master_cpu; 164 1.3 matt uint32_t master_cpu_mask; 165 1.3 matt uint32_t buddy_cpu_mask; 166 1.3 matt uint32_t psb_os_cpu_map; 167 1.3 matt int argc; 168 1.3 matt uint32_t argv[XLR_MAX_ARGV]; /* pointers ... */ 169 1.3 matt char argv_buf[XLR_ARGV_BUF_SIZE]; /* ... storage */ 170 1.4 msaitoh int valid_tlb_entries; 171 1.3 matt struct lib_cpu_tlb_mapping tlb_map[MAX_TLB_MAPPINGS]; 172 1.3 matt struct core_segment_info seg_info[MAX_ELF_SEGMENTS]; 173 1.3 matt int envc; 174 1.3 matt uint32_t envs[XLR_MAX_ENV]; 175 1.3 matt char env_buf[XLR_ENV_BUF_SIZE]; 176 1.3 matt uint32_t app_mode; 177 1.3 matt int32_t printk_lock; 178 1.3 matt int kseg_master; 179 1.3 matt int32_t kuseg_reentry_function; 180 1.3 matt uint32_t kuseg_reentry_args; 181 1.3 matt uint64_t app_shared_mem_addr; 182 1.3 matt uint64_t app_shared_mem_size; 183 1.3 matt uint64_t app_shared_mem_orig; 184 1.3 matt int32_t loader_lock; 185 1.3 matt int32_t global_wakeup_mask; 186 1.3 matt union { 187 1.3 matt uint32_t unused_0; 188 1.3 matt struct vcpu_extended_info *vcpu_extended_info; 189 1.3 matt }; 190 1.3 matt } rmixlfw_cpu_wakeup_info_t; 191 1.3 matt 192 1.3 matt /* RMI firmware-defined IPI IRQs */ 193 1.3 matt #define RMIXLFW_IPI_STOP 51 194 1.3 matt #define RMIXLFW_IPI_WAKEUP 52 195 1.3 matt #define RMIXLFW_IPI_RECLAIM 53 196 1.3 matt 197 1.2 matt #endif /* _ARCH_MIPS_RMI_RMIXL_FIRMWARE_H_ */ 198