rmixl_fmnvar.h revision 1.2.2.2
1 1.2.2.2 rmind /* $Id: rmixl_fmnvar.h,v 1.2.2.2 2011/03/05 20:51:10 rmind Exp $ */ 2 1.2.2.2 rmind /*- 3 1.2.2.2 rmind * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 1.2.2.2 rmind * All rights reserved. 5 1.2.2.2 rmind * 6 1.2.2.2 rmind * This code is derived from software contributed to The NetBSD Foundation 7 1.2.2.2 rmind * by Cliff Neighbors. 8 1.2.2.2 rmind * 9 1.2.2.2 rmind * Redistribution and use in source and binary forms, with or without 10 1.2.2.2 rmind * modification, are permitted provided that the following conditions 11 1.2.2.2 rmind * are met: 12 1.2.2.2 rmind * 1. Redistributions of source code must retain the above copyright 13 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer. 14 1.2.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 15 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer in the 16 1.2.2.2 rmind * documentation and/or other materials provided with the distribution. 17 1.2.2.2 rmind * 18 1.2.2.2 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.2.2.2 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.2.2.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.2.2.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.2.2.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.2.2.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.2.2.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.2.2.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.2.2.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.2.2.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.2.2.2 rmind * POSSIBILITY OF SUCH DAMAGE. 29 1.2.2.2 rmind */ 30 1.2.2.2 rmind 31 1.2.2.2 rmind #ifndef _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ 32 1.2.2.2 rmind #define _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ 33 1.2.2.2 rmind 34 1.2.2.2 rmind #include <mips/cpuregs.h> 35 1.2.2.2 rmind 36 1.2.2.2 rmind #define RMIXL_FMN_CODE_PSB_WAKEUP 200 /* firmware MSGRNG_CODE_BOOT_WAKEUP */ 37 1.2.2.2 rmind #define RMIXL_FMN_CODE_HELLO_REQ 201 38 1.2.2.2 rmind #define RMIXL_FMN_CODE_HELLO_ACK 202 39 1.2.2.2 rmind 40 1.2.2.2 rmind #define RMIXL_FMN_HELLO_REQ_SZ 4 41 1.2.2.2 rmind #define RMIXL_FMN_HELLO_ACK_SZ 4 42 1.2.2.2 rmind 43 1.2.2.2 rmind typedef struct rmixl_fmn_msg { 44 1.2.2.2 rmind uint64_t data[4]; 45 1.2.2.2 rmind } rmixl_fmn_msg_t; 46 1.2.2.2 rmind 47 1.2.2.2 rmind typedef struct rmixl_fmn_rxmsg { 48 1.2.2.2 rmind u_int rxsid; 49 1.2.2.2 rmind u_int code; 50 1.2.2.2 rmind u_int size; 51 1.2.2.2 rmind rmixl_fmn_msg_t msg; 52 1.2.2.2 rmind } rmixl_fmn_rxmsg_t; 53 1.2.2.2 rmind 54 1.2.2.2 rmind 55 1.2.2.2 rmind /* 56 1.2.2.2 rmind * compute FMN dest_id from MIPS cpuid 57 1.2.2.2 rmind * - each Core FMN sation has 8 buckets 58 1.2.2.2 rmind * - each Core has 4 threads 59 1.2.2.2 rmind * - here we use 1 bucket per thread 60 1.2.2.2 rmind * (the first four buckets) 61 1.2.2.2 rmind * - if we need { hi, lo } priority buckets per thread 62 1.2.2.2 rmind * need to adjust the RMIXL_FMN_DESTID macro 63 1.2.2.2 rmind * and use the 'pri' parameter 64 1.2.2.2 rmind * - i.e. for now there is only one priority 65 1.2.2.2 rmind */ 66 1.2.2.2 rmind #define RMIXL_CPU_CORE(cpuid) ((uint32_t)((cpuid) & __BITS(9,0)) >> 2) 67 1.2.2.2 rmind #define RMIXL_CPU_THREAD(cpuid) ((uint32_t)((cpuid) & __BITS(1,0))) 68 1.2.2.2 rmind #define RMIXL_FMN_CORE_DESTID(core, bucket) \ 69 1.2.2.2 rmind (((core) << 3) | (bucket)) 70 1.2.2.2 rmind 71 1.2.2.2 rmind 72 1.2.2.2 rmind #define RMIXL_DMFC2(regnum, sel, rv) \ 73 1.2.2.2 rmind do { \ 74 1.2.2.2 rmind uint64_t __val; \ 75 1.2.2.2 rmind \ 76 1.2.2.2 rmind __asm volatile( \ 77 1.2.2.2 rmind ".set push" "\n\t" \ 78 1.2.2.2 rmind ".set mips64" "\n\t" \ 79 1.2.2.2 rmind ".set noat" "\n\t" \ 80 1.2.2.2 rmind "dmfc2 %0,$%1,%2" "\n\t" \ 81 1.2.2.2 rmind ".set pop" "\n\t" \ 82 1.2.2.2 rmind : "=r"(__val) : "n"(regnum), "n"(sel)); \ 83 1.2.2.2 rmind rv = __val; \ 84 1.2.2.2 rmind } while (0) 85 1.2.2.2 rmind 86 1.2.2.2 rmind #define RMIXL_DMTC2(regnum, sel, val) \ 87 1.2.2.2 rmind do { \ 88 1.2.2.2 rmind uint64_t __val = val; \ 89 1.2.2.2 rmind \ 90 1.2.2.2 rmind __asm volatile( \ 91 1.2.2.2 rmind ".set push" "\n\t" \ 92 1.2.2.2 rmind ".set mips64" "\n\t" \ 93 1.2.2.2 rmind ".set noat" "\n\t" \ 94 1.2.2.2 rmind "dmtc2 %0,$%1,%2" "\n\t" \ 95 1.2.2.2 rmind ".set pop" "\n\t" \ 96 1.2.2.2 rmind :: "r"(__val), "n"(regnum), "n"(sel)); \ 97 1.2.2.2 rmind } while (0) 98 1.2.2.2 rmind 99 1.2.2.2 rmind #define RMIXL_MFC2(regnum, sel, rv) \ 100 1.2.2.2 rmind do { \ 101 1.2.2.2 rmind uint32_t __val; \ 102 1.2.2.2 rmind \ 103 1.2.2.2 rmind __asm volatile( \ 104 1.2.2.2 rmind ".set push" "\n\t" \ 105 1.2.2.2 rmind ".set mips64" "\n\t" \ 106 1.2.2.2 rmind "mfc2 %0,$%1,%2" "\n\t" \ 107 1.2.2.2 rmind ".set pop" "\n\t" \ 108 1.2.2.2 rmind : "=r"(__val) : "n"(regnum), "n"(sel)); \ 109 1.2.2.2 rmind rv = __val; \ 110 1.2.2.2 rmind } while (0) 111 1.2.2.2 rmind 112 1.2.2.2 rmind #define RMIXL_MTC2(regnum, sel, val) \ 113 1.2.2.2 rmind do { \ 114 1.2.2.2 rmind uint32_t __val = val; \ 115 1.2.2.2 rmind \ 116 1.2.2.2 rmind __asm volatile( \ 117 1.2.2.2 rmind ".set push" "\n\t" \ 118 1.2.2.2 rmind ".set mips64" "\n\t" \ 119 1.2.2.2 rmind "mtc2 %0,$%1,%2" "\n\t" \ 120 1.2.2.2 rmind ".set pop" "\n\t" \ 121 1.2.2.2 rmind :: "r"(__val), "n"(regnum), "n"(sel)); \ 122 1.2.2.2 rmind } while (0) 123 1.2.2.2 rmind 124 1.2.2.2 rmind #define CPU2_PRINT_8(regno, sel) \ 125 1.2.2.2 rmind do { \ 126 1.2.2.2 rmind uint64_t r; \ 127 1.2.2.2 rmind RMIXL_DMFC2(regno, sel, r); \ 128 1.2.2.2 rmind printf("%s: CP2(%d,%d) = %#"PRIx64"\n", \ 129 1.2.2.2 rmind __func__, regno, sel, r); \ 130 1.2.2.2 rmind } while (0) 131 1.2.2.2 rmind 132 1.2.2.2 rmind #define CPU2_PRINT_4(regno, sel) \ 133 1.2.2.2 rmind do { \ 134 1.2.2.2 rmind uint32_t r; \ 135 1.2.2.2 rmind RMIXL_MFC2(regno, sel, r); \ 136 1.2.2.2 rmind printf("%s: CP2(%d,%d) = %#x\n", \ 137 1.2.2.2 rmind __func__, regno, sel, r); \ 138 1.2.2.2 rmind } while (0) 139 1.2.2.2 rmind 140 1.2.2.2 rmind 141 1.2.2.2 rmind /* 142 1.2.2.2 rmind * encode 'dest' for msgsnd op 'rt' 143 1.2.2.2 rmind */ 144 1.2.2.2 rmind #define RMIXL_MSGSND_DESC(size, code, dest_id) \ 145 1.2.2.2 rmind ((((size) - 1) << 16) | ((code) << 8) | (dest_id)) 146 1.2.2.2 rmind 147 1.2.2.2 rmind static inline void 148 1.2.2.2 rmind rmixl_msgsnd(uint32_t desc) 149 1.2.2.2 rmind { 150 1.2.2.2 rmind __asm__ volatile ( 151 1.2.2.2 rmind ".set push" "\n\t" 152 1.2.2.2 rmind ".set noreorder" "\n\t" 153 1.2.2.2 rmind ".set mips64" "\n\t" 154 1.2.2.2 rmind "sync" "\n\t" 155 1.2.2.2 rmind "msgsnd %0" "\n\t" 156 1.2.2.2 rmind ".set pop" "\n\t" 157 1.2.2.2 rmind :: "r"(desc)); 158 1.2.2.2 rmind } 159 1.2.2.2 rmind 160 1.2.2.2 rmind static inline void 161 1.2.2.2 rmind rmixl_msgld(uint32_t bucket) 162 1.2.2.2 rmind { 163 1.2.2.2 rmind __asm__ volatile ( 164 1.2.2.2 rmind ".set push" "\n\t" 165 1.2.2.2 rmind ".set noreorder" "\n\t" 166 1.2.2.2 rmind ".set mips64" "\n\t" 167 1.2.2.2 rmind "msgld %0" "\n\t" 168 1.2.2.2 rmind ".set pop" "\n\t" 169 1.2.2.2 rmind :: "r"(bucket)); 170 1.2.2.2 rmind } 171 1.2.2.2 rmind 172 1.2.2.2 rmind /* 173 1.2.2.2 rmind * the seemingly-spurious add is recommended by RMI 174 1.2.2.2 rmind * see XLS PRM (rev. 3.21) 5.3.9 175 1.2.2.2 rmind */ 176 1.2.2.2 rmind static inline void 177 1.2.2.2 rmind rmixl_fmn_msgwait(u_int mask) 178 1.2.2.2 rmind { 179 1.2.2.2 rmind __asm__ volatile ( 180 1.2.2.2 rmind ".set push" "\n\t" 181 1.2.2.2 rmind ".set noreorder" "\n\t" 182 1.2.2.2 rmind ".set mips64" "\n\t" 183 1.2.2.2 rmind "addu %0,%0,0" "\n\t" 184 1.2.2.2 rmind "msgwait %0" "\n\t" 185 1.2.2.2 rmind ".set pop" "\n\t" 186 1.2.2.2 rmind :: "r"(mask)); 187 1.2.2.2 rmind } 188 1.2.2.2 rmind 189 1.2.2.2 rmind static inline uint32_t 190 1.2.2.2 rmind rmixl_cp2_enable(void) 191 1.2.2.2 rmind { 192 1.2.2.2 rmind uint32_t rv; 193 1.2.2.2 rmind uint32_t cu2; 194 1.2.2.2 rmind 195 1.2.2.2 rmind KASSERT(curcpu()->ci_cpl == IPL_HIGH); 196 1.2.2.2 rmind __asm volatile( 197 1.2.2.2 rmind ".set push" "\n\t" 198 1.2.2.2 rmind ".set noreorder" "\n\t" 199 1.2.2.2 rmind "li %1,%3" "\n\t" 200 1.2.2.2 rmind "mfc0 %0,$%2" "\n\t" 201 1.2.2.2 rmind "or %1,%1,%0" "\n\t" 202 1.2.2.2 rmind "mtc0 %1,$%2" "\n\t" 203 1.2.2.2 rmind ".set pop" "\n\t" 204 1.2.2.2 rmind : "=r"(rv), "=r"(cu2) 205 1.2.2.2 rmind : "n"(MIPS_COP_0_STATUS), "n"(1 << 30)); 206 1.2.2.2 rmind 207 1.2.2.2 rmind return (rv & (1 << 30)); 208 1.2.2.2 rmind } 209 1.2.2.2 rmind 210 1.2.2.2 rmind static inline void 211 1.2.2.2 rmind rmixl_cp2_restore(uint32_t ocu) 212 1.2.2.2 rmind { 213 1.2.2.2 rmind uint32_t cu2; 214 1.2.2.2 rmind uint32_t mask = ~(1 << 30); 215 1.2.2.2 rmind 216 1.2.2.2 rmind KASSERT(curcpu()->ci_cpl == IPL_HIGH); 217 1.2.2.2 rmind __asm volatile( 218 1.2.2.2 rmind ".set push" "\n\t" 219 1.2.2.2 rmind ".set noreorder" "\n\t" 220 1.2.2.2 rmind "mfc0 %0,$%1" "\n\t" 221 1.2.2.2 rmind "and %0,%2,%0" "\n\t" 222 1.2.2.2 rmind "or %0,%3,%0" "\n\t" 223 1.2.2.2 rmind "mtc0 %0,$%1" "\n\t" 224 1.2.2.2 rmind ".set pop" "\n\t" 225 1.2.2.2 rmind : "=r"(cu2) 226 1.2.2.2 rmind : "n"(MIPS_COP_0_STATUS), "r"(mask), "r"(ocu)); 227 1.2.2.2 rmind } 228 1.2.2.2 rmind 229 1.2.2.2 rmind /* 230 1.2.2.2 rmind * logical station IDs for RMI XLR 231 1.2.2.2 rmind * see Table 13.2 "Addressable Buckets" in the XLR PRM 232 1.2.2.2 rmind */ 233 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE0 0 234 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE1 1 235 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE2 2 236 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE3 3 237 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE4 4 238 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE5 5 239 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE6 6 240 1.2.2.2 rmind #define RMIXLR_FMN_STID_CORE7 7 241 1.2.2.2 rmind #define RMIXLR_FMN_STID_TXRX_0 8 242 1.2.2.2 rmind #define RMIXLR_FMN_STID_TXRX_1 9 243 1.2.2.2 rmind #define RMIXLR_FMN_STID_RGMII 10 244 1.2.2.2 rmind #define RMIXLR_FMN_STID_DMA 11 245 1.2.2.2 rmind #define RMIXLR_FMN_STID_FREE_0 12 246 1.2.2.2 rmind #define RMIXLR_FMN_STID_FREE_1 13 247 1.2.2.2 rmind #define RMIXLR_FMN_STID_SAE 14 248 1.2.2.2 rmind #define RMIXLR_FMN_NSTID (RMIXLR_FMN_STID_SAE+1) 249 1.2.2.2 rmind #define RMIXLR_FMN_STID_RESERVED -1 250 1.2.2.2 rmind 251 1.2.2.2 rmind /* 252 1.2.2.2 rmind * logical station IDs for RMI XLS 253 1.2.2.2 rmind * see Table 12.1 "Stations and Addressable Buckets ..." in the XLS PRM 254 1.2.2.2 rmind */ 255 1.2.2.2 rmind #define RMIXLS_FMN_STID_CORE0 0 256 1.2.2.2 rmind #define RMIXLS_FMN_STID_CORE1 1 257 1.2.2.2 rmind #define RMIXLS_FMN_STID_CORE2 2 258 1.2.2.2 rmind #define RMIXLS_FMN_STID_CORE3 3 259 1.2.2.2 rmind #define RMIXLS_FMN_STID_GMAC_Q0 4 260 1.2.2.2 rmind #define RMIXLS_FMN_STID_GMAC_Q1 5 261 1.2.2.2 rmind #define RMIXLS_FMN_STID_DMA 6 262 1.2.2.2 rmind #define RMIXLS_FMN_STID_CDE 7 263 1.2.2.2 rmind #define RMIXLS_FMN_STID_PCIE 8 264 1.2.2.2 rmind #define RMIXLS_FMN_STID_SAE 9 265 1.2.2.2 rmind #define RMIXLS_FMN_NSTID (RMIXLS_FMN_STID_SAE+1) 266 1.2.2.2 rmind #define RMIXLS_FMN_STID_RESERVED -1 267 1.2.2.2 rmind 268 1.2.2.2 rmind /* 269 1.2.2.2 rmind * logical station IDs for RMI XLP 270 1.2.2.2 rmind * TBD! 271 1.2.2.2 rmind */ 272 1.2.2.2 rmind #define RMIXLP_FMN_NSTID 0 /* XXX */ 273 1.2.2.2 rmind 274 1.2.2.2 rmind 275 1.2.2.2 rmind #define RMIXL_FMN_NSTID \ 276 1.2.2.2 rmind MAX(MAX(RMIXLR_FMN_NSTID, RMIXLS_FMN_NSTID), RMIXLP_FMN_NSTID) 277 1.2.2.2 rmind 278 1.2.2.2 rmind 279 1.2.2.2 rmind #define RMIXL_FMN_INTR_IPL IPL_HIGH 280 1.2.2.2 rmind 281 1.2.2.2 rmind void rmixl_fmn_init(void); 282 1.2.2.2 rmind void rmixl_fmn_init_core(void); 283 1.2.2.2 rmind void rmixl_fmn_init_cpu_intr(void); 284 1.2.2.2 rmind void *rmixl_fmn_intr_establish(int, int (*)(void *, rmixl_fmn_rxmsg_t *), void *); 285 1.2.2.2 rmind void rmixl_fmn_intr_disestablish(void *); 286 1.2.2.2 rmind void rmixl_fmn_intr_poll(u_int, rmixl_fmn_rxmsg_t *); 287 1.2.2.2 rmind int rmixl_fmn_msg_send(u_int, u_int, u_int, rmixl_fmn_msg_t *); 288 1.2.2.2 rmind int rmixl_fmn_msg_recv(u_int, rmixl_fmn_rxmsg_t *); 289 1.2.2.2 rmind 290 1.2.2.2 rmind 291 1.2.2.2 rmind 292 1.2.2.2 rmind #endif /* _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ */ 293
Indexes created Wed Oct 22 13:09:56 GMT 2025