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rmixl_fmnvar.h revision 1.1.2.2 
      1 /*	$Id: rmixl_fmnvar.h,v 1.1.2.2 2010/03/29 23:34:09 cliff Exp $	*/
      2 
      3 #ifndef _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_
      4 #define _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_
      5 
      6 #include <mips/cpuregs.h>
      7 
      8 #define RMIXL_FMN_CODE_PSB_WAKEUP	200	/* firmware MSGRNG_CODE_BOOT_WAKEUP */
      9 #define RMIXL_FMN_CODE_HELLO_REQ	201
     10 #define RMIXL_FMN_CODE_HELLO_ACK	202
     11 
     12 #define RMIXL_FMN_HELLO_REQ_SZ		4
     13 #define RMIXL_FMN_HELLO_ACK_SZ		4
     14 
     15 typedef struct rmixl_fmn_msg {
     16 	uint64_t data[4];
     17 } rmixl_fmn_msg_t;
     18 
     19 typedef struct rmixl_fmn_rxmsg {
     20 	u_int rxsid;
     21 	u_int code;
     22 	u_int size;
     23 	rmixl_fmn_msg_t msg;
     24 } rmixl_fmn_rxmsg_t;
     25 
     26 
     27 /*
     28  * compute FMN dest_id from MIPS cpuid
     29  * - each Core FMN sation has 8 buckets
     30  * - each Core has 4 threads
     31  * - here we use 1 bucket per thread
     32  *   (the first four buckets)
     33  * - if we need { hi, lo } priority buckets per thread
     34  *   need to adjust the RMIXL_FMN_DESTID macro
     35  *   and use the 'pri' parameter
     36  * - i.e. for now there is only one priority
     37  */
     38 #define RMIXL_CPU_CORE(cpuid)	((uint32_t)((cpuid) & __BITS(9,0)) >> 2)
     39 #define RMIXL_CPU_THREAD(cpuid)	((uint32_t)((cpuid) & __BITS(1,0)))
     40 #define RMIXL_FMN_CORE_DESTID(core, bucket)	\
     41 		 (((core) << 3) | (bucket))
     42 
     43 
     44 #define RMIXL_DMFC2(regnum, sel, rv)					\
     45 do {									\
     46 	uint64_t __val;							\
     47 									\
     48 	__asm volatile(							\
     49 		".set push" 			"\n\t"			\
     50 		".set mips64"			"\n\t"			\
     51 		".set noat"			"\n\t"			\
     52 		"dmfc2 %0,$%1,%2"		"\n\t"			\
     53 		".set pop"			"\n\t"			\
     54 	    : "=r"(__val) : "n"(regnum), "n"(sel));			\
     55 	rv = __val;							\
     56 } while (0)
     57 
     58 #define RMIXL_DMTC2(regnum, sel, val)					\
     59 do {									\
     60 	uint64_t __val = val;						\
     61 									\
     62 	__asm volatile(							\
     63 		".set push" 			"\n\t"			\
     64 		".set mips64"			"\n\t"			\
     65 		".set noat"			"\n\t"			\
     66 		"dmtc2 %0,$%1,%2"		"\n\t"			\
     67 		".set pop"			"\n\t"			\
     68 	    :: "r"(__val), "n"(regnum), "n"(sel));			\
     69 } while (0)
     70 
     71 #define RMIXL_MFC2(regnum, sel, rv)					\
     72 do {									\
     73 	uint32_t __val;							\
     74 									\
     75 	__asm volatile(							\
     76 		".set push"			"\n\t"			\
     77 		".set mips64"			"\n\t"			\
     78 		"mfc2 %0,$%1,%2"		"\n\t"			\
     79 		".set pop"			"\n\t"			\
     80 	    : "=r"(__val) : "n"(regnum), "n"(sel));			\
     81 	rv = __val;							\
     82 } while (0)
     83 
     84 #define RMIXL_MTC2(regnum, sel, val)					\
     85 do {									\
     86 	uint32_t __val = val;						\
     87 									\
     88 	__asm volatile(							\
     89 		".set push"			"\n\t"			\
     90 		".set mips64"			"\n\t"			\
     91 		"mtc2 %0,$%1,%2"		"\n\t"			\
     92 		".set pop"			"\n\t"			\
     93 	    :: "r"(__val), "n"(regnum), "n"(sel));			\
     94 } while (0)
     95 
     96 #define CPU2_PRINT_8(regno, sel)					\
     97 do {									\
     98 	uint64_t r;							\
     99 	RMIXL_DMFC2(regno, sel, r);					\
    100 	printf("%s: CP2(%d,%d) = %#"PRIx64"\n",				\
    101 		__func__, regno, sel, r);				\
    102 } while (0)
    103 
    104 #define CPU2_PRINT_4(regno, sel)					\
    105 do {									\
    106 	uint32_t r;							\
    107 	RMIXL_MFC2(regno, sel, r);					\
    108 	printf("%s: CP2(%d,%d) = %#x\n",				\
    109 		__func__, regno, sel, r);				\
    110 } while (0)
    111 
    112 
    113 /*
    114  * encode 'dest' for msgsnd op 'rt'
    115  */
    116 #define RMIXL_MSGSND_DESC(size, code, dest_id)	\
    117 		((((size) - 1) << 16) | ((code) << 8) | (dest_id))
    118 
    119 static inline void
    120 rmixl_msgsnd(uint32_t desc)
    121 {
    122 	__asm__ volatile (
    123 		".set push"		"\n\t"
    124 		".set noreorder"	"\n\t"
    125 		".set mips64"		"\n\t"
    126 		"sync"			"\n\t"
    127 		"msgsnd %0"		"\n\t"
    128 		".set pop"		"\n\t"
    129 			:: "r"(desc));
    130 }
    131 
    132 static inline void
    133 rmixl_msgld(uint32_t bucket)
    134 {
    135 	__asm__ volatile (
    136 		".set push"		"\n\t"
    137 		".set noreorder"	"\n\t"
    138 		".set mips64"		"\n\t"
    139 		"msgld %0"		"\n\t"
    140 		".set pop"		"\n\t"
    141 			:: "r"(bucket));
    142 }
    143 
    144 /*
    145  * the seemingly-spurious add is recommended by RMI
    146  * see XLS PRM (rev. 3.21) 5.3.9
    147  */
    148 static inline void
    149 rmixl_fmn_msgwait(u_int mask)
    150 {
    151 	__asm__ volatile (
    152 		".set push"		"\n\t"
    153 		".set noreorder"	"\n\t"
    154 		".set mips64"		"\n\t"
    155 		"addu %0,%0,0"		"\n\t"
    156 		"msgwait %0"		"\n\t"
    157 		".set pop"		"\n\t"
    158 			:: "r"(mask));
    159 }
    160 
    161 static inline uint32_t
    162 rmixl_cp2_enable(void)
    163 {
    164 	uint32_t rv;
    165 	uint32_t cu2;
    166 
    167 	KASSERT(curcpu()->ci_cpl == IPL_HIGH);
    168 	__asm volatile(
    169 		".set push"		"\n\t"
    170 		".set noreorder"	"\n\t"
    171 		"li	%1,%3"		"\n\t"
    172 		"mfc0	%0,$%2"		"\n\t"
    173 		"or	%1,%1,%0"	"\n\t"
    174 		"mtc0	%1,$%2"		"\n\t"
    175 		".set pop"		"\n\t"
    176 			: "=r"(rv), "=r"(cu2)
    177 			: "n"(MIPS_COP_0_STATUS), "n"(1 << 30));
    178 
    179 	return (rv & (1 << 30));
    180 }
    181 
    182 static inline void
    183 rmixl_cp2_restore(uint32_t ocu)
    184 {
    185 	uint32_t cu2;
    186 	uint32_t mask = ~(1 << 30);
    187 
    188 	KASSERT(curcpu()->ci_cpl == IPL_HIGH);
    189 	__asm volatile(
    190 		".set push"		"\n\t"
    191 		".set noreorder"	"\n\t"
    192 		"mfc0	%0,$%1"		"\n\t"
    193 		"and	%0,%2,%0"	"\n\t"
    194 		"or	%0,%3,%0"	"\n\t"
    195 		"mtc0	%0,$%1"		"\n\t"
    196 		".set pop"		"\n\t"
    197 			: "=r"(cu2)
    198 			: "n"(MIPS_COP_0_STATUS), "r"(mask), "r"(ocu));
    199 }
    200 
    201 /*
    202  * logical station IDs for RMI XLR
    203  * see Table 13.2 "Addressable Buckets" in the XLR PRM
    204  */
    205 #define RMIXLR_FMN_STID_CORE0			0
    206 #define RMIXLR_FMN_STID_CORE1			1
    207 #define RMIXLR_FMN_STID_CORE2			2
    208 #define RMIXLR_FMN_STID_CORE3			3
    209 #define RMIXLR_FMN_STID_CORE4			4
    210 #define RMIXLR_FMN_STID_CORE5			5
    211 #define RMIXLR_FMN_STID_CORE6			6
    212 #define RMIXLR_FMN_STID_CORE7			7
    213 #define RMIXLR_FMN_STID_TXRX_0			8
    214 #define RMIXLR_FMN_STID_TXRX_1			9
    215 #define RMIXLR_FMN_STID_RGMII			10
    216 #define RMIXLR_FMN_STID_DMA			11
    217 #define RMIXLR_FMN_STID_FREE_0			12
    218 #define RMIXLR_FMN_STID_FREE_1			13
    219 #define RMIXLR_FMN_STID_SAE			14
    220 #define RMIXLR_FMN_NSTID			(RMIXLR_FMN_STID_SAE+1)
    221 #define RMIXLR_FMN_STID_RESERVED		-1
    222 
    223 /*
    224  * logical station IDs for RMI XLS
    225  * see Table 12.1 "Stations and Addressable Buckets ..." in the XLS PRM
    226  */
    227 #define RMIXLS_FMN_STID_CORE0			0
    228 #define RMIXLS_FMN_STID_CORE1			1
    229 #define RMIXLS_FMN_STID_CORE2			2
    230 #define RMIXLS_FMN_STID_CORE3			3
    231 #define RMIXLS_FMN_STID_GMAC_Q0			4
    232 #define RMIXLS_FMN_STID_GMAC_Q1			5
    233 #define RMIXLS_FMN_STID_DMA			6
    234 #define RMIXLS_FMN_STID_CDE			7
    235 #define RMIXLS_FMN_STID_PCIE			8
    236 #define RMIXLS_FMN_STID_SAE			9
    237 #define RMIXLS_FMN_NSTID			(RMIXLS_FMN_STID_SAE+1)
    238 #define RMIXLS_FMN_STID_RESERVED		-1
    239 
    240 /*
    241  * logical station IDs for RMI XLP
    242  * TBD!
    243  */
    244 #define RMIXLP_FMN_NSTID			0	/* XXX */
    245 
    246 
    247 #define RMIXL_FMN_NSTID		\
    248 		MAX(MAX(RMIXLR_FMN_NSTID, RMIXLS_FMN_NSTID), RMIXLP_FMN_NSTID)
    249 
    250 
    251 #define RMIXL_FMN_INTR_IPL	IPL_HIGH
    252 
    253 void	rmixl_fmn_init(void);
    254 void	rmixl_fmn_init_core(void);
    255 void	rmixl_fmn_init_cpu_intr(void);
    256 void   *rmixl_fmn_intr_establish(int, int (*)(void *, rmixl_fmn_rxmsg_t *), void *);
    257 void	rmixl_fmn_intr_disestablish(void *);
    258 void	rmixl_fmn_intr_poll(u_int, rmixl_fmn_rxmsg_t *);
    259 int	rmixl_fmn_msg_send(u_int, u_int, u_int, rmixl_fmn_msg_t *);
    260 int	rmixl_fmn_msg_recv(u_int, rmixl_fmn_rxmsg_t *);
    261 
    262 
    263 
    264 #endif	/* _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ */
    265