rmixl_gpio.c revision 1.1
1 /* $NetBSD: rmixl_gpio.c,v 1.1 2011/03/18 01:03:10 cliff Exp $ */ 2 /* $NetBSD: rmixl_gpio.c,v 1.1 2011/03/18 01:03:10 cliff Exp $ */ 3 /*- 4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: rmixl_gpio.c,v 1.1 2011/03/18 01:03:10 cliff Exp $"); 33 34 #define _INTR_PRIVATE 35 36 #include "locators.h" 37 #include "gpio.h" 38 39 #include <sys/param.h> 40 #include <sys/evcnt.h> 41 #include <sys/atomic.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <machine/intr.h> 46 47 #include <mips/cpu.h> 48 49 #include <machine/bus.h> 50 51 #include <mips/rmi/rmixlreg.h> 52 #include <mips/rmi/rmixlvar.h> 53 #include <mips/rmi/rmixl_obiovar.h> 54 55 #if NGPIO > 0 56 #include <sys/gpio.h> 57 #include <dev/gpio/gpiovar.h> 58 #endif 59 60 struct gpio_softc { 61 device_t gpio_dev; 62 void *gpio_ih; 63 bus_space_tag_t gpio_memt; 64 bus_space_handle_t gpio_memh; 65 uint32_t gpio_enable_mask; 66 uint32_t gpio_edge_mask; 67 uint32_t gpio_edge_falling_mask; 68 uint32_t gpio_edge_rising_mask; 69 uint32_t gpio_level_mask; 70 uint32_t gpio_level_hi_mask; 71 uint32_t gpio_level_lo_mask; 72 uint32_t gpio_inuse_mask; 73 #if NGPIO > 0 74 struct gpio_chipset_tag gpio_chipset; 75 gpio_pin_t gpio_pins[RMIXL_GPIO_NSIGNALS]; 76 #endif 77 }; 78 79 #define GPIO_READ(gpio, reg) \ 80 bus_space_read_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg)) 81 #define GPIO_WRITE(gpio, reg, val) \ 82 bus_space_write_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg), (val)) 83 84 static int gpio_match(device_t, cfdata_t, void *); 85 static void gpio_attach(device_t, device_t, void *); 86 87 CFATTACH_DECL_NEW(rmixl_gpio, 88 sizeof(struct gpio_softc), 89 gpio_match, gpio_attach, 90 NULL, NULL); 91 92 #if NGPIO > 0 93 94 static int 95 rmixl_gpio_pin_read(void *arg, int pin) 96 { 97 struct gpio_softc * const gpio = arg; 98 99 KASSERT(((1 << pin) & RMIXL_GPIO_INPUT_MASK) != 0); 100 return (GPIO_READ(gpio, RMIXL_GPIO_INPUT) >> pin) & 1; 101 } 102 103 static void 104 rmixl_gpio_pin_write(void *arg, int pin, int value) 105 { 106 struct gpio_softc * const gpio = arg; 107 uint32_t mask = 1 << pin; 108 uint32_t old, new; 109 110 KASSERT(((1 << pin) & RMIXL_GPIO_OUTPUT_MASK) != 0); 111 112 old = GPIO_READ(gpio, RMIXL_GPIO_OUTPUT); 113 if (value) 114 new = old | mask; 115 else 116 new = old & ~mask; 117 118 if (old != new) 119 GPIO_WRITE(gpio, RMIXL_GPIO_OUTPUT, new); 120 } 121 122 static void 123 rmixl_gpio_pin_ctl(void *arg, int pin, int flags) 124 { 125 struct gpio_softc * const gpio = arg; 126 uint32_t mask = 1 << pin; 127 uint32_t old, new; 128 129 KASSERT((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)); 130 old = GPIO_READ(gpio, RMIXL_GPIO_IO_DIR); 131 new = old; 132 switch (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { 133 case GPIO_PIN_INPUT: new &= ~mask; break; 134 case GPIO_PIN_OUTPUT: new |= mask; break; 135 default: return; 136 } 137 if (old != new) 138 GPIO_WRITE(gpio, RMIXL_GPIO_IO_DIR, new); 139 } 140 141 static void 142 gpio_defer(device_t self) 143 { 144 struct gpio_softc * const gpio = device_private(self); 145 struct gpio_chipset_tag * const gp = &gpio->gpio_chipset; 146 struct gpiobus_attach_args gba; 147 gpio_pin_t *pins; 148 uint32_t mask, dir, valueout, valuein; 149 int pin; 150 151 gp->gp_cookie = gpio; 152 gp->gp_pin_read = rmixl_gpio_pin_read; 153 gp->gp_pin_write = rmixl_gpio_pin_write; 154 gp->gp_pin_ctl = rmixl_gpio_pin_ctl; 155 156 gba.gba_gc = gp; 157 gba.gba_pins = gpio->gpio_pins; 158 gba.gba_npins = __arraycount(gpio->gpio_pins); 159 160 dir = GPIO_READ(gpio, RMIXL_GPIO_IO_DIR); 161 valueout = GPIO_READ(gpio, RMIXL_GPIO_OUTPUT); 162 valuein = GPIO_READ(gpio, RMIXL_GPIO_INPUT); 163 for (pin = 0, mask = 1, pins = gpio->gpio_pins; 164 pin < RMIXL_GPIO_NSIGNALS; pin++, mask <<= 1, pins++) { 165 pins->pin_num = pin; 166 if (gpio->gpio_inuse_mask & mask) { 167 if ((gpio->gpio_inuse_mask & RMIXL_GPIO_INPUT_MASK)) 168 pins->pin_caps = GPIO_PIN_INPUT; 169 } else { 170 int caps = 0; 171 if ((gpio->gpio_inuse_mask & RMIXL_GPIO_INPUT_MASK)) 172 caps |= GPIO_PIN_INPUT; 173 if ((gpio->gpio_inuse_mask & RMIXL_GPIO_OUTPUT_MASK)) 174 caps |= GPIO_PIN_INPUT; 175 pins->pin_caps = caps; 176 } 177 pins->pin_flags = 178 (dir & mask) ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT; 179 pins->pin_state = 180 (((dir & mask) ? valueout : valuein) & mask) 181 ? GPIO_PIN_LOW 182 : GPIO_PIN_HIGH; 183 } 184 185 config_found_ia(self, "gpiobus", &gba, gpiobus_print); 186 } 187 #endif /* NGPIO > 0 */ 188 189 int 190 gpio_match(device_t parent, cfdata_t cfdata, void *aux) 191 { 192 struct obio_attach_args *oa = aux; 193 194 if (oa->obio_addr == RMIXL_IO_DEV_GPIO) /* XXX XLS */ 195 return 1; 196 197 return 0; 198 } 199 200 void 201 gpio_attach(device_t parent, device_t self, void *aux) 202 { 203 struct obio_attach_args * const oa = aux; 204 struct gpio_softc * const gpio = device_private(self); 205 int error; 206 207 gpio->gpio_dev = self; 208 209 if (oa->obio_intr == OBIOCF_INTR_DEFAULT) 210 panic("\n%s: no intr assigned", device_xname(self)); 211 212 if (oa->obio_size == OBIOCF_SIZE_DEFAULT) 213 oa->obio_size = 0x1000; 214 215 gpio->gpio_memt = oa->obio_eb_bst; 216 error = bus_space_map(oa->obio_eb_bst, oa->obio_addr, oa->obio_size, 217 0, &gpio->gpio_memh); 218 219 if (error) { 220 aprint_error(": failed to map register %#" 221 PRIxBUSSIZE "@%#" PRIxBUSADDR ": %d\n", 222 oa->obio_size, oa->obio_addr, error); 223 return; 224 } 225 226 #ifdef NOTYET 227 if (oa->obio_intr != OBIOCF_INTR_DEFAULT) { 228 gpio->gpio_ih = intr_establish(oa->obio_intr, 229 IPL_HIGH, IST_LEVEL, pic_handle_intr, &gpio->gpio_pic); 230 KASSERT(gpio->gpio_ih != NULL); 231 aprint_normal(", intr %d", oa->obio_intr); 232 } 233 #endif 234 aprint_normal("\n"); 235 #if NGPIO > 0 236 config_interrupts(self, gpio_defer); 237 #endif 238 } 239
Indexes created Fri Oct 03 23:09:56 GMT 2025