rmixl_pcievar.h revision 1.2.10.1
1 1.2 matt /* $NetBSD: rmixl_pcievar.h,v 1.2.10.1 2011/03/05 15:09:51 bouyer Exp $ */ 2 1.2.10.1 bouyer /*- 3 1.2.10.1 bouyer * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 1.2.10.1 bouyer * All rights reserved. 5 1.2.10.1 bouyer * 6 1.2.10.1 bouyer * This code is derived from software contributed to The NetBSD Foundation 7 1.2.10.1 bouyer * by Cliff Neighbors. 8 1.2.10.1 bouyer * 9 1.2.10.1 bouyer * Redistribution and use in source and binary forms, with or without 10 1.2.10.1 bouyer * modification, are permitted provided that the following conditions 11 1.2.10.1 bouyer * are met: 12 1.2.10.1 bouyer * 1. Redistributions of source code must retain the above copyright 13 1.2.10.1 bouyer * notice, this list of conditions and the following disclaimer. 14 1.2.10.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright 15 1.2.10.1 bouyer * notice, this list of conditions and the following disclaimer in the 16 1.2.10.1 bouyer * documentation and/or other materials provided with the distribution. 17 1.2.10.1 bouyer * 18 1.2.10.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.2.10.1 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.2.10.1 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.2.10.1 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.2.10.1 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.2.10.1 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.2.10.1 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.2.10.1 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.2.10.1 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.2.10.1 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.2.10.1 bouyer * POSSIBILITY OF SUCH DAMAGE. 29 1.2.10.1 bouyer */ 30 1.2 matt 31 1.2 matt #ifndef _MIPS_RMI_PCIE_VAR_H_ 32 1.2 matt #define _MIPS_RMI_PCIE_VAR_H_ 33 1.2 matt 34 1.2 matt #include <dev/pci/pcivar.h> 35 1.2 matt 36 1.2 matt typedef enum rmixl_pcie_lnkcfg_mode { 37 1.2 matt LCFG_NO=0, /* placeholder */ 38 1.2 matt LCFG_EP, /* end point */ 39 1.2 matt LCFG_RC, /* root complex */ 40 1.2 matt } rmixl_pcie_lnkcfg_mode_t; 41 1.2 matt 42 1.2 matt typedef struct rmixl_pcie_lnkcfg { 43 1.2 matt rmixl_pcie_lnkcfg_mode_t mode; 44 1.2 matt u_int lanes; 45 1.2 matt } rmixl_pcie_lnkcfg_t; 46 1.2 matt 47 1.2 matt typedef struct rmixl_pcie_lnktab { 48 1.2 matt u_int ncfgs; 49 1.2 matt const char *str; 50 1.2 matt const rmixl_pcie_lnkcfg_t *cfg; 51 1.2 matt } rmixl_pcie_lnktab_t; 52 1.2 matt 53 1.2.10.1 bouyer typedef struct rmixl_pcie_evcnt { 54 1.2.10.1 bouyer struct evcnt evcnt; 55 1.2.10.1 bouyer char name[32]; 56 1.2.10.1 bouyer } rmixl_pcie_evcnt_t; 57 1.2.10.1 bouyer 58 1.2.10.1 bouyer typedef struct rmixl_pcie_link_dispatch { 59 1.2.10.1 bouyer int (*func)(void *); 60 1.2.10.1 bouyer void *arg; 61 1.2.10.1 bouyer u_int link; 62 1.2.10.1 bouyer u_int bitno; 63 1.2.10.1 bouyer u_int irq; 64 1.2.10.1 bouyer rmixl_pcie_evcnt_t *counts; /* index by cpu */ 65 1.2.10.1 bouyer } rmixl_pcie_link_dispatch_t; 66 1.2.10.1 bouyer 67 1.2.10.1 bouyer struct rmixl_pcie_softc; 68 1.2.10.1 bouyer 69 1.2.10.1 bouyer typedef struct rmixl_pcie_link_intr { 70 1.2.10.1 bouyer struct rmixl_pcie_softc *sc; 71 1.2.10.1 bouyer u_int link; 72 1.2.10.1 bouyer u_int ipl; 73 1.2.10.1 bouyer void *ih; /* mips interrupt handle */ 74 1.2.10.1 bouyer callout_t callout; /* for delayed free of this struct */ 75 1.2.10.1 bouyer u_int dispatch_count; 76 1.2.10.1 bouyer rmixl_pcie_link_dispatch_t dispatch_data[1]; 77 1.2.10.1 bouyer /* variable length */ 78 1.2.10.1 bouyer } rmixl_pcie_link_intr_t; 79 1.2.10.1 bouyer 80 1.2.10.1 bouyer #define RMIXL_PCIE_NLINKS_MAX 4 81 1.2.10.1 bouyer 82 1.2.10.1 bouyer typedef struct rmixl_pcie_softc { 83 1.2 matt device_t sc_dev; 84 1.2 matt struct mips_pci_chipset sc_pci_chipset; 85 1.2.10.1 bouyer bus_space_tag_t sc_pci_cfg_memt; 86 1.2.10.1 bouyer bus_space_tag_t sc_pci_ecfg_memt; 87 1.2 matt bus_dma_tag_t sc_29bit_dmat; 88 1.2 matt bus_dma_tag_t sc_32bit_dmat; 89 1.2 matt bus_dma_tag_t sc_64bit_dmat; 90 1.2 matt rmixl_pcie_lnktab_t sc_pcie_lnktab; 91 1.2.10.1 bouyer kmutex_t sc_mutex; 92 1.2.10.1 bouyer int sc_tmsk; 93 1.2.10.1 bouyer void *sc_fatal_ih; 94 1.2.10.1 bouyer rmixl_pcie_evcnt_t *sc_evcnts[RMIXL_PCIE_NLINKS_MAX]; 95 1.2.10.1 bouyer rmixl_pcie_link_intr_t *sc_link_intr[RMIXL_PCIE_NLINKS_MAX]; 96 1.2.10.1 bouyer } rmixl_pcie_softc_t; 97 1.2.10.1 bouyer 98 1.2.10.1 bouyer 99 1.2.10.1 bouyer extern void rmixl_physaddr_init_pcie(struct extent *); 100 1.2 matt 101 1.2 matt #endif /* _MIPS_RMI_PCIE_VAR_H_ */ 102 1.2 matt 103
Indexes created Mon Oct 27 04:09:48 GMT 2025