rmixlvar.h revision 1.1.2.12
1 /* $NetBSD: rmixlvar.h,v 1.1.2.12 2010/01/24 05:32:36 cliff Exp $ */ 2 3 /* 4 * Copyright 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _MIPS_RMI_RMIXLVAR_H_ 39 #define _MIPS_RMI_RMIXLVAR_H_ 40 41 #include <mips/cpu.h> 42 #include <dev/pci/pcivar.h> 43 #include <machine/bus.h> 44 #include <mips/rmi/rmixl_firmware.h> 45 46 static inline bool 47 cpu_rmixl(const struct pridtab *ct) 48 { 49 if (ct->cpu_cid == MIPS_PRID_CID_RMI) 50 return true; 51 return false; 52 } 53 54 static inline bool 55 cpu_rmixlr(const struct pridtab *ct) 56 { 57 u_int type = ct->cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 58 if (cpu_rmixl(ct) && type == CIDFL_RMI_TYPE_XLR) 59 return true; 60 return false; 61 } 62 63 static inline bool 64 cpu_rmixls(const struct pridtab *ct) 65 { 66 u_int type = ct->cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 67 if (cpu_rmixl(ct) && type == CIDFL_RMI_TYPE_XLS) 68 return true; 69 return false; 70 } 71 72 static inline bool 73 cpu_rmixlp(const struct pridtab *ct) 74 { 75 u_int type = ct->cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 76 if (cpu_rmixl(ct) && type == CIDFL_RMI_TYPE_XLP) 77 return true; 78 return false; 79 } 80 81 82 typedef enum { 83 RMIXL_INTR_EDGE=0, 84 RMIXL_INTR_LEVEL, 85 } rmixl_intr_trigger_t; 86 87 typedef enum { 88 RMIXL_INTR_RISING=0, 89 RMIXL_INTR_HIGH, 90 RMIXL_INTR_FALLING, 91 RMIXL_INTR_LOW, 92 } rmixl_intr_polarity_t; 93 94 struct rmixl_config { 95 uint64_t rc_io_pbase; 96 bus_addr_t rc_pcie_cfg_pbase; 97 bus_size_t rc_pcie_cfg_size; 98 bus_addr_t rc_pcie_ecfg_pbase; 99 bus_size_t rc_pcie_ecfg_size; 100 bus_addr_t rc_pci_mem_pbase; 101 bus_size_t rc_pci_mem_size; 102 bus_addr_t rc_pci_io_pbase; 103 bus_size_t rc_pci_io_size; 104 struct mips_bus_space rc_obio_eb_memt; /* DEVIO -eb */ 105 struct mips_bus_space rc_obio_el_memt; /* DEVIO -el */ 106 struct mips_bus_space rc_pcie_cfg_memt; /* PCI CFG */ 107 struct mips_bus_space rc_pcie_ecfg_memt; /* PCI ECFG */ 108 struct mips_bus_space rc_pci_memt; /* PCI MEM */ 109 struct mips_bus_space rc_pci_iot; /* PCI IO */ 110 struct mips_bus_dma_tag rc_64bit_dmat; 111 bus_dma_tag_t rc_32bit_dmat; 112 bus_dma_tag_t rc_29bit_dmat; 113 struct extent *rc_phys_ex; /* Note: MB units */ 114 struct extent *rc_obio_eb_ex; 115 struct extent *rc_obio_el_ex; 116 struct extent *rc_pcie_cfg_ex; 117 struct extent *rc_pcie_ecfg_ex; 118 struct extent *rc_pcie_mem_ex; 119 struct extent *rc_pcie_io_ex; 120 int rc_mallocsafe; 121 rmixlfw_info_t rc_psb_info; 122 volatile struct rmixlfw_cpu_wakeup_info 123 *rc_cpu_wakeup_info; 124 const void *rc_cpu_wakeup_end; 125 }; 126 127 extern struct rmixl_config rmixl_configuration; 128 129 extern void rmixl_obio_eb_bus_mem_init(bus_space_tag_t, void *); 130 extern void rmixl_obio_el_bus_mem_init(bus_space_tag_t, void *); 131 extern void rmixl_pcie_cfg_bus_mem_init(bus_space_tag_t, void *); 132 extern void rmixl_pcie_ecfg_bus_mem_init(bus_space_tag_t, void *); 133 extern void rmixl_pcie_bus_mem_init(bus_space_tag_t, void *); 134 extern void rmixl_pcie_bus_io_init(bus_space_tag_t, void *); 135 136 extern const char *rmixl_intr_string(int); 137 extern void *rmixl_intr_establish(int, int, 138 rmixl_intr_trigger_t, rmixl_intr_polarity_t, 139 int (*)(void *), void *); 140 extern void rmixl_intr_disestablish(void *); 141 142 extern void rmixl_addr_error_init(void); 143 extern int rmixl_addr_error_check(void); 144 145 extern uint64_t rmixl_mfcr(u_int); 146 extern void rmixl_mtcr(uint64_t, u_int); 147 148 #endif /* _MIPS_RMI_RMIXLVAR_H_ */ 149
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