bcm1480_ht.h revision 1.1.2.2
1 1.1.2.2 yamt /* ********************************************************************* 2 1.1.2.2 yamt * BCM1280/BCM1480 Board Support Package 3 1.1.2.2 yamt * 4 1.1.2.2 yamt * HT Device constants File: bcm1480_ht.h 5 1.1.2.2 yamt * 6 1.1.2.2 yamt * This module contains constants and macros to describe 7 1.1.2.2 yamt * the HT interface on the BCM1280/BCM1480. 8 1.1.2.2 yamt * 9 1.1.2.2 yamt * BCM1480 specification level: 1X55_1X80-UM100-R (12/18/03) 10 1.1.2.2 yamt * 11 1.1.2.2 yamt ********************************************************************* 12 1.1.2.2 yamt * 13 1.1.2.2 yamt * Copyright 2000,2001,2002,2003,2004 14 1.1.2.2 yamt * Broadcom Corporation. All rights reserved. 15 1.1.2.2 yamt * 16 1.1.2.2 yamt * This software is furnished under license and may be used and 17 1.1.2.2 yamt * copied only in accordance with the following terms and 18 1.1.2.2 yamt * conditions. Subject to these conditions, you may download, 19 1.1.2.2 yamt * copy, install, use, modify and distribute modified or unmodified 20 1.1.2.2 yamt * copies of this software in source and/or binary form. No title 21 1.1.2.2 yamt * or ownership is transferred hereby. 22 1.1.2.2 yamt * 23 1.1.2.2 yamt * 1) Any source code used, modified or distributed must reproduce 24 1.1.2.2 yamt * and retain this copyright notice and list of conditions 25 1.1.2.2 yamt * as they appear in the source file. 26 1.1.2.2 yamt * 27 1.1.2.2 yamt * 2) No right is granted to use any trade name, trademark, or 28 1.1.2.2 yamt * logo of Broadcom Corporation. The "Broadcom Corporation" 29 1.1.2.2 yamt * name may not be used to endorse or promote products derived 30 1.1.2.2 yamt * from this software without the prior written permission of 31 1.1.2.2 yamt * Broadcom Corporation. 32 1.1.2.2 yamt * 33 1.1.2.2 yamt * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 34 1.1.2.2 yamt * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 35 1.1.2.2 yamt * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 36 1.1.2.2 yamt * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 37 1.1.2.2 yamt * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 38 1.1.2.2 yamt * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 39 1.1.2.2 yamt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 40 1.1.2.2 yamt * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 41 1.1.2.2 yamt * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 42 1.1.2.2 yamt * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 43 1.1.2.2 yamt * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 44 1.1.2.2 yamt * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 45 1.1.2.2 yamt * THE POSSIBILITY OF SUCH DAMAGE. 46 1.1.2.2 yamt ********************************************************************* */ 47 1.1.2.2 yamt 48 1.1.2.2 yamt 49 1.1.2.2 yamt #ifndef _BCM1480_HT_H 50 1.1.2.2 yamt #define _BCM1480_HT_H 51 1.1.2.2 yamt 52 1.1.2.2 yamt #include "sb1250_defs.h" 53 1.1.2.2 yamt 54 1.1.2.2 yamt 55 1.1.2.2 yamt /* 56 1.1.2.2 yamt * The following definitions refer to PCI Configuration Space of the 57 1.1.2.2 yamt * HyperTransport Device Host Bridge (HTD). All registers are 32 bits. 58 1.1.2.2 yamt */ 59 1.1.2.2 yamt 60 1.1.2.2 yamt /* 61 1.1.2.2 yamt * HT Interface Device Configuration Header (Table 130) 62 1.1.2.2 yamt * The first 64 bytes are a standard Type 0 header. Only 63 1.1.2.2 yamt * device-specific extensions are defined here. 64 1.1.2.2 yamt */ 65 1.1.2.2 yamt 66 1.1.2.2 yamt #define R_BCM1480_HTD_ERRORINT 0x0084 67 1.1.2.2 yamt #define R_BCM1480_HTD_SPECCMDSTAT 0x0088 68 1.1.2.2 yamt #define R_BCM1480_HTD_SUBSYSSET 0x008C 69 1.1.2.2 yamt #define R_BCM1480_HTD_TGTDONE 0x0090 70 1.1.2.2 yamt #define R_BCM1480_HTD_VENDORIDSET 0x009C 71 1.1.2.2 yamt #define R_BCM1480_HTD_CLASSREVSET 0x00A0 72 1.1.2.2 yamt #define R_BCM1480_HTD_ISOCBAR 0x00A4 73 1.1.2.2 yamt #define R_BCM1480_HTD_ISOCBARMASK 0x00A8 74 1.1.2.2 yamt #define R_BCM1480_HTD_MAPBASE 0x00B0 /* 0xB0 through 0xEC - map table */ 75 1.1.2.2 yamt #define HTD_MAPENTRIES 16 /* 64 bytes, 16 entries */ 76 1.1.2.2 yamt #define R_BCM1480_HTD_MAP(n) (R_BCM1480_HTD_MAPBASE + (n)*4) 77 1.1.2.2 yamt #define R_BCM1480_HTD_INTBUSCTRL 0x00F0 78 1.1.2.2 yamt #define R_BCM1480_HTD_PORTSCTRL 0x00F4 79 1.1.2.2 yamt 80 1.1.2.2 yamt 81 1.1.2.2 yamt /* 82 1.1.2.2 yamt * HT Device Error and Interrupt Register (Table 133) 83 1.1.2.2 yamt */ 84 1.1.2.2 yamt 85 1.1.2.2 yamt #define M_BCM1480_HTD_INT_BUS_ERR _SB_MAKEMASK1_32(0) 86 1.1.2.2 yamt #define M_BCM1480_HTD_PORT0_DOWN_ERR _SB_MAKEMASK1_32(8) 87 1.1.2.2 yamt #define M_BCM1480_HTD_PORT1_DOWN_ERR _SB_MAKEMASK1_32(9) 88 1.1.2.2 yamt #define M_BCM1480_HTD_PORT2_DOWN_ERR _SB_MAKEMASK1_32(10) 89 1.1.2.2 yamt #define M_BCM1480_HTD_INT_BUS_DOWN_ERR _SB_MAKEMASK1_32(12) 90 1.1.2.2 yamt #define M_BCM1480_HTD_INT_BUS_ERR_INT_EN _SB_MAKEMASK1_32(16) 91 1.1.2.2 yamt #define M_BCM1480_HTD_PORT0_DOWN_INT_EN _SB_MAKEMASK1_32(24) 92 1.1.2.2 yamt #define M_BCM1480_HTD_PORT1_DOWN_INT_EN _SB_MAKEMASK1_32(25) 93 1.1.2.2 yamt #define M_BCM1480_HTD_PORT2_DOWN_INT_EN _SB_MAKEMASK1_32(26) 94 1.1.2.2 yamt #define M_BCM1480_HTD_INT_BUS_DOWN_INT_EN _SB_MAKEMASK1_32(28) 95 1.1.2.2 yamt 96 1.1.2.2 yamt /* 97 1.1.2.2 yamt * HT Device Specific Command and Status Register (Table 134) 98 1.1.2.2 yamt */ 99 1.1.2.2 yamt 100 1.1.2.2 yamt #define M_BCM1480_HTD_CMD_LOW_RANGE_EN _SB_MAKEMASK1_32(0) 101 1.1.2.2 yamt #define M_BCM1480_HTD_CMD_LOW_RANGE_SPLIT _SB_MAKEMASK1_32(1) 102 1.1.2.2 yamt #define M_BCM1480_HTD_CMD_FULL_BAR_EN _SB_MAKEMASK1_32(2) 103 1.1.2.2 yamt #define M_BCM1480_HTD_CMD_FULL_BAR_SPLIT _SB_MAKEMASK1_32(3) 104 1.1.2.2 yamt #define M_BCM1480_HTD_CMD_MSTR_ABORT_MODE _SB_MAKEMASK1_32(5) 105 1.1.2.2 yamt 106 1.1.2.2 yamt /* 107 1.1.2.2 yamt * HT Device Target Done Register (Table 135) 108 1.1.2.2 yamt */ 109 1.1.2.2 yamt 110 1.1.2.2 yamt #define S_BCM1480_HTD_TGT_DONE_COUNTER 0 111 1.1.2.2 yamt #define M_BCM1480_HTD_TGT_DONE_COUNTER _SB_MAKEMASK_32(8,S_BCM1480_HTD_TGT_DONE_COUNTER) 112 1.1.2.2 yamt #define V_BCM1480_HTD_TGT_DONE_COUNTER(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_TGT_DONE_COUNTER) 113 1.1.2.2 yamt #define G_BCM1480_HTD_TGT_DONE_COUNTER(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_TGT_DONE_COUNTER,M_BCM1480_HTD_TGT_DONE_COUNTER) 114 1.1.2.2 yamt 115 1.1.2.2 yamt /* 116 1.1.2.2 yamt * HT Device Isochronous BAR Register (Table 136) 117 1.1.2.2 yamt */ 118 1.1.2.2 yamt 119 1.1.2.2 yamt #define M_BCM1480_HTD_ISOC_BAR_EN _SB_MAKEMASK1_32(0) 120 1.1.2.2 yamt 121 1.1.2.2 yamt #define S_BCM1480_HTD_ISOC_BAR 1 122 1.1.2.2 yamt #define M_BCM1480_HTD_ISOC_BAR _SB_MAKEMASK_32(31,S_BCM1480_HTD_ISOC_BAR) 123 1.1.2.2 yamt #define V_BCM1480_HTD_ISOC_BAR(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_ISOC_BAR) 124 1.1.2.2 yamt #define G_BCM1480_HTD_ISOC_BAR(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_ISOC_BAR,M_BCM1480_HTD_ISOC_BAR) 125 1.1.2.2 yamt 126 1.1.2.2 yamt /* 127 1.1.2.2 yamt * HT Device Isochronous Ignore Mask Register (Table 137) 128 1.1.2.2 yamt */ 129 1.1.2.2 yamt 130 1.1.2.2 yamt #define S_BCM1480_HTD_ISOC_IGN_MASK 1 131 1.1.2.2 yamt #define M_BCM1480_HTD_ISOC_IGN_MASK _SB_MAKEMASK_32(31,S_BCM1480_HTD_ISOC_IGN_MASK) 132 1.1.2.2 yamt #define V_BCM1480_HTD_ISOC_IGN_MASK(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_ISOC_IGN_MASK) 133 1.1.2.2 yamt #define G_BCM1480_HTD_ISOC_IGN_MASK(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_ISOCBAR,M_BCM1480_HTD_ISOCBAR) 134 1.1.2.2 yamt 135 1.1.2.2 yamt /* 136 1.1.2.2 yamt * HT Device BAR0 Map Table Entry (Table 138) 137 1.1.2.2 yamt */ 138 1.1.2.2 yamt 139 1.1.2.2 yamt #define M_BCM1480_HTD_BAR0MAP_ENABLE _SB_MAKEMASK1_32(0) 140 1.1.2.2 yamt #define M_BCM1480_HTD_BAR0MAP_L2CA _SB_MAKEMASK1_32(2) 141 1.1.2.2 yamt #define M_BCM1480_HTD_BAR0MAP_ENDIAN _SB_MAKEMASK1_32(3) 142 1.1.2.2 yamt 143 1.1.2.2 yamt #define S_BCM1480_HTD_BAR0MAP_ADDR 12 144 1.1.2.2 yamt #define M_BCM1480_HTD_BAR0MAP_ADDR _SB_MAKEMASK_32(20,S_BCM1480_HTD_BAR0MAP_ADDR) 145 1.1.2.2 yamt #define V_BCM1480_HTD_BAR0MAP_ADDR(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_BAR0MAP_ADDR) 146 1.1.2.2 yamt #define G_BCM1480_HTD_BAR0MAP_ADDR(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_BAR0MAP_ADDR,M_BCM1480_HTD_BAR0MAP_ADDR) 147 1.1.2.2 yamt 148 1.1.2.2 yamt /* 149 1.1.2.2 yamt * HT Device Internal Bus Control and Status Register (Table 139) 150 1.1.2.2 yamt */ 151 1.1.2.2 yamt 152 1.1.2.2 yamt #define M_BCM1480_HTD_INTBUS_WARM_R _SB_MAKEMASK1_32(2) 153 1.1.2.2 yamt #define M_BCM1480_HTD_INTBUS_RESET _SB_MAKEMASK1_32(3) 154 1.1.2.2 yamt #define M_BCM1480_HTD_INTBUS_WARM_R_STATUS _SB_MAKEMASK1_32(4) 155 1.1.2.2 yamt #define M_BCM1480_HTD_INTBUS_RESET_STATUS _SB_MAKEMASK1_32(5) 156 1.1.2.2 yamt #define M_BCM1480_HTD_INTBUS_DET_SERR _SB_MAKEMASK1_32(8) 157 1.1.2.2 yamt 158 1.1.2.2 yamt /* 159 1.1.2.2 yamt * HT Device Ports Control and Status Register (Table 140) 160 1.1.2.2 yamt */ 161 1.1.2.2 yamt 162 1.1.2.2 yamt #define S_BCM1480_HTD_PORTCTRL_PORT0 0 163 1.1.2.2 yamt #define M_BCM1480_HTD_PORTCTRL_PORT0 _SB_MAKEMASK_32(8,S_BCM1480_HTD_PORTCTRL_PORT0) 164 1.1.2.2 yamt #define V_BCM1480_HTD_PORTCTRL_PORT0(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORT0) 165 1.1.2.2 yamt #define G_BCM1480_HTD_PORTCTRL_PORT0(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORT0,M_BCM1480_HTD_PORTCTRL_PORT0) 166 1.1.2.2 yamt 167 1.1.2.2 yamt #define S_BCM1480_HTD_PORTCTRL_PORT1 8 168 1.1.2.2 yamt #define M_BCM1480_HTD_PORTCTRL_PORT1 _SB_MAKEMASK_32(8,S_BCM1480_HTD_PORTCTRL_PORT1) 169 1.1.2.2 yamt #define V_BCM1480_HTD_PORTCTRL_PORT1(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORT1) 170 1.1.2.2 yamt #define G_BCM1480_HTD_PORTCTRL_PORT1(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORT1,M_BCM1480_HTD_PORTCTRL_PORT1) 171 1.1.2.2 yamt 172 1.1.2.2 yamt #define S_BCM1480_HTD_PORTCTRL_PORT2 16 173 1.1.2.2 yamt #define M_BCM1480_HTD_PORTCTRL_PORT2 _SB_MAKEMASK_32(8,S_BCM1480_HTD_PORTCTRL_PORT2) 174 1.1.2.2 yamt #define V_BCM1480_HTD_PORTCTRL_PORT2(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORT2) 175 1.1.2.2 yamt #define G_BCM1480_HTD_PORTCTRL_PORT2(x) _SB_GETVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORT2,M_BCM1480_HTD_PORTCTRL_PORT2) 176 1.1.2.2 yamt 177 1.1.2.2 yamt #define S_BCM1480_HTD_PORTCTRL_PORTX(p) ((p)*8) 178 1.1.2.2 yamt #define M_BCM1480_HTD_PORTCTRL_PORTX(p) _SB_MAKEMASK_32(8,S_BCM1480_HTD_PORTCTRL_PORTX(p)) 179 1.1.2.2 yamt #define V_BCM1480_HTD_PORTCTRL_PORTX(p,x) _SB_MAKEVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORTX(p)) 180 1.1.2.2 yamt #define G_BCM1480_HTD_PORTCTRL_PORTX(p,x) _SB_GETVALUE_32(x,S_BCM1480_HTD_PORTCTRL_PORTX(p),M_BCM1480_HTD_PORTCTRL_PORTX(p)) 181 1.1.2.2 yamt 182 1.1.2.2 yamt /* The following fields are per port */ 183 1.1.2.2 yamt #define M_BCM1480_HTD_PORT_ACTIVE _SB_MAKEMASK1_32(0) 184 1.1.2.2 yamt #define M_BCM1480_HTD_PORT_IS_PRIMARY _SB_MAKEMASK1_32(1) 185 1.1.2.2 yamt #define M_BCM1480_HTD_PORT_LINK_WARM_R _SB_MAKEMASK1_32(2) 186 1.1.2.2 yamt #define M_BCM1480_HTD_PORT_LINK_RESET _SB_MAKEMASK1_32(3) 187 1.1.2.2 yamt #define M_BCM1480_HTD_PORT_LINKWARMR_STATUS _SB_MAKEMASK1_32(4) 188 1.1.2.2 yamt #define M_BCM1480_HTD_PORT_LINKRESET_STATUS _SB_MAKEMASK1_32(5) 189 1.1.2.2 yamt 190 1.1.2.2 yamt 191 1.1.2.2 yamt /* 192 1.1.2.2 yamt * HT Internal Bridge HTB Configuration Header (Tables 141 193 1.1.2.2 yamt * and 163). The first 64 bytes are a standard Type 1 header. 194 1.1.2.2 yamt * Only device-specific extensions are defined here. 195 1.1.2.2 yamt * Note that Primary (Table 141) and Secondary (Table 163) formats 196 1.1.2.2 yamt * are identical except for the HT Link Capability registers. 197 1.1.2.2 yamt */ 198 1.1.2.2 yamt 199 1.1.2.2 yamt #define R_BCM1480_HTB_LINKCAP 0x0040 200 1.1.2.2 yamt #define R_BCM1480_HTB_LINKCTRL 0x0044 201 1.1.2.2 yamt #define R_BCM1480_HTB_LINKFREQERR 0x0048 202 1.1.2.2 yamt #define R_BCM1480_HTB_ERRHNDL 0x0050 203 1.1.2.2 yamt #define R_BCM1480_HTB_SWITCHCAP 0x005C 204 1.1.2.2 yamt #define R_BCM1480_HTB_SWITCHINFO 0x0064 205 1.1.2.2 yamt #define R_BCM1480_HTB_VCSETCAP 0x0074 206 1.1.2.2 yamt 207 1.1.2.2 yamt #define R_BCM1480_HTB_SPECBRCTRL 0x0088 208 1.1.2.2 yamt #define R_BCM1480_HTB_SPECLINKFREQ 0x0090 209 1.1.2.2 yamt #define R_BCM1480_HTB_VENDORIDSET 0x009C 210 1.1.2.2 yamt #define R_BCM1480_HTB_NODEROUTING0 0x00B0 211 1.1.2.2 yamt #define R_BCM1480_HTB_NODEROUTING1 0x00B4 212 1.1.2.2 yamt 213 1.1.2.2 yamt 214 1.1.2.2 yamt /* 215 1.1.2.2 yamt * HT Bridge Specific Bridge Link Control Register (Tables 156 and 178) 216 1.1.2.2 yamt */ 217 1.1.2.2 yamt 218 1.1.2.2 yamt #define M_BCM1480_HTB_LINKCTRL_CRCFLEN _SB_MAKEMASK1_32(1) 219 1.1.2.2 yamt #define M_BCM1480_HTB_LINKCTRL_LINKFAIL _SB_MAKEMASK1_32(4) 220 1.1.2.2 yamt #define S_BCM1480_HTB_LINKCTRL_CRCERR 8 221 1.1.2.2 yamt #define M_BCM1480_HTB_LINKCTRL_CRCERR _SB_MAKEMASK_32(4,S_BCM1480_HTB_LINKCTRL_CRCERR) 222 1.1.2.2 yamt 223 1.1.2.2 yamt /* 224 1.1.2.2 yamt * HT Bridge Specific Bridge Link Frequency / Error Register (Tables 158 and 180) 225 1.1.2.2 yamt */ 226 1.1.2.2 yamt #define M_BCM1480_HTB_LINKFQERR_PROTERR _SB_MAKEMASK1_32(12) 227 1.1.2.2 yamt #define M_BCM1480_HTB_LINKFQERR_OVFLERR _SB_MAKEMASK1_32(13) 228 1.1.2.2 yamt #define M_BCM1480_HTB_LINKFQERR_EOCERR _SB_MAKEMASK1_32(14) 229 1.1.2.2 yamt 230 1.1.2.2 yamt 231 1.1.2.2 yamt /* 232 1.1.2.2 yamt * HT Bridge Specific Bridge Error Handling Register (Tables 161 and 182) 233 1.1.2.2 yamt */ 234 1.1.2.2 yamt #define M_BCM1480_HTB_ERRHNDL_PROFLEN _SB_MAKEMASK1_32(16) 235 1.1.2.2 yamt #define M_BCM1480_HTB_ERRHNDL_OVFFLEN _SB_MAKEMASK1_32(17) 236 1.1.2.2 yamt #define M_BCM1480_HTB_ERRHNDL_CHNFAIL _SB_MAKEMASK1_32(24) 237 1.1.2.2 yamt #define M_BCM1480_HTB_ERRHNDL_RSPERR _SB_MAKEMASK1_32(25) 238 1.1.2.2 yamt 239 1.1.2.2 yamt 240 1.1.2.2 yamt 241 1.1.2.2 yamt 242 1.1.2.2 yamt /* 243 1.1.2.2 yamt * HT Bridge Specific Bridge Control Register (Tables 160 and 181) 244 1.1.2.2 yamt */ 245 1.1.2.2 yamt 246 1.1.2.2 yamt #define M_BCM1480_HTB_SPBRCTRL_SOUTH _SB_MAKEMASK1_32(0) 247 1.1.2.2 yamt #define M_BCM1480_HTB_SPBRCTRL_NO_INTR_FORWARD _SB_MAKEMASK1_32(8) 248 1.1.2.2 yamt 249 1.1.2.2 yamt /* 250 1.1.2.2 yamt * HT Bridge Specific Link Frequency Control Register (Table 160) 251 1.1.2.2 yamt */ 252 1.1.2.2 yamt 253 1.1.2.2 yamt #define S_BCM1480_HTB_SPLINKFREQ_PLLFREQ 0 254 1.1.2.2 yamt #define M_BCM1480_HTB_SPLINKFREQ_PLLFREQ _SB_MAKEMASK_32(5,S_BCM1480_HTB_SPLINKFREQ_PLLFREQ) 255 1.1.2.2 yamt #define V_BCM1480_HTB_SPLINKFREQ_PLLFREQ(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTB_SPLINKFREQ_PLLFREQ) 256 1.1.2.2 yamt #define G_BCM1480_HTB_SPLINKFREQ_PLLFREQ(x) _SB_GETVALUE_32(x,S_BCM1480_HTB_SPLINKFREQ_PLLFREQ,M_BCM1480_HTB_SPLINKFREQ_PLLFREQ) 257 1.1.2.2 yamt 258 1.1.2.2 yamt #define M_BCM1480_HTB_SPLINKFREQ_PLLDIV4 _SB_MAKEMASK1_32(5) 259 1.1.2.2 yamt #define M_BCM1480_HTB_SPLINKFREQ_PLLCOMPAT _SB_MAKEMASK1_32(6) 260 1.1.2.2 yamt #define M_BCM1480_HTB_SPLINKFREQ_SEQSTEP _SB_MAKEMASK1_32(7) 261 1.1.2.2 yamt 262 1.1.2.2 yamt #define S_BCM1480_HTB_SPLINKFREQ_FREQCAPSET 16 263 1.1.2.2 yamt #define M_BCM1480_HTB_SPLINKFREQ_FREQCAPSET _SB_MAKEMASK_32(16,S_BCM1480_HTB_SPLINKFREQ_FREQCAPSET) 264 1.1.2.2 yamt #define V_BCM1480_HTB_SPLINKFREQ_FREQCAPSET(x) _SB_MAKEVALUE_32(x,S_BCM1480_HTB_SPLINKFREQ_FREQCAPSET) 265 1.1.2.2 yamt #define G_BCM1480_HTB_SPLINKFREQ_FREQCAPSET(x) _SB_GETVALUE_32(x,S_BCM1480_HTB_SPLINKFREQ_FREQCAPSET,M_BCM1480_HTB_SPLINKFREQ_FREQCAPSET) 266 1.1.2.2 yamt 267 1.1.2.2 yamt /* 268 1.1.2.2 yamt * HT Bridge Node Routing Registers (Table 161) 269 1.1.2.2 yamt */ 270 1.1.2.2 yamt 271 1.1.2.2 yamt #define S_BCM1480_HTB_NODEROUTE(n) (4*(n)) 272 1.1.2.2 yamt #define M_BCM1480_HTB_NODEROUTE(n) _SB_MAKEMASK_32(4,S_BCM1480_HTB_NODEROUTE(n)) 273 1.1.2.2 yamt #define V_BCM1480_HTB_NODEROUTE(x,n) _SB_MAKEVALUE_32(x,S_BCM1480_HTB_NODEROUTE(n)) 274 1.1.2.2 yamt #define G_BCM1480_HTB_NODEROUTE(x,n) _SB_GETVALUE_32(x,S_BCM1480_HTB_NODEROUTE(n),M_BCM1480_HTB_NODEROUTE(n)) 275 1.1.2.2 yamt 276 1.1.2.2 yamt /* The following fields are per nibble */ 277 1.1.2.2 yamt #define M_BCM1480_HTB_ROUTE_IS_ON_SEC_FOR_IO _SB_MAKEMASK1_32(0) 278 1.1.2.2 yamt #define M_BCM1480_HTB_ROUTE_OVERRIDE_FOR_IO _SB_MAKEMASK1_32(1) 279 1.1.2.2 yamt #define M_BCM1480_HTB_ROUTE_IS_ON_SEC_FOR_CC _SB_MAKEMASK1_32(2) 280 1.1.2.2 yamt #define M_BCM1480_HTB_ROUTE_OVERRIDE_FOR_CC _SB_MAKEMASK1_32(3) 281 1.1.2.2 yamt 282 1.1.2.2 yamt 283 1.1.2.2 yamt /* 284 1.1.2.2 yamt * HT Bridge Switch Info Register Bits (Table 164) 285 1.1.2.2 yamt */ 286 1.1.2.2 yamt #define M_BCM1480_HTB_SWITCHINFO_HIDEPORT _SB_MAKEMASK1_32(23) 287 1.1.2.2 yamt 288 1.1.2.2 yamt #endif /* _BCM1480_HT_H */ 289
Indexes created Mon Oct 27 20:09:55 GMT 2025