sb1250_defs.h revision 1.2.6.1 1 1.1 simonb /* *********************************************************************
2 1.1 simonb * SB1250 Board Support Package
3 1.2.6.1 gehenna *
4 1.2.6.1 gehenna * Global constants and macros File: sb1250_defs.h
5 1.2.6.1 gehenna *
6 1.1 simonb * This file contains macros and definitions used by the other
7 1.1 simonb * include files.
8 1.1 simonb *
9 1.2.6.1 gehenna * SB1250 specification level: User's manual 1/02/02
10 1.2.6.1 gehenna *
11 1.2.6.1 gehenna * Author: Mitch Lichtenberg (mpl (at) broadcom.com)
12 1.2.6.1 gehenna *
13 1.2.6.1 gehenna *********************************************************************
14 1.1 simonb *
15 1.1 simonb * Copyright 2000,2001
16 1.1 simonb * Broadcom Corporation. All rights reserved.
17 1.2.6.1 gehenna *
18 1.2.6.1 gehenna * This software is furnished under license and may be used and
19 1.2.6.1 gehenna * copied only in accordance with the following terms and
20 1.2.6.1 gehenna * conditions. Subject to these conditions, you may download,
21 1.2.6.1 gehenna * copy, install, use, modify and distribute modified or unmodified
22 1.2.6.1 gehenna * copies of this software in source and/or binary form. No title
23 1.1 simonb * or ownership is transferred hereby.
24 1.2.6.1 gehenna *
25 1.2.6.1 gehenna * 1) Any source code used, modified or distributed must reproduce
26 1.2.6.1 gehenna * and retain this copyright notice and list of conditions as
27 1.1 simonb * they appear in the source file.
28 1.2.6.1 gehenna *
29 1.2.6.1 gehenna * 2) No right is granted to use any trade name, trademark, or
30 1.2.6.1 gehenna * logo of Broadcom Corporation. Neither the "Broadcom
31 1.2.6.1 gehenna * Corporation" name nor any trademark or logo of Broadcom
32 1.2.6.1 gehenna * Corporation may be used to endorse or promote products
33 1.2.6.1 gehenna * derived from this software without the prior written
34 1.1 simonb * permission of Broadcom Corporation.
35 1.2.6.1 gehenna *
36 1.1 simonb * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
37 1.2.6.1 gehenna * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
38 1.2.6.1 gehenna * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
39 1.2.6.1 gehenna * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
40 1.2.6.1 gehenna * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
41 1.2.6.1 gehenna * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
42 1.2.6.1 gehenna * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
43 1.2.6.1 gehenna * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
44 1.1 simonb * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
45 1.2.6.1 gehenna * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
46 1.2.6.1 gehenna * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
47 1.2.6.1 gehenna * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
48 1.1 simonb * THE POSSIBILITY OF SUCH DAMAGE.
49 1.1 simonb ********************************************************************* */
50 1.1 simonb
51 1.1 simonb
52 1.1 simonb /* *********************************************************************
53 1.1 simonb * Naming schemes for constants in these files:
54 1.2.6.1 gehenna *
55 1.2.6.1 gehenna * M_xxx MASK constant (identifies bits in a register).
56 1.2.6.1 gehenna * For multi-bit fields, all bits in the field will
57 1.2.6.1 gehenna * be set.
58 1.2.6.1 gehenna *
59 1.2.6.1 gehenna * K_xxx "Code" constant (value for data in a multi-bit
60 1.2.6.1 gehenna * field). The value is right justified.
61 1.2.6.1 gehenna *
62 1.2.6.1 gehenna * V_xxx "Value" constant. This is the same as the
63 1.2.6.1 gehenna * corresponding "K_xxx" constant, except it is
64 1.2.6.1 gehenna * shifted to the correct position in the register.
65 1.2.6.1 gehenna *
66 1.2.6.1 gehenna * S_xxx SHIFT constant. This is the number of bits that
67 1.2.6.1 gehenna * a field value (code) needs to be shifted
68 1.2.6.1 gehenna * (towards the left) to put the value in the right
69 1.2.6.1 gehenna * position for the register.
70 1.2.6.1 gehenna *
71 1.2.6.1 gehenna * A_xxx ADDRESS constant. This will be a physical
72 1.2.6.1 gehenna * address. Use the PHYS_TO_K1 macro to generate
73 1.2.6.1 gehenna * a K1SEG address.
74 1.2.6.1 gehenna *
75 1.2.6.1 gehenna * R_xxx RELATIVE offset constant. This is an offset from
76 1.2.6.1 gehenna * an A_xxx constant (usually the first register in
77 1.2.6.1 gehenna * a group).
78 1.2.6.1 gehenna *
79 1.2.6.1 gehenna * G_xxx(X) GET value. This macro obtains a multi-bit field
80 1.2.6.1 gehenna * from a register, masks it, and shifts it to
81 1.2.6.1 gehenna * the bottom of the register (retrieving a K_xxx
82 1.2.6.1 gehenna * value, for example).
83 1.2.6.1 gehenna *
84 1.2.6.1 gehenna * V_xxx(X) VALUE. This macro computes the value of a
85 1.2.6.1 gehenna * K_xxx constant shifted to the correct position
86 1.2.6.1 gehenna * in the register.
87 1.1 simonb ********************************************************************* */
88 1.1 simonb
89 1.1 simonb
90 1.1 simonb
91 1.1 simonb
92 1.1 simonb #ifndef _SB1250_DEFS_H
93 1.2.6.1 gehenna #define _SB1250_DEFS_H
94 1.1 simonb
95 1.1 simonb /*
96 1.2.6.1 gehenna * Cast to 64-bit number. Presumably the syntax is different in
97 1.1 simonb * assembly language.
98 1.1 simonb *
99 1.1 simonb * Note: you'll need to define uint32_t and uint64_t in your headers.
100 1.1 simonb */
101 1.1 simonb
102 1.1 simonb #if !defined(__ASSEMBLER__)
103 1.2.6.1 gehenna #define _SB_MAKE64(x) ((uint64_t)(x))
104 1.2.6.1 gehenna #define _SB_MAKE32(x) ((uint32_t)(x))
105 1.1 simonb #else
106 1.2.6.1 gehenna #define _SB_MAKE64(x) (x)
107 1.2.6.1 gehenna #define _SB_MAKE32(x) (x)
108 1.1 simonb #endif
109 1.1 simonb
110 1.1 simonb
111 1.1 simonb /*
112 1.1 simonb * Make a mask for 1 bit at position 'n'
113 1.1 simonb */
114 1.1 simonb
115 1.2.6.1 gehenna #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
116 1.2.6.1 gehenna #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
117 1.1 simonb
118 1.1 simonb /*
119 1.1 simonb * Make a mask for 'v' bits at position 'n'
120 1.1 simonb */
121 1.1 simonb
122 1.2.6.1 gehenna #define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
123 1.2.6.1 gehenna #define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
124 1.1 simonb
125 1.1 simonb /*
126 1.1 simonb * Make a value at 'v' at bit position 'n'
127 1.1 simonb */
128 1.1 simonb
129 1.2.6.1 gehenna #define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n))
130 1.2.6.1 gehenna #define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n))
131 1.1 simonb
132 1.2.6.1 gehenna #define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
133 1.2.6.1 gehenna #define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
134 1.1 simonb
135 1.1 simonb /*
136 1.1 simonb * Macros to read/write on-chip registers
137 1.2.6.1 gehenna * XXX should we do the PHYS_TO_K1 here?
138 1.1 simonb */
139 1.1 simonb
140 1.1 simonb
141 1.1 simonb #if !defined(__ASSEMBLER__)
142 1.2.6.1 gehenna #define SBWRITECSR(csr,val) *((volatile uint64_t *) MIPS_PHYS_TO_KSEG1(csr)) = (val)
143 1.2.6.1 gehenna #define SBREADCSR(csr) (*((volatile uint64_t *) MIPS_PHYS_TO_KSEG1(csr)))
144 1.1 simonb #endif /* __ASSEMBLER__ */
145 1.1 simonb
146 1.1 simonb #endif
147