sb1250_defs.h revision 1.4 1 1.1 simonb /* *********************************************************************
2 1.1 simonb * SB1250 Board Support Package
3 1.3 simonb *
4 1.3 simonb * Global constants and macros File: sb1250_defs.h
5 1.3 simonb *
6 1.1 simonb * This file contains macros and definitions used by the other
7 1.1 simonb * include files.
8 1.1 simonb *
9 1.3 simonb * SB1250 specification level: User's manual 1/02/02
10 1.3 simonb *
11 1.3 simonb * Author: Mitch Lichtenberg (mpl (at) broadcom.com)
12 1.3 simonb *
13 1.3 simonb *********************************************************************
14 1.1 simonb *
15 1.1 simonb * Copyright 2000,2001
16 1.1 simonb * Broadcom Corporation. All rights reserved.
17 1.3 simonb *
18 1.3 simonb * This software is furnished under license and may be used and
19 1.3 simonb * copied only in accordance with the following terms and
20 1.3 simonb * conditions. Subject to these conditions, you may download,
21 1.3 simonb * copy, install, use, modify and distribute modified or unmodified
22 1.3 simonb * copies of this software in source and/or binary form. No title
23 1.1 simonb * or ownership is transferred hereby.
24 1.3 simonb *
25 1.3 simonb * 1) Any source code used, modified or distributed must reproduce
26 1.3 simonb * and retain this copyright notice and list of conditions as
27 1.1 simonb * they appear in the source file.
28 1.3 simonb *
29 1.3 simonb * 2) No right is granted to use any trade name, trademark, or
30 1.3 simonb * logo of Broadcom Corporation. Neither the "Broadcom
31 1.3 simonb * Corporation" name nor any trademark or logo of Broadcom
32 1.3 simonb * Corporation may be used to endorse or promote products
33 1.3 simonb * derived from this software without the prior written
34 1.1 simonb * permission of Broadcom Corporation.
35 1.3 simonb *
36 1.1 simonb * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
37 1.3 simonb * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
38 1.3 simonb * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
39 1.3 simonb * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
40 1.3 simonb * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
41 1.3 simonb * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
42 1.3 simonb * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
43 1.3 simonb * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
44 1.1 simonb * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
45 1.3 simonb * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
46 1.3 simonb * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
47 1.3 simonb * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
48 1.1 simonb * THE POSSIBILITY OF SUCH DAMAGE.
49 1.1 simonb ********************************************************************* */
50 1.1 simonb
51 1.4 cgd #ifndef _SB1250_DEFS_H
52 1.4 cgd #define _SB1250_DEFS_H
53 1.4 cgd
54 1.4 cgd /*
55 1.4 cgd * These headers require ANSI C89 string concatenation, and GCC or other
56 1.4 cgd * 'long long' (64-bit integer) support.
57 1.4 cgd */
58 1.4 cgd #if !defined(__STDC__) && !defined(_MSC_VER)
59 1.4 cgd #error SiByte headers require ANSI C89 support
60 1.4 cgd #endif
61 1.4 cgd
62 1.4 cgd
63 1.4 cgd /* *********************************************************************
64 1.4 cgd * Macros for feature tests, used to enable include file features
65 1.4 cgd * for chip features only present in certain chip revisions.
66 1.4 cgd *
67 1.4 cgd * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
68 1.4 cgd * which is to be exposed by the headers. If undefined, it defaults to
69 1.4 cgd * "all features."
70 1.4 cgd *
71 1.4 cgd * Use like:
72 1.4 cgd *
73 1.4 cgd * #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1
74 1.4 cgd *
75 1.4 cgd * Generate defines only for that revision of chip.
76 1.4 cgd *
77 1.4 cgd * #if SIBYTE_HDR_FEATURE(chip,pass)
78 1.4 cgd *
79 1.4 cgd * True if header features for that revision or later of
80 1.4 cgd * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
81 1.4 cgd * (Use this to bracket #defines for features present in a given
82 1.4 cgd * revision and later.)
83 1.4 cgd *
84 1.4 cgd * Note that there is no implied ordering between chip types.
85 1.4 cgd *
86 1.4 cgd * Note also that 'chip' and 'pass' must textually exactly
87 1.4 cgd * match the defines below. So, for example,
88 1.4 cgd * SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
89 1.4 cgd * SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
90 1.4 cgd *
91 1.4 cgd * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
92 1.4 cgd *
93 1.4 cgd * Same as SIBYTE_HDR_FEATURE, but true for the named revision
94 1.4 cgd * and earlier revisions of the named chip type.
95 1.4 cgd *
96 1.4 cgd * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
97 1.4 cgd *
98 1.4 cgd * Same as SIBYTE_HDR_FEATURE, but only true for the named
99 1.4 cgd * revision of the named chip type. (Note that this CANNOT
100 1.4 cgd * be used to verify that you're compiling only for that
101 1.4 cgd * particular chip/revision. It will be true any time this
102 1.4 cgd * chip/revision is included in SIBYTE_HDR_FEATURES.)
103 1.4 cgd *
104 1.4 cgd * #if SIBYTE_HDR_FEATURE_CHIP(chip)
105 1.4 cgd *
106 1.4 cgd * True if header features for (any revision of) that chip type
107 1.4 cgd * are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket
108 1.4 cgd * #defines for features specific to a given chip type.)
109 1.4 cgd *
110 1.4 cgd * Mask values currently include room for additional revisions of each
111 1.4 cgd * chip type, but can be renumbered at will. Note that they MUST fit
112 1.4 cgd * into 31 bits and may not include C type constructs, for safe use in
113 1.4 cgd * CPP conditionals. Bit positions within chip types DO indicate
114 1.4 cgd * ordering, so be careful when adding support for new minor revs.
115 1.4 cgd ********************************************************************* */
116 1.4 cgd
117 1.4 cgd #define SIBYTE_HDR_FMASK_1250_ALL 0x00000ff
118 1.4 cgd #define SIBYTE_HDR_FMASK_1250_PASS1 0x0000001
119 1.4 cgd #define SIBYTE_HDR_FMASK_1250_PASS2 0x0000002
120 1.4 cgd
121 1.4 cgd #define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00
122 1.4 cgd #define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100
123 1.4 cgd #define SIBYTE_HDR_FMASK_112x_PASS3 0x0000200
124 1.4 cgd
125 1.4 cgd /* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
126 1.4 cgd #define SIBYTE_HDR_FMASK(chip, pass) \
127 1.4 cgd (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
128 1.4 cgd #define SIBYTE_HDR_FMASK_ALLREVS(chip) \
129 1.4 cgd (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
130 1.4 cgd
131 1.4 cgd #define SIBYTE_HDR_FMASK_ALL \
132 1.4 cgd (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
133 1.4 cgd
134 1.4 cgd #ifndef SIBYTE_HDR_FEATURES
135 1.4 cgd #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL
136 1.4 cgd #endif
137 1.4 cgd
138 1.4 cgd
139 1.4 cgd /* Bit mask for revisions of chip exclusively before the named revision. */
140 1.4 cgd #define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \
141 1.4 cgd ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
142 1.4 cgd
143 1.4 cgd /* Bit mask for revisions of chip exclusively after the named revision. */
144 1.4 cgd #define SIBYTE_HDR_FMASK_AFTER(chip, pass) \
145 1.4 cgd (~(SIBYTE_HDR_FMASK(chip, pass) \
146 1.4 cgd | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
147 1.4 cgd
148 1.4 cgd
149 1.4 cgd /* True if header features enabled for (any revision of) that chip type. */
150 1.4 cgd #define SIBYTE_HDR_FEATURE_CHIP(chip) \
151 1.4 cgd (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
152 1.4 cgd
153 1.4 cgd /* True if header features enabled for that rev or later, inclusive. */
154 1.4 cgd #define SIBYTE_HDR_FEATURE(chip, pass) \
155 1.4 cgd (!! ((SIBYTE_HDR_FMASK(chip, pass) \
156 1.4 cgd | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
157 1.4 cgd
158 1.4 cgd /* True if header features enabled for exactly that rev. */
159 1.4 cgd #define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \
160 1.4 cgd (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
161 1.4 cgd
162 1.4 cgd /* True if header features enabled for that rev or before, inclusive. */
163 1.4 cgd #define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \
164 1.4 cgd (!! ((SIBYTE_HDR_FMASK(chip, pass) \
165 1.4 cgd | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
166 1.4 cgd
167 1.1 simonb
168 1.1 simonb /* *********************************************************************
169 1.1 simonb * Naming schemes for constants in these files:
170 1.3 simonb *
171 1.3 simonb * M_xxx MASK constant (identifies bits in a register).
172 1.3 simonb * For multi-bit fields, all bits in the field will
173 1.3 simonb * be set.
174 1.3 simonb *
175 1.3 simonb * K_xxx "Code" constant (value for data in a multi-bit
176 1.3 simonb * field). The value is right justified.
177 1.3 simonb *
178 1.3 simonb * V_xxx "Value" constant. This is the same as the
179 1.3 simonb * corresponding "K_xxx" constant, except it is
180 1.3 simonb * shifted to the correct position in the register.
181 1.3 simonb *
182 1.3 simonb * S_xxx SHIFT constant. This is the number of bits that
183 1.3 simonb * a field value (code) needs to be shifted
184 1.3 simonb * (towards the left) to put the value in the right
185 1.3 simonb * position for the register.
186 1.3 simonb *
187 1.3 simonb * A_xxx ADDRESS constant. This will be a physical
188 1.3 simonb * address. Use the PHYS_TO_K1 macro to generate
189 1.3 simonb * a K1SEG address.
190 1.3 simonb *
191 1.3 simonb * R_xxx RELATIVE offset constant. This is an offset from
192 1.3 simonb * an A_xxx constant (usually the first register in
193 1.3 simonb * a group).
194 1.3 simonb *
195 1.3 simonb * G_xxx(X) GET value. This macro obtains a multi-bit field
196 1.3 simonb * from a register, masks it, and shifts it to
197 1.3 simonb * the bottom of the register (retrieving a K_xxx
198 1.3 simonb * value, for example).
199 1.3 simonb *
200 1.3 simonb * V_xxx(X) VALUE. This macro computes the value of a
201 1.3 simonb * K_xxx constant shifted to the correct position
202 1.3 simonb * in the register.
203 1.1 simonb ********************************************************************* */
204 1.1 simonb
205 1.1 simonb
206 1.1 simonb
207 1.1 simonb
208 1.1 simonb /*
209 1.3 simonb * Cast to 64-bit number. Presumably the syntax is different in
210 1.1 simonb * assembly language.
211 1.1 simonb *
212 1.1 simonb * Note: you'll need to define uint32_t and uint64_t in your headers.
213 1.1 simonb */
214 1.1 simonb
215 1.1 simonb #if !defined(__ASSEMBLER__)
216 1.3 simonb #define _SB_MAKE64(x) ((uint64_t)(x))
217 1.3 simonb #define _SB_MAKE32(x) ((uint32_t)(x))
218 1.1 simonb #else
219 1.3 simonb #define _SB_MAKE64(x) (x)
220 1.3 simonb #define _SB_MAKE32(x) (x)
221 1.1 simonb #endif
222 1.1 simonb
223 1.1 simonb
224 1.1 simonb /*
225 1.1 simonb * Make a mask for 1 bit at position 'n'
226 1.1 simonb */
227 1.1 simonb
228 1.3 simonb #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
229 1.3 simonb #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
230 1.1 simonb
231 1.1 simonb /*
232 1.1 simonb * Make a mask for 'v' bits at position 'n'
233 1.1 simonb */
234 1.1 simonb
235 1.3 simonb #define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
236 1.3 simonb #define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
237 1.1 simonb
238 1.1 simonb /*
239 1.1 simonb * Make a value at 'v' at bit position 'n'
240 1.1 simonb */
241 1.1 simonb
242 1.3 simonb #define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n))
243 1.3 simonb #define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n))
244 1.1 simonb
245 1.3 simonb #define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
246 1.3 simonb #define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
247 1.1 simonb
248 1.1 simonb /*
249 1.1 simonb * Macros to read/write on-chip registers
250 1.3 simonb * XXX should we do the PHYS_TO_K1 here?
251 1.1 simonb */
252 1.1 simonb
253 1.1 simonb
254 1.1 simonb #if !defined(__ASSEMBLER__)
255 1.4 cgd #define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
256 1.4 cgd #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
257 1.1 simonb #endif /* __ASSEMBLER__ */
258 1.1 simonb
259 1.1 simonb #endif
260