sb1250_defs.h revision 1.7 1 1.1 simonb /* *********************************************************************
2 1.1 simonb * SB1250 Board Support Package
3 1.3 simonb *
4 1.3 simonb * Global constants and macros File: sb1250_defs.h
5 1.3 simonb *
6 1.1 simonb * This file contains macros and definitions used by the other
7 1.1 simonb * include files.
8 1.1 simonb *
9 1.3 simonb * SB1250 specification level: User's manual 1/02/02
10 1.3 simonb *
11 1.3 simonb *********************************************************************
12 1.1 simonb *
13 1.7 simonb * Copyright 2000,2001,2002,2003,2004
14 1.1 simonb * Broadcom Corporation. All rights reserved.
15 1.3 simonb *
16 1.3 simonb * This software is furnished under license and may be used and
17 1.3 simonb * copied only in accordance with the following terms and
18 1.3 simonb * conditions. Subject to these conditions, you may download,
19 1.3 simonb * copy, install, use, modify and distribute modified or unmodified
20 1.3 simonb * copies of this software in source and/or binary form. No title
21 1.1 simonb * or ownership is transferred hereby.
22 1.3 simonb *
23 1.3 simonb * 1) Any source code used, modified or distributed must reproduce
24 1.5 cgd * and retain this copyright notice and list of conditions
25 1.5 cgd * as they appear in the source file.
26 1.3 simonb *
27 1.3 simonb * 2) No right is granted to use any trade name, trademark, or
28 1.5 cgd * logo of Broadcom Corporation. The "Broadcom Corporation"
29 1.5 cgd * name may not be used to endorse or promote products derived
30 1.5 cgd * from this software without the prior written permission of
31 1.5 cgd * Broadcom Corporation.
32 1.3 simonb *
33 1.1 simonb * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
34 1.5 cgd * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
35 1.3 simonb * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
36 1.3 simonb * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
37 1.3 simonb * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
38 1.5 cgd * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
39 1.3 simonb * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
40 1.5 cgd * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
41 1.1 simonb * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
42 1.3 simonb * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
43 1.3 simonb * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
44 1.3 simonb * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
45 1.1 simonb * THE POSSIBILITY OF SUCH DAMAGE.
46 1.1 simonb ********************************************************************* */
47 1.1 simonb
48 1.4 cgd #ifndef _SB1250_DEFS_H
49 1.4 cgd #define _SB1250_DEFS_H
50 1.4 cgd
51 1.4 cgd /*
52 1.4 cgd * These headers require ANSI C89 string concatenation, and GCC or other
53 1.4 cgd * 'long long' (64-bit integer) support.
54 1.4 cgd */
55 1.4 cgd #if !defined(__STDC__) && !defined(_MSC_VER)
56 1.4 cgd #error SiByte headers require ANSI C89 support
57 1.4 cgd #endif
58 1.4 cgd
59 1.4 cgd
60 1.4 cgd /* *********************************************************************
61 1.4 cgd * Macros for feature tests, used to enable include file features
62 1.4 cgd * for chip features only present in certain chip revisions.
63 1.4 cgd *
64 1.4 cgd * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
65 1.4 cgd * which is to be exposed by the headers. If undefined, it defaults to
66 1.4 cgd * "all features."
67 1.4 cgd *
68 1.4 cgd * Use like:
69 1.4 cgd *
70 1.4 cgd * #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1
71 1.4 cgd *
72 1.4 cgd * Generate defines only for that revision of chip.
73 1.4 cgd *
74 1.4 cgd * #if SIBYTE_HDR_FEATURE(chip,pass)
75 1.4 cgd *
76 1.4 cgd * True if header features for that revision or later of
77 1.4 cgd * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
78 1.4 cgd * (Use this to bracket #defines for features present in a given
79 1.4 cgd * revision and later.)
80 1.4 cgd *
81 1.4 cgd * Note that there is no implied ordering between chip types.
82 1.4 cgd *
83 1.4 cgd * Note also that 'chip' and 'pass' must textually exactly
84 1.4 cgd * match the defines below. So, for example,
85 1.4 cgd * SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
86 1.4 cgd * SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
87 1.4 cgd *
88 1.4 cgd * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
89 1.4 cgd *
90 1.4 cgd * Same as SIBYTE_HDR_FEATURE, but true for the named revision
91 1.4 cgd * and earlier revisions of the named chip type.
92 1.4 cgd *
93 1.4 cgd * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
94 1.4 cgd *
95 1.4 cgd * Same as SIBYTE_HDR_FEATURE, but only true for the named
96 1.4 cgd * revision of the named chip type. (Note that this CANNOT
97 1.4 cgd * be used to verify that you're compiling only for that
98 1.4 cgd * particular chip/revision. It will be true any time this
99 1.4 cgd * chip/revision is included in SIBYTE_HDR_FEATURES.)
100 1.4 cgd *
101 1.4 cgd * #if SIBYTE_HDR_FEATURE_CHIP(chip)
102 1.4 cgd *
103 1.4 cgd * True if header features for (any revision of) that chip type
104 1.4 cgd * are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket
105 1.4 cgd * #defines for features specific to a given chip type.)
106 1.4 cgd *
107 1.4 cgd * Mask values currently include room for additional revisions of each
108 1.4 cgd * chip type, but can be renumbered at will. Note that they MUST fit
109 1.4 cgd * into 31 bits and may not include C type constructs, for safe use in
110 1.4 cgd * CPP conditionals. Bit positions within chip types DO indicate
111 1.4 cgd * ordering, so be careful when adding support for new minor revs.
112 1.4 cgd ********************************************************************* */
113 1.4 cgd
114 1.6 cgd #define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff
115 1.6 cgd #define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001
116 1.6 cgd #define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002
117 1.6 cgd #define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004
118 1.6 cgd
119 1.6 cgd #define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00
120 1.6 cgd #define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100
121 1.6 cgd
122 1.7 simonb #define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000
123 1.7 simonb #define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000
124 1.7 simonb #define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000
125 1.4 cgd
126 1.4 cgd /* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
127 1.4 cgd #define SIBYTE_HDR_FMASK(chip, pass) \
128 1.4 cgd (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
129 1.4 cgd #define SIBYTE_HDR_FMASK_ALLREVS(chip) \
130 1.4 cgd (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
131 1.4 cgd
132 1.7 simonb /* Default constant value for all chips, all revisions */
133 1.4 cgd #define SIBYTE_HDR_FMASK_ALL \
134 1.7 simonb (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \
135 1.7 simonb | SIBYTE_HDR_FMASK_1480_ALL)
136 1.7 simonb
137 1.7 simonb /* This one is used for the "original" BCM1250/BCM112x chips. We use this
138 1.7 simonb to weed out constants and macros that do not exist on later chips like
139 1.7 simonb the BCM1480 */
140 1.7 simonb #define SIBYTE_HDR_FMASK_1250_112x_ALL \
141 1.7 simonb (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
142 1.7 simonb #define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
143 1.4 cgd
144 1.4 cgd #ifndef SIBYTE_HDR_FEATURES
145 1.4 cgd #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL
146 1.4 cgd #endif
147 1.4 cgd
148 1.4 cgd
149 1.4 cgd /* Bit mask for revisions of chip exclusively before the named revision. */
150 1.4 cgd #define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \
151 1.4 cgd ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
152 1.4 cgd
153 1.4 cgd /* Bit mask for revisions of chip exclusively after the named revision. */
154 1.4 cgd #define SIBYTE_HDR_FMASK_AFTER(chip, pass) \
155 1.4 cgd (~(SIBYTE_HDR_FMASK(chip, pass) \
156 1.4 cgd | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
157 1.4 cgd
158 1.4 cgd
159 1.4 cgd /* True if header features enabled for (any revision of) that chip type. */
160 1.4 cgd #define SIBYTE_HDR_FEATURE_CHIP(chip) \
161 1.4 cgd (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
162 1.4 cgd
163 1.7 simonb /* True for all versions of the BCM1250 and BCM1125, but not true for
164 1.7 simonb anything else */
165 1.7 simonb #define SIBYTE_HDR_FEATURE_1250_112x \
166 1.7 simonb (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
167 1.7 simonb /* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
168 1.7 simonb
169 1.4 cgd /* True if header features enabled for that rev or later, inclusive. */
170 1.4 cgd #define SIBYTE_HDR_FEATURE(chip, pass) \
171 1.4 cgd (!! ((SIBYTE_HDR_FMASK(chip, pass) \
172 1.4 cgd | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
173 1.4 cgd
174 1.4 cgd /* True if header features enabled for exactly that rev. */
175 1.4 cgd #define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \
176 1.4 cgd (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
177 1.4 cgd
178 1.4 cgd /* True if header features enabled for that rev or before, inclusive. */
179 1.4 cgd #define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \
180 1.4 cgd (!! ((SIBYTE_HDR_FMASK(chip, pass) \
181 1.4 cgd | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
182 1.4 cgd
183 1.1 simonb
184 1.1 simonb /* *********************************************************************
185 1.1 simonb * Naming schemes for constants in these files:
186 1.3 simonb *
187 1.3 simonb * M_xxx MASK constant (identifies bits in a register).
188 1.3 simonb * For multi-bit fields, all bits in the field will
189 1.3 simonb * be set.
190 1.3 simonb *
191 1.3 simonb * K_xxx "Code" constant (value for data in a multi-bit
192 1.3 simonb * field). The value is right justified.
193 1.3 simonb *
194 1.3 simonb * V_xxx "Value" constant. This is the same as the
195 1.3 simonb * corresponding "K_xxx" constant, except it is
196 1.3 simonb * shifted to the correct position in the register.
197 1.3 simonb *
198 1.3 simonb * S_xxx SHIFT constant. This is the number of bits that
199 1.3 simonb * a field value (code) needs to be shifted
200 1.3 simonb * (towards the left) to put the value in the right
201 1.3 simonb * position for the register.
202 1.3 simonb *
203 1.3 simonb * A_xxx ADDRESS constant. This will be a physical
204 1.3 simonb * address. Use the PHYS_TO_K1 macro to generate
205 1.3 simonb * a K1SEG address.
206 1.3 simonb *
207 1.3 simonb * R_xxx RELATIVE offset constant. This is an offset from
208 1.3 simonb * an A_xxx constant (usually the first register in
209 1.3 simonb * a group).
210 1.3 simonb *
211 1.3 simonb * G_xxx(X) GET value. This macro obtains a multi-bit field
212 1.3 simonb * from a register, masks it, and shifts it to
213 1.3 simonb * the bottom of the register (retrieving a K_xxx
214 1.3 simonb * value, for example).
215 1.3 simonb *
216 1.3 simonb * V_xxx(X) VALUE. This macro computes the value of a
217 1.3 simonb * K_xxx constant shifted to the correct position
218 1.3 simonb * in the register.
219 1.1 simonb ********************************************************************* */
220 1.1 simonb
221 1.1 simonb
222 1.1 simonb
223 1.1 simonb
224 1.1 simonb /*
225 1.3 simonb * Cast to 64-bit number. Presumably the syntax is different in
226 1.1 simonb * assembly language.
227 1.1 simonb *
228 1.1 simonb * Note: you'll need to define uint32_t and uint64_t in your headers.
229 1.1 simonb */
230 1.1 simonb
231 1.1 simonb #if !defined(__ASSEMBLER__)
232 1.3 simonb #define _SB_MAKE64(x) ((uint64_t)(x))
233 1.3 simonb #define _SB_MAKE32(x) ((uint32_t)(x))
234 1.1 simonb #else
235 1.3 simonb #define _SB_MAKE64(x) (x)
236 1.3 simonb #define _SB_MAKE32(x) (x)
237 1.1 simonb #endif
238 1.1 simonb
239 1.1 simonb
240 1.1 simonb /*
241 1.1 simonb * Make a mask for 1 bit at position 'n'
242 1.1 simonb */
243 1.1 simonb
244 1.3 simonb #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
245 1.3 simonb #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
246 1.1 simonb
247 1.1 simonb /*
248 1.1 simonb * Make a mask for 'v' bits at position 'n'
249 1.1 simonb */
250 1.1 simonb
251 1.3 simonb #define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
252 1.3 simonb #define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
253 1.1 simonb
254 1.1 simonb /*
255 1.1 simonb * Make a value at 'v' at bit position 'n'
256 1.1 simonb */
257 1.1 simonb
258 1.3 simonb #define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n))
259 1.3 simonb #define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n))
260 1.1 simonb
261 1.3 simonb #define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
262 1.3 simonb #define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
263 1.1 simonb
264 1.1 simonb /*
265 1.1 simonb * Macros to read/write on-chip registers
266 1.3 simonb * XXX should we do the PHYS_TO_K1 here?
267 1.1 simonb */
268 1.1 simonb
269 1.1 simonb
270 1.6 cgd #if defined(__mips64) && !defined(__ASSEMBLER__)
271 1.4 cgd #define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
272 1.4 cgd #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
273 1.1 simonb #endif /* __ASSEMBLER__ */
274 1.1 simonb
275 1.1 simonb #endif
276 1.7 simonb
277