sb1250_ldt.h revision 1.1 1 1.1 simonb /* *********************************************************************
2 1.1 simonb * SB1250 Board Support Package
3 1.1 simonb *
4 1.1 simonb * LDT constants File: sb1250_ldt.h
5 1.1 simonb *
6 1.1 simonb * This module contains constants and macros to describe
7 1.1 simonb * the LDT interface on the SB1250.
8 1.1 simonb *
9 1.1 simonb * SB1250 specification level: User's manual 1/02/02
10 1.1 simonb *
11 1.1 simonb * Author: Mitch Lichtenberg (mpl (at) broadcom.com)
12 1.1 simonb *
13 1.1 simonb *********************************************************************
14 1.1 simonb *
15 1.1 simonb * Copyright 2000,2001
16 1.1 simonb * Broadcom Corporation. All rights reserved.
17 1.1 simonb *
18 1.1 simonb * This software is furnished under license and may be used and
19 1.1 simonb * copied only in accordance with the following terms and
20 1.1 simonb * conditions. Subject to these conditions, you may download,
21 1.1 simonb * copy, install, use, modify and distribute modified or unmodified
22 1.1 simonb * copies of this software in source and/or binary form. No title
23 1.1 simonb * or ownership is transferred hereby.
24 1.1 simonb *
25 1.1 simonb * 1) Any source code used, modified or distributed must reproduce
26 1.1 simonb * and retain this copyright notice and list of conditions as
27 1.1 simonb * they appear in the source file.
28 1.1 simonb *
29 1.1 simonb * 2) No right is granted to use any trade name, trademark, or
30 1.1 simonb * logo of Broadcom Corporation. Neither the "Broadcom
31 1.1 simonb * Corporation" name nor any trademark or logo of Broadcom
32 1.1 simonb * Corporation may be used to endorse or promote products
33 1.1 simonb * derived from this software without the prior written
34 1.1 simonb * permission of Broadcom Corporation.
35 1.1 simonb *
36 1.1 simonb * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
37 1.1 simonb * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
38 1.1 simonb * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
39 1.1 simonb * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
40 1.1 simonb * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
41 1.1 simonb * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
42 1.1 simonb * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
43 1.1 simonb * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
44 1.1 simonb * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
45 1.1 simonb * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
46 1.1 simonb * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
47 1.1 simonb * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
48 1.1 simonb * THE POSSIBILITY OF SUCH DAMAGE.
49 1.1 simonb ********************************************************************* */
50 1.1 simonb
51 1.1 simonb
52 1.1 simonb #ifndef _SB1250_LDT_H
53 1.1 simonb #define _SB1250_LDT_H
54 1.1 simonb
55 1.1 simonb #include "sb1250_defs.h"
56 1.1 simonb
57 1.1 simonb #define K_LDT_VENDOR_SIBYTE 0x166D
58 1.1 simonb #define K_LDT_DEVICE_SB1250 0x0002
59 1.1 simonb
60 1.1 simonb /*
61 1.1 simonb * LDT Interface Type 1 (bridge) configuration header
62 1.1 simonb */
63 1.1 simonb
64 1.1 simonb #define R_LDT_TYPE1_DEVICEID 0x0000
65 1.1 simonb #define R_LDT_TYPE1_CMDSTATUS 0x0004
66 1.1 simonb #define R_LDT_TYPE1_CLASSREV 0x0008
67 1.1 simonb #define R_LDT_TYPE1_DEVHDR 0x000C
68 1.1 simonb #define R_LDT_TYPE1_BAR0 0x0010 /* not used */
69 1.1 simonb #define R_LDT_TYPE1_BAR1 0x0014 /* not used */
70 1.1 simonb
71 1.1 simonb #define R_LDT_TYPE1_BUSID 0x0018 /* bus ID register */
72 1.1 simonb #define R_LDT_TYPE1_SECSTATUS 0x001C /* secondary status / I/O base/limit */
73 1.1 simonb #define R_LDT_TYPE1_MEMLIMIT 0x0020
74 1.1 simonb #define R_LDT_TYPE1_PREFETCH 0x0024
75 1.1 simonb #define R_LDT_TYPE1_PREF_BASE 0x0028
76 1.1 simonb #define R_LDT_TYPE1_PREF_LIMIT 0x002C
77 1.1 simonb #define R_LDT_TYPE1_IOLIMIT 0x0030
78 1.1 simonb #define R_LDT_TYPE1_CAPPTR 0x0034
79 1.1 simonb #define R_LDT_TYPE1_ROMADDR 0x0038
80 1.1 simonb #define R_LDT_TYPE1_BRCTL 0x003C
81 1.1 simonb #define R_LDT_TYPE1_CMD 0x0040
82 1.1 simonb #define R_LDT_TYPE1_LINKCTRL 0x0044
83 1.1 simonb #define R_LDT_TYPE1_LINKFREQ 0x0048
84 1.1 simonb #define R_LDT_TYPE1_RESERVED1 0x004C
85 1.1 simonb #define R_LDT_TYPE1_SRICMD 0x0050
86 1.1 simonb #define R_LDT_TYPE1_SRITXNUM 0x0054
87 1.1 simonb #define R_LDT_TYPE1_SRIRXNUM 0x0058
88 1.1 simonb #define R_LDT_TYPE1_ERRSTATUS 0x0068
89 1.1 simonb #define R_LDT_TYPE1_SRICTRL 0x006C
90 1.1 simonb #define R_LDT_TYPE1_ADDSTATUS 0x0070 /* PASS2 */
91 1.1 simonb #define R_LDT_TYPE1_TXBUFCNT 0x00C8
92 1.1 simonb #define R_LDT_TYPE1_EXPCRC 0x00DC
93 1.1 simonb #define R_LDT_TYPE1_RXCRC 0x00F0
94 1.1 simonb
95 1.1 simonb
96 1.1 simonb /*
97 1.1 simonb * LDT Device ID register
98 1.1 simonb */
99 1.1 simonb
100 1.1 simonb #define S_LDT_DEVICEID_VENDOR 0
101 1.1 simonb #define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR)
102 1.1 simonb #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR)
103 1.1 simonb #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR)
104 1.1 simonb
105 1.1 simonb #define S_LDT_DEVICEID_DEVICEID 16
106 1.1 simonb #define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID)
107 1.1 simonb #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID)
108 1.1 simonb #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID)
109 1.1 simonb
110 1.1 simonb
111 1.1 simonb /*
112 1.1 simonb * LDT Command Register (Table 8-13)
113 1.1 simonb */
114 1.1 simonb
115 1.1 simonb #define M_LDT_CMD_IOSPACE_EN _SB_MAKEMASK1_32(0)
116 1.1 simonb #define M_LDT_CMD_MEMSPACE_EN _SB_MAKEMASK1_32(1)
117 1.1 simonb #define M_LDT_CMD_MASTER_EN _SB_MAKEMASK1_32(2)
118 1.1 simonb #define M_LDT_CMD_SPECCYC_EN _SB_MAKEMASK1_32(3)
119 1.1 simonb #define M_LDT_CMD_MEMWRINV_EN _SB_MAKEMASK1_32(4)
120 1.1 simonb #define M_LDT_CMD_VGAPALSNP_EN _SB_MAKEMASK1_32(5)
121 1.1 simonb #define M_LDT_CMD_PARERRRESP _SB_MAKEMASK1_32(6)
122 1.1 simonb #define M_LDT_CMD_WAITCYCCTRL _SB_MAKEMASK1_32(7)
123 1.1 simonb #define M_LDT_CMD_SERR_EN _SB_MAKEMASK1_32(8)
124 1.1 simonb #define M_LDT_CMD_FASTB2B_EN _SB_MAKEMASK1_32(9)
125 1.1 simonb
126 1.1 simonb /*
127 1.1 simonb * LDT class and revision registers
128 1.1 simonb */
129 1.1 simonb
130 1.1 simonb #define S_LDT_CLASSREV_REV 0
131 1.1 simonb #define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV)
132 1.1 simonb #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV)
133 1.1 simonb #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV)
134 1.1 simonb
135 1.1 simonb #define S_LDT_CLASSREV_CLASS 8
136 1.1 simonb #define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS)
137 1.1 simonb #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS)
138 1.1 simonb #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS)
139 1.1 simonb
140 1.1 simonb #define K_LDT_REV 0x01
141 1.1 simonb #define K_LDT_CLASS 0x060000
142 1.1 simonb
143 1.1 simonb /*
144 1.1 simonb * Device Header (offset 0x0C)
145 1.1 simonb */
146 1.1 simonb
147 1.1 simonb #define S_LDT_DEVHDR_CLINESZ 0
148 1.1 simonb #define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ)
149 1.1 simonb #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ)
150 1.1 simonb #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ)
151 1.1 simonb
152 1.1 simonb #define S_LDT_DEVHDR_LATTMR 8
153 1.1 simonb #define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR)
154 1.1 simonb #define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR)
155 1.1 simonb #define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR)
156 1.1 simonb
157 1.1 simonb #define S_LDT_DEVHDR_HDRTYPE 16
158 1.1 simonb #define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE)
159 1.1 simonb #define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE)
160 1.1 simonb #define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE)
161 1.1 simonb
162 1.1 simonb #define K_LDT_DEVHDR_HDRTYPE_TYPE1 1
163 1.1 simonb
164 1.1 simonb #define S_LDT_DEVHDR_BIST 24
165 1.1 simonb #define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST)
166 1.1 simonb #define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST)
167 1.1 simonb #define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST)
168 1.1 simonb
169 1.1 simonb
170 1.1 simonb
171 1.1 simonb /*
172 1.1 simonb * LDT Status Register (Table 8-14). Note that these constants
173 1.1 simonb * assume you've read the command and status register
174 1.1 simonb * together (32-bit read at offset 0x04)
175 1.1 simonb *
176 1.1 simonb * These bits also apply to the secondary status
177 1.1 simonb * register (Table 8-15), offset 0x1C
178 1.1 simonb */
179 1.1 simonb
180 1.1 simonb #define M_LDT_STATUS_VGAEN _SB_MAKEMASK1_32(3) /* PASS2 */
181 1.1 simonb #define M_LDT_STATUS_CAPLIST _SB_MAKEMASK1_32(20)
182 1.1 simonb #define M_LDT_STATUS_66MHZCAP _SB_MAKEMASK1_32(21)
183 1.1 simonb #define M_LDT_STATUS_RESERVED2 _SB_MAKEMASK1_32(22)
184 1.1 simonb #define M_LDT_STATUS_FASTB2BCAP _SB_MAKEMASK1_32(23)
185 1.1 simonb #define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24)
186 1.1 simonb
187 1.1 simonb #define S_LDT_STATUS_DEVSELTIMING 25
188 1.1 simonb #define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING)
189 1.1 simonb #define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING)
190 1.1 simonb #define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING)
191 1.1 simonb
192 1.1 simonb #define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27)
193 1.1 simonb #define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28)
194 1.1 simonb #define M_LDT_STATUS_RCVDMSTRABORT _SB_MAKEMASK1_32(29)
195 1.1 simonb #define M_LDT_STATUS_SIGDSERR _SB_MAKEMASK1_32(30)
196 1.1 simonb #define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
197 1.1 simonb
198 1.1 simonb /*
199 1.1 simonb * Bridge Control Register (Table 8-16). Note that these
200 1.1 simonb * constants assume you've read the register as a 32-bit
201 1.1 simonb * read (offset 0x3C)
202 1.1 simonb */
203 1.1 simonb
204 1.1 simonb #define M_LDT_BRCTL_PARERRRESP_EN _SB_MAKEMASK1_32(16)
205 1.1 simonb #define M_LDT_BRCTL_SERR_EN _SB_MAKEMASK1_32(17)
206 1.1 simonb #define M_LDT_BRCTL_ISA_EN _SB_MAKEMASK1_32(18)
207 1.1 simonb #define M_LDT_BRCTL_VGA_EN _SB_MAKEMASK1_32(19)
208 1.1 simonb #define M_LDT_BRCTL_MSTRABORTMODE _SB_MAKEMASK1_32(21)
209 1.1 simonb #define M_LDT_BRCTL_SECBUSRESET _SB_MAKEMASK1_32(22)
210 1.1 simonb #define M_LDT_BRCTL_FASTB2B_EN _SB_MAKEMASK1_32(23)
211 1.1 simonb #define M_LDT_BRCTL_PRIDISCARD _SB_MAKEMASK1_32(24)
212 1.1 simonb #define M_LDT_BRCTL_SECDISCARD _SB_MAKEMASK1_32(25)
213 1.1 simonb #define M_LDT_BRCTL_DISCARDSTAT _SB_MAKEMASK1_32(26)
214 1.1 simonb #define M_LDT_BRCTL_DISCARDSERR_EN _SB_MAKEMASK1_32(27)
215 1.1 simonb
216 1.1 simonb /*
217 1.1 simonb * LDT Command Register (Table 8-17). Note that these constants
218 1.1 simonb * assume you've read the command and status register together
219 1.1 simonb * 32-bit read at offset 0x40
220 1.1 simonb */
221 1.1 simonb
222 1.1 simonb #define M_LDT_CMD_WARMRESET _SB_MAKEMASK1_32(16)
223 1.1 simonb #define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17)
224 1.1 simonb
225 1.1 simonb #define S_LDT_CMD_CAPTYPE 29
226 1.1 simonb #define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE)
227 1.1 simonb #define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE)
228 1.1 simonb #define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE)
229 1.1 simonb
230 1.1 simonb /*
231 1.1 simonb * LDT link control register (Table 8-18), and (Table 8-19)
232 1.1 simonb */
233 1.1 simonb
234 1.1 simonb #define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN _SB_MAKEMASK1_32(1)
235 1.1 simonb #define M_LDT_LINKCTRL_CRCSTARTTEST _SB_MAKEMASK1_32(2)
236 1.1 simonb #define M_LDT_LINKCTRL_CRCFORCEERR _SB_MAKEMASK1_32(3)
237 1.1 simonb #define M_LDT_LINKCTRL_LINKFAIL _SB_MAKEMASK1_32(4)
238 1.1 simonb #define M_LDT_LINKCTRL_INITDONE _SB_MAKEMASK1_32(5)
239 1.1 simonb #define M_LDT_LINKCTRL_EOC _SB_MAKEMASK1_32(6)
240 1.1 simonb #define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7)
241 1.1 simonb
242 1.1 simonb #define S_LDT_LINKCTRL_CRCERR 8
243 1.1 simonb #define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR)
244 1.1 simonb #define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR)
245 1.1 simonb #define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR)
246 1.1 simonb
247 1.1 simonb #define S_LDT_LINKCTRL_MAXIN 16
248 1.1 simonb #define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN)
249 1.1 simonb #define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN)
250 1.1 simonb #define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN)
251 1.1 simonb
252 1.1 simonb #define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19)
253 1.1 simonb
254 1.1 simonb #define S_LDT_LINKCTRL_MAXOUT 20
255 1.1 simonb #define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT)
256 1.1 simonb #define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT)
257 1.1 simonb #define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT)
258 1.1 simonb
259 1.1 simonb #define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23)
260 1.1 simonb
261 1.1 simonb #define S_LDT_LINKCTRL_WIDTHIN 24
262 1.1 simonb #define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN)
263 1.1 simonb #define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN)
264 1.1 simonb #define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN)
265 1.1 simonb
266 1.1 simonb #define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27)
267 1.1 simonb
268 1.1 simonb #define S_LDT_LINKCTRL_WIDTHOUT 28
269 1.1 simonb #define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT)
270 1.1 simonb #define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT)
271 1.1 simonb #define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT)
272 1.1 simonb
273 1.1 simonb #define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31)
274 1.1 simonb
275 1.1 simonb /*
276 1.1 simonb * LDT Link frequency register (Table 8-20) offset 0x48
277 1.1 simonb */
278 1.1 simonb
279 1.1 simonb #define S_LDT_LINKFREQ_FREQ 8
280 1.1 simonb #define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ)
281 1.1 simonb #define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ)
282 1.1 simonb #define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ)
283 1.1 simonb
284 1.1 simonb #define K_LDT_LINKFREQ_200MHZ 0
285 1.1 simonb #define K_LDT_LINKFREQ_300MHZ 1
286 1.1 simonb #define K_LDT_LINKFREQ_400MHZ 2
287 1.1 simonb #define K_LDT_LINKFREQ_500MHZ 3
288 1.1 simonb #define K_LDT_LINKFREQ_600MHZ 4
289 1.1 simonb #define K_LDT_LINKFREQ_800MHZ 5
290 1.1 simonb #define K_LDT_LINKFREQ_1000MHZ 6
291 1.1 simonb
292 1.1 simonb /*
293 1.1 simonb * LDT SRI Command Register (Table 8-21). Note that these constants
294 1.1 simonb * assume you've read the command and status register together
295 1.1 simonb * 32-bit read at offset 0x50
296 1.1 simonb */
297 1.1 simonb
298 1.1 simonb #define M_LDT_SRICMD_SIPREADY _SB_MAKEMASK1_32(16)
299 1.1 simonb #define M_LDT_SRICMD_SYNCPTRCTL _SB_MAKEMASK1_32(17)
300 1.1 simonb #define M_LDT_SRICMD_REDUCESYNCZERO _SB_MAKEMASK1_32(18)
301 1.1 simonb /*#define M_LDT_SRICMD_DISSTARVATIONCNT _SB_MAKEMASK1_32(19) */ /* PASS1 */
302 1.1 simonb #define M_LDT_SRICMD_DISMULTTXVLD _SB_MAKEMASK1_32(19) /* PASS2 */
303 1.1 simonb #define M_LDT_SRICMD_EXPENDIAN _SB_MAKEMASK1_32(26) /* PASS2 */
304 1.1 simonb
305 1.1 simonb
306 1.1 simonb #define S_LDT_SRICMD_RXMARGIN 20
307 1.1 simonb #define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN)
308 1.1 simonb #define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN)
309 1.1 simonb #define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN)
310 1.1 simonb
311 1.1 simonb #define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25)
312 1.1 simonb
313 1.1 simonb #define S_LDT_SRICMD_TXINITIALOFFSET 28
314 1.1 simonb #define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET)
315 1.1 simonb #define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET)
316 1.1 simonb #define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET)
317 1.1 simonb
318 1.1 simonb #define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31)
319 1.1 simonb
320 1.1 simonb /*
321 1.1 simonb * LDT Error control and status register (Table 8-22) (Table 8-23)
322 1.1 simonb */
323 1.1 simonb
324 1.1 simonb #define M_LDT_ERRCTL_PROTFATAL_EN _SB_MAKEMASK1_32(0)
325 1.1 simonb #define M_LDT_ERRCTL_PROTNONFATAL_EN _SB_MAKEMASK1_32(1)
326 1.1 simonb #define M_LDT_ERRCTL_PROTSYNCFLOOD_EN _SB_MAKEMASK1_32(2)
327 1.1 simonb #define M_LDT_ERRCTL_OVFFATAL_EN _SB_MAKEMASK1_32(3)
328 1.1 simonb #define M_LDT_ERRCTL_OVFNONFATAL_EN _SB_MAKEMASK1_32(4)
329 1.1 simonb #define M_LDT_ERRCTL_OVFSYNCFLOOD_EN _SB_MAKEMASK1_32(5)
330 1.1 simonb #define M_LDT_ERRCTL_EOCNXAFATAL_EN _SB_MAKEMASK1_32(6)
331 1.1 simonb #define M_LDT_ERRCTL_EOCNXANONFATAL_EN _SB_MAKEMASK1_32(7)
332 1.1 simonb #define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN _SB_MAKEMASK1_32(8)
333 1.1 simonb #define M_LDT_ERRCTL_CRCFATAL_EN _SB_MAKEMASK1_32(9)
334 1.1 simonb #define M_LDT_ERRCTL_CRCNONFATAL_EN _SB_MAKEMASK1_32(10)
335 1.1 simonb #define M_LDT_ERRCTL_SERRFATAL_EN _SB_MAKEMASK1_32(11)
336 1.1 simonb #define M_LDT_ERRCTL_SRCTAGFATAL_EN _SB_MAKEMASK1_32(12)
337 1.1 simonb #define M_LDT_ERRCTL_SRCTAGNONFATAL_EN _SB_MAKEMASK1_32(13)
338 1.1 simonb #define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN _SB_MAKEMASK1_32(14)
339 1.1 simonb #define M_LDT_ERRCTL_MAPNXAFATAL_EN _SB_MAKEMASK1_32(15)
340 1.1 simonb #define M_LDT_ERRCTL_MAPNXANONFATAL_EN _SB_MAKEMASK1_32(16)
341 1.1 simonb #define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN _SB_MAKEMASK1_32(17)
342 1.1 simonb
343 1.1 simonb #define M_LDT_ERRCTL_PROTOERR _SB_MAKEMASK1_32(24)
344 1.1 simonb #define M_LDT_ERRCTL_OVFERR _SB_MAKEMASK1_32(25)
345 1.1 simonb #define M_LDT_ERRCTL_EOCNXAERR _SB_MAKEMASK1_32(26)
346 1.1 simonb #define M_LDT_ERRCTL_SRCTAGERR _SB_MAKEMASK1_32(27)
347 1.1 simonb #define M_LDT_ERRCTL_MAPNXAERR _SB_MAKEMASK1_32(28)
348 1.1 simonb
349 1.1 simonb /*
350 1.1 simonb * SRI Control register (Table 8-24, 8-25) Offset 0x6C
351 1.1 simonb */
352 1.1 simonb
353 1.1 simonb #define S_LDT_SRICTRL_NEEDRESP 0
354 1.1 simonb #define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP)
355 1.1 simonb #define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP)
356 1.1 simonb #define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP)
357 1.1 simonb
358 1.1 simonb #define S_LDT_SRICTRL_NEEDNPREQ 2
359 1.1 simonb #define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ)
360 1.1 simonb #define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ)
361 1.1 simonb #define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ)
362 1.1 simonb
363 1.1 simonb #define S_LDT_SRICTRL_NEEDPREQ 4
364 1.1 simonb #define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ)
365 1.1 simonb #define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ)
366 1.1 simonb #define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ)
367 1.1 simonb
368 1.1 simonb #define S_LDT_SRICTRL_WANTRESP 8
369 1.1 simonb #define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP)
370 1.1 simonb #define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP)
371 1.1 simonb #define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP)
372 1.1 simonb
373 1.1 simonb #define S_LDT_SRICTRL_WANTNPREQ 10
374 1.1 simonb #define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ)
375 1.1 simonb #define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ)
376 1.1 simonb #define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ)
377 1.1 simonb
378 1.1 simonb #define S_LDT_SRICTRL_WANTPREQ 12
379 1.1 simonb #define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ)
380 1.1 simonb #define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ)
381 1.1 simonb #define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ)
382 1.1 simonb
383 1.1 simonb #define S_LDT_SRICTRL_BUFRELSPACE 16
384 1.1 simonb #define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE)
385 1.1 simonb #define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE)
386 1.1 simonb #define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE)
387 1.1 simonb
388 1.1 simonb /*
389 1.1 simonb * LDT SRI Transmit Buffer Count register (Table 8-26)
390 1.1 simonb */
391 1.1 simonb
392 1.1 simonb #define S_LDT_TXBUFCNT_PCMD 0
393 1.1 simonb #define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD)
394 1.1 simonb #define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD)
395 1.1 simonb #define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD)
396 1.1 simonb
397 1.1 simonb #define S_LDT_TXBUFCNT_PDATA 4
398 1.1 simonb #define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA)
399 1.1 simonb #define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA)
400 1.1 simonb #define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA)
401 1.1 simonb
402 1.1 simonb #define S_LDT_TXBUFCNT_NPCMD 8
403 1.1 simonb #define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD)
404 1.1 simonb #define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD)
405 1.1 simonb #define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD)
406 1.1 simonb
407 1.1 simonb #define S_LDT_TXBUFCNT_NPDATA 12
408 1.1 simonb #define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA)
409 1.1 simonb #define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA)
410 1.1 simonb #define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA)
411 1.1 simonb
412 1.1 simonb #define S_LDT_TXBUFCNT_RCMD 16
413 1.1 simonb #define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD)
414 1.1 simonb #define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD)
415 1.1 simonb #define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD)
416 1.1 simonb
417 1.1 simonb #define S_LDT_TXBUFCNT_RDATA 20
418 1.1 simonb #define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA)
419 1.1 simonb #define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA)
420 1.1 simonb #define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA)
421 1.1 simonb
422 1.1 simonb /*
423 1.1 simonb * Additional Status Register (PASS2)
424 1.1 simonb */
425 1.1 simonb
426 1.1 simonb #define S_LDT_ADDSTATUS_TGTDONE 0
427 1.1 simonb #define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE)
428 1.1 simonb #define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE)
429 1.1 simonb #define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE)
430 1.1 simonb
431 1.1 simonb #endif
432 1.1 simonb
433