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sb1250_ldt.h revision 1.1
      1 /*  *********************************************************************
      2     *  SB1250 Board Support Package
      3     *
      4     *  LDT constants				File: sb1250_ldt.h
      5     *
      6     *  This module contains constants and macros to describe
      7     *  the LDT interface on the SB1250.
      8     *
      9     *  SB1250 specification level:  User's manual 1/02/02
     10     *
     11     *  Author:  Mitch Lichtenberg (mpl (at) broadcom.com)
     12     *
     13     *********************************************************************
     14     *
     15     *  Copyright 2000,2001
     16     *  Broadcom Corporation. All rights reserved.
     17     *
     18     *  This software is furnished under license and may be used and
     19     *  copied only in accordance with the following terms and
     20     *  conditions.  Subject to these conditions, you may download,
     21     *  copy, install, use, modify and distribute modified or unmodified
     22     *  copies of this software in source and/or binary form.  No title
     23     *  or ownership is transferred hereby.
     24     *
     25     *  1) Any source code used, modified or distributed must reproduce
     26     *     and retain this copyright notice and list of conditions as
     27     *     they appear in the source file.
     28     *
     29     *  2) No right is granted to use any trade name, trademark, or
     30     *     logo of Broadcom Corporation. Neither the "Broadcom
     31     *     Corporation" name nor any trademark or logo of Broadcom
     32     *     Corporation may be used to endorse or promote products
     33     *     derived from this software without the prior written
     34     *     permission of Broadcom Corporation.
     35     *
     36     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
     37     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
     38     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
     39     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
     40     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
     41     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
     42     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     43     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
     44     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
     45     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
     46     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
     47     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
     48     *     THE POSSIBILITY OF SUCH DAMAGE.
     49     ********************************************************************* */
     50 
     51 
     52 #ifndef _SB1250_LDT_H
     53 #define _SB1250_LDT_H
     54 
     55 #include "sb1250_defs.h"
     56 
     57 #define K_LDT_VENDOR_SIBYTE	0x166D
     58 #define K_LDT_DEVICE_SB1250	0x0002
     59 
     60 /*
     61  * LDT Interface Type 1 (bridge) configuration header
     62  */
     63 
     64 #define R_LDT_TYPE1_DEVICEID	0x0000
     65 #define R_LDT_TYPE1_CMDSTATUS	0x0004
     66 #define R_LDT_TYPE1_CLASSREV	0x0008
     67 #define R_LDT_TYPE1_DEVHDR	0x000C
     68 #define R_LDT_TYPE1_BAR0	0x0010	/* not used */
     69 #define R_LDT_TYPE1_BAR1	0x0014	/* not used */
     70 
     71 #define R_LDT_TYPE1_BUSID	0x0018	/* bus ID register */
     72 #define R_LDT_TYPE1_SECSTATUS	0x001C	/* secondary status / I/O base/limit */
     73 #define R_LDT_TYPE1_MEMLIMIT	0x0020
     74 #define R_LDT_TYPE1_PREFETCH	0x0024
     75 #define R_LDT_TYPE1_PREF_BASE	0x0028
     76 #define R_LDT_TYPE1_PREF_LIMIT	0x002C
     77 #define R_LDT_TYPE1_IOLIMIT	0x0030
     78 #define R_LDT_TYPE1_CAPPTR	0x0034
     79 #define R_LDT_TYPE1_ROMADDR	0x0038
     80 #define R_LDT_TYPE1_BRCTL	0x003C
     81 #define R_LDT_TYPE1_CMD		0x0040
     82 #define R_LDT_TYPE1_LINKCTRL	0x0044
     83 #define R_LDT_TYPE1_LINKFREQ	0x0048
     84 #define R_LDT_TYPE1_RESERVED1	0x004C
     85 #define R_LDT_TYPE1_SRICMD	0x0050
     86 #define R_LDT_TYPE1_SRITXNUM	0x0054
     87 #define R_LDT_TYPE1_SRIRXNUM	0x0058
     88 #define R_LDT_TYPE1_ERRSTATUS   0x0068
     89 #define R_LDT_TYPE1_SRICTRL	0x006C
     90 #define R_LDT_TYPE1_ADDSTATUS	0x0070		/* PASS2 */
     91 #define R_LDT_TYPE1_TXBUFCNT	0x00C8
     92 #define R_LDT_TYPE1_EXPCRC	0x00DC
     93 #define R_LDT_TYPE1_RXCRC	0x00F0
     94 
     95 
     96 /*
     97  * LDT Device ID register
     98  */
     99 
    100 #define S_LDT_DEVICEID_VENDOR		0
    101 #define M_LDT_DEVICEID_VENDOR		_SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR)
    102 #define V_LDT_DEVICEID_VENDOR(x)	_SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR)
    103 #define G_LDT_DEVICEID_VENDOR(x)	_SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR)
    104 
    105 #define S_LDT_DEVICEID_DEVICEID		16
    106 #define M_LDT_DEVICEID_DEVICEID		_SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID)
    107 #define V_LDT_DEVICEID_DEVICEID(x)	_SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID)
    108 #define G_LDT_DEVICEID_DEVICEID(x)	_SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID)
    109 
    110 
    111 /*
    112  * LDT Command Register (Table 8-13)
    113  */
    114 
    115 #define M_LDT_CMD_IOSPACE_EN		_SB_MAKEMASK1_32(0)
    116 #define M_LDT_CMD_MEMSPACE_EN		_SB_MAKEMASK1_32(1)
    117 #define M_LDT_CMD_MASTER_EN		_SB_MAKEMASK1_32(2)
    118 #define M_LDT_CMD_SPECCYC_EN		_SB_MAKEMASK1_32(3)
    119 #define M_LDT_CMD_MEMWRINV_EN		_SB_MAKEMASK1_32(4)
    120 #define M_LDT_CMD_VGAPALSNP_EN		_SB_MAKEMASK1_32(5)
    121 #define M_LDT_CMD_PARERRRESP		_SB_MAKEMASK1_32(6)
    122 #define M_LDT_CMD_WAITCYCCTRL		_SB_MAKEMASK1_32(7)
    123 #define M_LDT_CMD_SERR_EN		_SB_MAKEMASK1_32(8)
    124 #define M_LDT_CMD_FASTB2B_EN		_SB_MAKEMASK1_32(9)
    125 
    126 /*
    127  * LDT class and revision registers
    128  */
    129 
    130 #define S_LDT_CLASSREV_REV		0
    131 #define M_LDT_CLASSREV_REV		_SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV)
    132 #define V_LDT_CLASSREV_REV(x)		_SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV)
    133 #define G_LDT_CLASSREV_REV(x)		_SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV)
    134 
    135 #define S_LDT_CLASSREV_CLASS		8
    136 #define M_LDT_CLASSREV_CLASS		_SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS)
    137 #define V_LDT_CLASSREV_CLASS(x)		_SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS)
    138 #define G_LDT_CLASSREV_CLASS(x)		_SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS)
    139 
    140 #define K_LDT_REV			0x01
    141 #define K_LDT_CLASS			0x060000
    142 
    143 /*
    144  * Device Header (offset 0x0C)
    145  */
    146 
    147 #define S_LDT_DEVHDR_CLINESZ		0
    148 #define M_LDT_DEVHDR_CLINESZ		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ)
    149 #define V_LDT_DEVHDR_CLINESZ(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ)
    150 #define G_LDT_DEVHDR_CLINESZ(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ)
    151 
    152 #define S_LDT_DEVHDR_LATTMR		8
    153 #define M_LDT_DEVHDR_LATTMR		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR)
    154 #define V_LDT_DEVHDR_LATTMR(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR)
    155 #define G_LDT_DEVHDR_LATTMR(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR)
    156 
    157 #define S_LDT_DEVHDR_HDRTYPE		16
    158 #define M_LDT_DEVHDR_HDRTYPE		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE)
    159 #define V_LDT_DEVHDR_HDRTYPE(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE)
    160 #define G_LDT_DEVHDR_HDRTYPE(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE)
    161 
    162 #define K_LDT_DEVHDR_HDRTYPE_TYPE1	1
    163 
    164 #define S_LDT_DEVHDR_BIST		24
    165 #define M_LDT_DEVHDR_BIST		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST)
    166 #define V_LDT_DEVHDR_BIST(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST)
    167 #define G_LDT_DEVHDR_BIST(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST)
    168 
    169 
    170 
    171 /*
    172  * LDT Status Register (Table 8-14).  Note that these constants
    173  * assume you've read the command and status register
    174  * together (32-bit read at offset 0x04)
    175  *
    176  * These bits also apply to the secondary status
    177  * register (Table 8-15), offset 0x1C
    178  */
    179 
    180 #define M_LDT_STATUS_VGAEN		_SB_MAKEMASK1_32(3)	/* PASS2 */
    181 #define M_LDT_STATUS_CAPLIST		_SB_MAKEMASK1_32(20)
    182 #define M_LDT_STATUS_66MHZCAP		_SB_MAKEMASK1_32(21)
    183 #define M_LDT_STATUS_RESERVED2		_SB_MAKEMASK1_32(22)
    184 #define M_LDT_STATUS_FASTB2BCAP		_SB_MAKEMASK1_32(23)
    185 #define M_LDT_STATUS_MSTRDPARERR	_SB_MAKEMASK1_32(24)
    186 
    187 #define S_LDT_STATUS_DEVSELTIMING	25
    188 #define M_LDT_STATUS_DEVSELTIMING	_SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING)
    189 #define V_LDT_STATUS_DEVSELTIMING(x)	_SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING)
    190 #define G_LDT_STATUS_DEVSELTIMING(x)	_SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING)
    191 
    192 #define M_LDT_STATUS_SIGDTGTABORT	_SB_MAKEMASK1_32(27)
    193 #define M_LDT_STATUS_RCVDTGTABORT	_SB_MAKEMASK1_32(28)
    194 #define M_LDT_STATUS_RCVDMSTRABORT	_SB_MAKEMASK1_32(29)
    195 #define M_LDT_STATUS_SIGDSERR		_SB_MAKEMASK1_32(30)
    196 #define M_LDT_STATUS_DETPARERR		_SB_MAKEMASK1_32(31)
    197 
    198 /*
    199  * Bridge Control Register (Table 8-16).  Note that these
    200  * constants assume you've read the register as a 32-bit
    201  * read (offset 0x3C)
    202  */
    203 
    204 #define M_LDT_BRCTL_PARERRRESP_EN	_SB_MAKEMASK1_32(16)
    205 #define M_LDT_BRCTL_SERR_EN		_SB_MAKEMASK1_32(17)
    206 #define M_LDT_BRCTL_ISA_EN		_SB_MAKEMASK1_32(18)
    207 #define M_LDT_BRCTL_VGA_EN		_SB_MAKEMASK1_32(19)
    208 #define M_LDT_BRCTL_MSTRABORTMODE	_SB_MAKEMASK1_32(21)
    209 #define M_LDT_BRCTL_SECBUSRESET		_SB_MAKEMASK1_32(22)
    210 #define M_LDT_BRCTL_FASTB2B_EN		_SB_MAKEMASK1_32(23)
    211 #define M_LDT_BRCTL_PRIDISCARD		_SB_MAKEMASK1_32(24)
    212 #define M_LDT_BRCTL_SECDISCARD		_SB_MAKEMASK1_32(25)
    213 #define M_LDT_BRCTL_DISCARDSTAT		_SB_MAKEMASK1_32(26)
    214 #define M_LDT_BRCTL_DISCARDSERR_EN	_SB_MAKEMASK1_32(27)
    215 
    216 /*
    217  * LDT Command Register (Table 8-17).  Note that these constants
    218  * assume you've read the command and status register together
    219  * 32-bit read at offset 0x40
    220  */
    221 
    222 #define M_LDT_CMD_WARMRESET		_SB_MAKEMASK1_32(16)
    223 #define M_LDT_CMD_DOUBLEENDED		_SB_MAKEMASK1_32(17)
    224 
    225 #define S_LDT_CMD_CAPTYPE		29
    226 #define M_LDT_CMD_CAPTYPE		_SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE)
    227 #define V_LDT_CMD_CAPTYPE(x)		_SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE)
    228 #define G_LDT_CMD_CAPTYPE(x)		_SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE)
    229 
    230 /*
    231  * LDT link control register (Table 8-18), and (Table 8-19)
    232  */
    233 
    234 #define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN	_SB_MAKEMASK1_32(1)
    235 #define M_LDT_LINKCTRL_CRCSTARTTEST	_SB_MAKEMASK1_32(2)
    236 #define M_LDT_LINKCTRL_CRCFORCEERR	_SB_MAKEMASK1_32(3)
    237 #define M_LDT_LINKCTRL_LINKFAIL		_SB_MAKEMASK1_32(4)
    238 #define M_LDT_LINKCTRL_INITDONE		_SB_MAKEMASK1_32(5)
    239 #define M_LDT_LINKCTRL_EOC		_SB_MAKEMASK1_32(6)
    240 #define M_LDT_LINKCTRL_XMITOFF		_SB_MAKEMASK1_32(7)
    241 
    242 #define S_LDT_LINKCTRL_CRCERR		8
    243 #define M_LDT_LINKCTRL_CRCERR		_SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR)
    244 #define V_LDT_LINKCTRL_CRCERR(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR)
    245 #define G_LDT_LINKCTRL_CRCERR(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR)
    246 
    247 #define S_LDT_LINKCTRL_MAXIN		16
    248 #define M_LDT_LINKCTRL_MAXIN		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN)
    249 #define V_LDT_LINKCTRL_MAXIN(x)		_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN)
    250 #define G_LDT_LINKCTRL_MAXIN(x)		_SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN)
    251 
    252 #define M_LDT_LINKCTRL_DWFCLN		_SB_MAKEMASK1_32(19)
    253 
    254 #define S_LDT_LINKCTRL_MAXOUT		20
    255 #define M_LDT_LINKCTRL_MAXOUT		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT)
    256 #define V_LDT_LINKCTRL_MAXOUT(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT)
    257 #define G_LDT_LINKCTRL_MAXOUT(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT)
    258 
    259 #define M_LDT_LINKCTRL_DWFCOUT		_SB_MAKEMASK1_32(23)
    260 
    261 #define S_LDT_LINKCTRL_WIDTHIN		24
    262 #define M_LDT_LINKCTRL_WIDTHIN		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN)
    263 #define V_LDT_LINKCTRL_WIDTHIN(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN)
    264 #define G_LDT_LINKCTRL_WIDTHIN(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN)
    265 
    266 #define M_LDT_LINKCTRL_DWFCLIN_EN	_SB_MAKEMASK1_32(27)
    267 
    268 #define S_LDT_LINKCTRL_WIDTHOUT		28
    269 #define M_LDT_LINKCTRL_WIDTHOUT		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT)
    270 #define V_LDT_LINKCTRL_WIDTHOUT(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT)
    271 #define G_LDT_LINKCTRL_WIDTHOUT(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT)
    272 
    273 #define M_LDT_LINKCTRL_DWFCOUT_EN	_SB_MAKEMASK1_32(31)
    274 
    275 /*
    276  * LDT Link frequency register  (Table 8-20) offset 0x48
    277  */
    278 
    279 #define S_LDT_LINKFREQ_FREQ		8
    280 #define M_LDT_LINKFREQ_FREQ		_SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ)
    281 #define V_LDT_LINKFREQ_FREQ(x)		_SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ)
    282 #define G_LDT_LINKFREQ_FREQ(x)		_SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ)
    283 
    284 #define K_LDT_LINKFREQ_200MHZ		0
    285 #define K_LDT_LINKFREQ_300MHZ		1
    286 #define K_LDT_LINKFREQ_400MHZ		2
    287 #define K_LDT_LINKFREQ_500MHZ		3
    288 #define K_LDT_LINKFREQ_600MHZ		4
    289 #define K_LDT_LINKFREQ_800MHZ		5
    290 #define K_LDT_LINKFREQ_1000MHZ		6
    291 
    292 /*
    293  * LDT SRI Command Register (Table 8-21).  Note that these constants
    294  * assume you've read the command and status register together
    295  * 32-bit read at offset 0x50
    296  */
    297 
    298 #define M_LDT_SRICMD_SIPREADY		_SB_MAKEMASK1_32(16)
    299 #define M_LDT_SRICMD_SYNCPTRCTL		_SB_MAKEMASK1_32(17)
    300 #define M_LDT_SRICMD_REDUCESYNCZERO	_SB_MAKEMASK1_32(18)
    301 /*#define M_LDT_SRICMD_DISSTARVATIONCNT	_SB_MAKEMASK1_32(19) */ /* PASS1 */
    302 #define M_LDT_SRICMD_DISMULTTXVLD	_SB_MAKEMASK1_32(19)	/* PASS2 */
    303 #define M_LDT_SRICMD_EXPENDIAN		_SB_MAKEMASK1_32(26)	/* PASS2 */
    304 
    305 
    306 #define S_LDT_SRICMD_RXMARGIN		20
    307 #define M_LDT_SRICMD_RXMARGIN		_SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN)
    308 #define V_LDT_SRICMD_RXMARGIN(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN)
    309 #define G_LDT_SRICMD_RXMARGIN(x)	_SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN)
    310 
    311 #define M_LDT_SRICMD_LDTPLLCOMPAT	_SB_MAKEMASK1_32(25)
    312 
    313 #define S_LDT_SRICMD_TXINITIALOFFSET	28
    314 #define M_LDT_SRICMD_TXINITIALOFFSET	_SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET)
    315 #define V_LDT_SRICMD_TXINITIALOFFSET(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET)
    316 #define G_LDT_SRICMD_TXINITIALOFFSET(x)	_SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET)
    317 
    318 #define M_LDT_SRICMD_LINKFREQDIRECT	_SB_MAKEMASK1_32(31)
    319 
    320 /*
    321  * LDT Error control and status register (Table 8-22) (Table 8-23)
    322  */
    323 
    324 #define M_LDT_ERRCTL_PROTFATAL_EN	_SB_MAKEMASK1_32(0)
    325 #define M_LDT_ERRCTL_PROTNONFATAL_EN	_SB_MAKEMASK1_32(1)
    326 #define M_LDT_ERRCTL_PROTSYNCFLOOD_EN	_SB_MAKEMASK1_32(2)
    327 #define M_LDT_ERRCTL_OVFFATAL_EN	_SB_MAKEMASK1_32(3)
    328 #define M_LDT_ERRCTL_OVFNONFATAL_EN	_SB_MAKEMASK1_32(4)
    329 #define M_LDT_ERRCTL_OVFSYNCFLOOD_EN	_SB_MAKEMASK1_32(5)
    330 #define M_LDT_ERRCTL_EOCNXAFATAL_EN	_SB_MAKEMASK1_32(6)
    331 #define M_LDT_ERRCTL_EOCNXANONFATAL_EN	_SB_MAKEMASK1_32(7)
    332 #define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN	_SB_MAKEMASK1_32(8)
    333 #define M_LDT_ERRCTL_CRCFATAL_EN	_SB_MAKEMASK1_32(9)
    334 #define M_LDT_ERRCTL_CRCNONFATAL_EN	_SB_MAKEMASK1_32(10)
    335 #define M_LDT_ERRCTL_SERRFATAL_EN	_SB_MAKEMASK1_32(11)
    336 #define M_LDT_ERRCTL_SRCTAGFATAL_EN	_SB_MAKEMASK1_32(12)
    337 #define M_LDT_ERRCTL_SRCTAGNONFATAL_EN	_SB_MAKEMASK1_32(13)
    338 #define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN	_SB_MAKEMASK1_32(14)
    339 #define M_LDT_ERRCTL_MAPNXAFATAL_EN	_SB_MAKEMASK1_32(15)
    340 #define M_LDT_ERRCTL_MAPNXANONFATAL_EN	_SB_MAKEMASK1_32(16)
    341 #define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN	_SB_MAKEMASK1_32(17)
    342 
    343 #define M_LDT_ERRCTL_PROTOERR		_SB_MAKEMASK1_32(24)
    344 #define M_LDT_ERRCTL_OVFERR		_SB_MAKEMASK1_32(25)
    345 #define M_LDT_ERRCTL_EOCNXAERR		_SB_MAKEMASK1_32(26)
    346 #define M_LDT_ERRCTL_SRCTAGERR		_SB_MAKEMASK1_32(27)
    347 #define M_LDT_ERRCTL_MAPNXAERR		_SB_MAKEMASK1_32(28)
    348 
    349 /*
    350  * SRI Control register (Table 8-24, 8-25)  Offset 0x6C
    351  */
    352 
    353 #define S_LDT_SRICTRL_NEEDRESP		0
    354 #define M_LDT_SRICTRL_NEEDRESP		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP)
    355 #define V_LDT_SRICTRL_NEEDRESP(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP)
    356 #define G_LDT_SRICTRL_NEEDRESP(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP)
    357 
    358 #define S_LDT_SRICTRL_NEEDNPREQ		2
    359 #define M_LDT_SRICTRL_NEEDNPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ)
    360 #define V_LDT_SRICTRL_NEEDNPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ)
    361 #define G_LDT_SRICTRL_NEEDNPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ)
    362 
    363 #define S_LDT_SRICTRL_NEEDPREQ		4
    364 #define M_LDT_SRICTRL_NEEDPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ)
    365 #define V_LDT_SRICTRL_NEEDPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ)
    366 #define G_LDT_SRICTRL_NEEDPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ)
    367 
    368 #define S_LDT_SRICTRL_WANTRESP		8
    369 #define M_LDT_SRICTRL_WANTRESP		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP)
    370 #define V_LDT_SRICTRL_WANTRESP(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP)
    371 #define G_LDT_SRICTRL_WANTRESP(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP)
    372 
    373 #define S_LDT_SRICTRL_WANTNPREQ		10
    374 #define M_LDT_SRICTRL_WANTNPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ)
    375 #define V_LDT_SRICTRL_WANTNPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ)
    376 #define G_LDT_SRICTRL_WANTNPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ)
    377 
    378 #define S_LDT_SRICTRL_WANTPREQ		12
    379 #define M_LDT_SRICTRL_WANTPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ)
    380 #define V_LDT_SRICTRL_WANTPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ)
    381 #define G_LDT_SRICTRL_WANTPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ)
    382 
    383 #define S_LDT_SRICTRL_BUFRELSPACE	16
    384 #define M_LDT_SRICTRL_BUFRELSPACE	_SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE)
    385 #define V_LDT_SRICTRL_BUFRELSPACE(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE)
    386 #define G_LDT_SRICTRL_BUFRELSPACE(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE)
    387 
    388 /*
    389  * LDT SRI Transmit Buffer Count register (Table 8-26)
    390  */
    391 
    392 #define S_LDT_TXBUFCNT_PCMD		0
    393 #define M_LDT_TXBUFCNT_PCMD		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD)
    394 #define V_LDT_TXBUFCNT_PCMD(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD)
    395 #define G_LDT_TXBUFCNT_PCMD(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD)
    396 
    397 #define S_LDT_TXBUFCNT_PDATA		4
    398 #define M_LDT_TXBUFCNT_PDATA		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA)
    399 #define V_LDT_TXBUFCNT_PDATA(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA)
    400 #define G_LDT_TXBUFCNT_PDATA(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA)
    401 
    402 #define S_LDT_TXBUFCNT_NPCMD		8
    403 #define M_LDT_TXBUFCNT_NPCMD		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD)
    404 #define V_LDT_TXBUFCNT_NPCMD(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD)
    405 #define G_LDT_TXBUFCNT_NPCMD(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD)
    406 
    407 #define S_LDT_TXBUFCNT_NPDATA		12
    408 #define M_LDT_TXBUFCNT_NPDATA		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA)
    409 #define V_LDT_TXBUFCNT_NPDATA(x)	_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA)
    410 #define G_LDT_TXBUFCNT_NPDATA(x)	_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA)
    411 
    412 #define S_LDT_TXBUFCNT_RCMD		16
    413 #define M_LDT_TXBUFCNT_RCMD		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD)
    414 #define V_LDT_TXBUFCNT_RCMD(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD)
    415 #define G_LDT_TXBUFCNT_RCMD(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD)
    416 
    417 #define S_LDT_TXBUFCNT_RDATA		20
    418 #define M_LDT_TXBUFCNT_RDATA		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA)
    419 #define V_LDT_TXBUFCNT_RDATA(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA)
    420 #define G_LDT_TXBUFCNT_RDATA(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA)
    421 
    422 /*
    423  * Additional Status Register (PASS2)
    424  */
    425 
    426 #define S_LDT_ADDSTATUS_TGTDONE		0
    427 #define M_LDT_ADDSTATUS_TGTDONE		_SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE)
    428 #define V_LDT_ADDSTATUS_TGTDONE(x)	_SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE)
    429 #define G_LDT_ADDSTATUS_TGTDONE(x)	_SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE)
    430 
    431 #endif
    432 
    433