sb1250_ldt.h revision 1.2 1 /* *********************************************************************
2 * SB1250 Board Support Package
3 *
4 * LDT constants File: sb1250_ldt.h
5 *
6 * This module contains constants and macros to describe
7 * the LDT interface on the SB1250.
8 *
9 * SB1250 specification level: User's manual 1/02/02
10 *
11 * Author: Mitch Lichtenberg (mpl (at) broadcom.com)
12 *
13 *********************************************************************
14 *
15 * Copyright 2000,2001
16 * Broadcom Corporation. All rights reserved.
17 *
18 * This software is furnished under license and may be used and
19 * copied only in accordance with the following terms and
20 * conditions. Subject to these conditions, you may download,
21 * copy, install, use, modify and distribute modified or unmodified
22 * copies of this software in source and/or binary form. No title
23 * or ownership is transferred hereby.
24 *
25 * 1) Any source code used, modified or distributed must reproduce
26 * and retain this copyright notice and list of conditions as
27 * they appear in the source file.
28 *
29 * 2) No right is granted to use any trade name, trademark, or
30 * logo of Broadcom Corporation. Neither the "Broadcom
31 * Corporation" name nor any trademark or logo of Broadcom
32 * Corporation may be used to endorse or promote products
33 * derived from this software without the prior written
34 * permission of Broadcom Corporation.
35 *
36 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
37 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
38 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
39 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
40 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
41 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
42 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
43 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
44 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
45 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
46 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
47 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
48 * THE POSSIBILITY OF SUCH DAMAGE.
49 ********************************************************************* */
50
51
52 #ifndef _SB1250_LDT_H
53 #define _SB1250_LDT_H
54
55 #include "sb1250_defs.h"
56
57 #define K_LDT_VENDOR_SIBYTE 0x166D
58 #define K_LDT_DEVICE_SB1250 0x0002
59
60 /*
61 * LDT Interface Type 1 (bridge) configuration header
62 */
63
64 #define R_LDT_TYPE1_DEVICEID 0x0000
65 #define R_LDT_TYPE1_CMDSTATUS 0x0004
66 #define R_LDT_TYPE1_CLASSREV 0x0008
67 #define R_LDT_TYPE1_DEVHDR 0x000C
68 #define R_LDT_TYPE1_BAR0 0x0010 /* not used */
69 #define R_LDT_TYPE1_BAR1 0x0014 /* not used */
70
71 #define R_LDT_TYPE1_BUSID 0x0018 /* bus ID register */
72 #define R_LDT_TYPE1_SECSTATUS 0x001C /* secondary status / I/O base/limit */
73 #define R_LDT_TYPE1_MEMLIMIT 0x0020
74 #define R_LDT_TYPE1_PREFETCH 0x0024
75 #define R_LDT_TYPE1_PREF_BASE 0x0028
76 #define R_LDT_TYPE1_PREF_LIMIT 0x002C
77 #define R_LDT_TYPE1_IOLIMIT 0x0030
78 #define R_LDT_TYPE1_CAPPTR 0x0034
79 #define R_LDT_TYPE1_ROMADDR 0x0038
80 #define R_LDT_TYPE1_BRCTL 0x003C
81 #define R_LDT_TYPE1_CMD 0x0040
82 #define R_LDT_TYPE1_LINKCTRL 0x0044
83 #define R_LDT_TYPE1_LINKFREQ 0x0048
84 #define R_LDT_TYPE1_RESERVED1 0x004C
85 #define R_LDT_TYPE1_SRICMD 0x0050
86 #define R_LDT_TYPE1_SRITXNUM 0x0054
87 #define R_LDT_TYPE1_SRIRXNUM 0x0058
88 #define R_LDT_TYPE1_ERRSTATUS 0x0068
89 #define R_LDT_TYPE1_SRICTRL 0x006C
90 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
91 #define R_LDT_TYPE1_ADDSTATUS 0x0070
92 #endif /* 1250 PASS2 || 112x PASS1 */
93 #define R_LDT_TYPE1_TXBUFCNT 0x00C8
94 #define R_LDT_TYPE1_EXPCRC 0x00DC
95 #define R_LDT_TYPE1_RXCRC 0x00F0
96
97
98 /*
99 * LDT Device ID register
100 */
101
102 #define S_LDT_DEVICEID_VENDOR 0
103 #define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR)
104 #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR)
105 #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR)
106
107 #define S_LDT_DEVICEID_DEVICEID 16
108 #define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID)
109 #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID)
110 #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID)
111
112
113 /*
114 * LDT Command Register (Table 8-13)
115 */
116
117 #define M_LDT_CMD_IOSPACE_EN _SB_MAKEMASK1_32(0)
118 #define M_LDT_CMD_MEMSPACE_EN _SB_MAKEMASK1_32(1)
119 #define M_LDT_CMD_MASTER_EN _SB_MAKEMASK1_32(2)
120 #define M_LDT_CMD_SPECCYC_EN _SB_MAKEMASK1_32(3)
121 #define M_LDT_CMD_MEMWRINV_EN _SB_MAKEMASK1_32(4)
122 #define M_LDT_CMD_VGAPALSNP_EN _SB_MAKEMASK1_32(5)
123 #define M_LDT_CMD_PARERRRESP _SB_MAKEMASK1_32(6)
124 #define M_LDT_CMD_WAITCYCCTRL _SB_MAKEMASK1_32(7)
125 #define M_LDT_CMD_SERR_EN _SB_MAKEMASK1_32(8)
126 #define M_LDT_CMD_FASTB2B_EN _SB_MAKEMASK1_32(9)
127
128 /*
129 * LDT class and revision registers
130 */
131
132 #define S_LDT_CLASSREV_REV 0
133 #define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV)
134 #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV)
135 #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV)
136
137 #define S_LDT_CLASSREV_CLASS 8
138 #define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS)
139 #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS)
140 #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS)
141
142 #define K_LDT_REV 0x01
143 #define K_LDT_CLASS 0x060000
144
145 /*
146 * Device Header (offset 0x0C)
147 */
148
149 #define S_LDT_DEVHDR_CLINESZ 0
150 #define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ)
151 #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ)
152 #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ)
153
154 #define S_LDT_DEVHDR_LATTMR 8
155 #define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR)
156 #define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR)
157 #define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR)
158
159 #define S_LDT_DEVHDR_HDRTYPE 16
160 #define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE)
161 #define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE)
162 #define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE)
163
164 #define K_LDT_DEVHDR_HDRTYPE_TYPE1 1
165
166 #define S_LDT_DEVHDR_BIST 24
167 #define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST)
168 #define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST)
169 #define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST)
170
171
172
173 /*
174 * LDT Status Register (Table 8-14). Note that these constants
175 * assume you've read the command and status register
176 * together (32-bit read at offset 0x04)
177 *
178 * These bits also apply to the secondary status
179 * register (Table 8-15), offset 0x1C
180 */
181
182 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
183 #define M_LDT_STATUS_VGAEN _SB_MAKEMASK1_32(3)
184 #endif /* 1250 PASS2 || 112x PASS1 */
185 #define M_LDT_STATUS_CAPLIST _SB_MAKEMASK1_32(20)
186 #define M_LDT_STATUS_66MHZCAP _SB_MAKEMASK1_32(21)
187 #define M_LDT_STATUS_RESERVED2 _SB_MAKEMASK1_32(22)
188 #define M_LDT_STATUS_FASTB2BCAP _SB_MAKEMASK1_32(23)
189 #define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24)
190
191 #define S_LDT_STATUS_DEVSELTIMING 25
192 #define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING)
193 #define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING)
194 #define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING)
195
196 #define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27)
197 #define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28)
198 #define M_LDT_STATUS_RCVDMSTRABORT _SB_MAKEMASK1_32(29)
199 #define M_LDT_STATUS_SIGDSERR _SB_MAKEMASK1_32(30)
200 #define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
201
202 /*
203 * Bridge Control Register (Table 8-16). Note that these
204 * constants assume you've read the register as a 32-bit
205 * read (offset 0x3C)
206 */
207
208 #define M_LDT_BRCTL_PARERRRESP_EN _SB_MAKEMASK1_32(16)
209 #define M_LDT_BRCTL_SERR_EN _SB_MAKEMASK1_32(17)
210 #define M_LDT_BRCTL_ISA_EN _SB_MAKEMASK1_32(18)
211 #define M_LDT_BRCTL_VGA_EN _SB_MAKEMASK1_32(19)
212 #define M_LDT_BRCTL_MSTRABORTMODE _SB_MAKEMASK1_32(21)
213 #define M_LDT_BRCTL_SECBUSRESET _SB_MAKEMASK1_32(22)
214 #define M_LDT_BRCTL_FASTB2B_EN _SB_MAKEMASK1_32(23)
215 #define M_LDT_BRCTL_PRIDISCARD _SB_MAKEMASK1_32(24)
216 #define M_LDT_BRCTL_SECDISCARD _SB_MAKEMASK1_32(25)
217 #define M_LDT_BRCTL_DISCARDSTAT _SB_MAKEMASK1_32(26)
218 #define M_LDT_BRCTL_DISCARDSERR_EN _SB_MAKEMASK1_32(27)
219
220 /*
221 * LDT Command Register (Table 8-17). Note that these constants
222 * assume you've read the command and status register together
223 * 32-bit read at offset 0x40
224 */
225
226 #define M_LDT_CMD_WARMRESET _SB_MAKEMASK1_32(16)
227 #define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17)
228
229 #define S_LDT_CMD_CAPTYPE 29
230 #define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE)
231 #define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE)
232 #define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE)
233
234 /*
235 * LDT link control register (Table 8-18), and (Table 8-19)
236 */
237
238 #define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN _SB_MAKEMASK1_32(1)
239 #define M_LDT_LINKCTRL_CRCSTARTTEST _SB_MAKEMASK1_32(2)
240 #define M_LDT_LINKCTRL_CRCFORCEERR _SB_MAKEMASK1_32(3)
241 #define M_LDT_LINKCTRL_LINKFAIL _SB_MAKEMASK1_32(4)
242 #define M_LDT_LINKCTRL_INITDONE _SB_MAKEMASK1_32(5)
243 #define M_LDT_LINKCTRL_EOC _SB_MAKEMASK1_32(6)
244 #define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7)
245
246 #define S_LDT_LINKCTRL_CRCERR 8
247 #define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR)
248 #define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR)
249 #define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR)
250
251 #define S_LDT_LINKCTRL_MAXIN 16
252 #define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN)
253 #define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN)
254 #define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN)
255
256 #define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19)
257
258 #define S_LDT_LINKCTRL_MAXOUT 20
259 #define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT)
260 #define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT)
261 #define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT)
262
263 #define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23)
264
265 #define S_LDT_LINKCTRL_WIDTHIN 24
266 #define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN)
267 #define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN)
268 #define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN)
269
270 #define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27)
271
272 #define S_LDT_LINKCTRL_WIDTHOUT 28
273 #define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT)
274 #define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT)
275 #define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT)
276
277 #define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31)
278
279 /*
280 * LDT Link frequency register (Table 8-20) offset 0x48
281 */
282
283 #define S_LDT_LINKFREQ_FREQ 8
284 #define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ)
285 #define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ)
286 #define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ)
287
288 #define K_LDT_LINKFREQ_200MHZ 0
289 #define K_LDT_LINKFREQ_300MHZ 1
290 #define K_LDT_LINKFREQ_400MHZ 2
291 #define K_LDT_LINKFREQ_500MHZ 3
292 #define K_LDT_LINKFREQ_600MHZ 4
293 #define K_LDT_LINKFREQ_800MHZ 5
294 #define K_LDT_LINKFREQ_1000MHZ 6
295
296 /*
297 * LDT SRI Command Register (Table 8-21). Note that these constants
298 * assume you've read the command and status register together
299 * 32-bit read at offset 0x50
300 */
301
302 #define M_LDT_SRICMD_SIPREADY _SB_MAKEMASK1_32(16)
303 #define M_LDT_SRICMD_SYNCPTRCTL _SB_MAKEMASK1_32(17)
304 #define M_LDT_SRICMD_REDUCESYNCZERO _SB_MAKEMASK1_32(18)
305 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
306 #define M_LDT_SRICMD_DISSTARVATIONCNT _SB_MAKEMASK1_32(19) /* PASS1 */
307 #endif /* up to 1250 PASS1 */
308 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
309 #define M_LDT_SRICMD_DISMULTTXVLD _SB_MAKEMASK1_32(19)
310 #define M_LDT_SRICMD_EXPENDIAN _SB_MAKEMASK1_32(26)
311 #endif /* 1250 PASS2 || 112x PASS1 */
312
313
314 #define S_LDT_SRICMD_RXMARGIN 20
315 #define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN)
316 #define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN)
317 #define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN)
318
319 #define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25)
320
321 #define S_LDT_SRICMD_TXINITIALOFFSET 28
322 #define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET)
323 #define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET)
324 #define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET)
325
326 #define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31)
327
328 /*
329 * LDT Error control and status register (Table 8-22) (Table 8-23)
330 */
331
332 #define M_LDT_ERRCTL_PROTFATAL_EN _SB_MAKEMASK1_32(0)
333 #define M_LDT_ERRCTL_PROTNONFATAL_EN _SB_MAKEMASK1_32(1)
334 #define M_LDT_ERRCTL_PROTSYNCFLOOD_EN _SB_MAKEMASK1_32(2)
335 #define M_LDT_ERRCTL_OVFFATAL_EN _SB_MAKEMASK1_32(3)
336 #define M_LDT_ERRCTL_OVFNONFATAL_EN _SB_MAKEMASK1_32(4)
337 #define M_LDT_ERRCTL_OVFSYNCFLOOD_EN _SB_MAKEMASK1_32(5)
338 #define M_LDT_ERRCTL_EOCNXAFATAL_EN _SB_MAKEMASK1_32(6)
339 #define M_LDT_ERRCTL_EOCNXANONFATAL_EN _SB_MAKEMASK1_32(7)
340 #define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN _SB_MAKEMASK1_32(8)
341 #define M_LDT_ERRCTL_CRCFATAL_EN _SB_MAKEMASK1_32(9)
342 #define M_LDT_ERRCTL_CRCNONFATAL_EN _SB_MAKEMASK1_32(10)
343 #define M_LDT_ERRCTL_SERRFATAL_EN _SB_MAKEMASK1_32(11)
344 #define M_LDT_ERRCTL_SRCTAGFATAL_EN _SB_MAKEMASK1_32(12)
345 #define M_LDT_ERRCTL_SRCTAGNONFATAL_EN _SB_MAKEMASK1_32(13)
346 #define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN _SB_MAKEMASK1_32(14)
347 #define M_LDT_ERRCTL_MAPNXAFATAL_EN _SB_MAKEMASK1_32(15)
348 #define M_LDT_ERRCTL_MAPNXANONFATAL_EN _SB_MAKEMASK1_32(16)
349 #define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN _SB_MAKEMASK1_32(17)
350
351 #define M_LDT_ERRCTL_PROTOERR _SB_MAKEMASK1_32(24)
352 #define M_LDT_ERRCTL_OVFERR _SB_MAKEMASK1_32(25)
353 #define M_LDT_ERRCTL_EOCNXAERR _SB_MAKEMASK1_32(26)
354 #define M_LDT_ERRCTL_SRCTAGERR _SB_MAKEMASK1_32(27)
355 #define M_LDT_ERRCTL_MAPNXAERR _SB_MAKEMASK1_32(28)
356
357 /*
358 * SRI Control register (Table 8-24, 8-25) Offset 0x6C
359 */
360
361 #define S_LDT_SRICTRL_NEEDRESP 0
362 #define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP)
363 #define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP)
364 #define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP)
365
366 #define S_LDT_SRICTRL_NEEDNPREQ 2
367 #define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ)
368 #define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ)
369 #define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ)
370
371 #define S_LDT_SRICTRL_NEEDPREQ 4
372 #define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ)
373 #define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ)
374 #define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ)
375
376 #define S_LDT_SRICTRL_WANTRESP 8
377 #define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP)
378 #define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP)
379 #define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP)
380
381 #define S_LDT_SRICTRL_WANTNPREQ 10
382 #define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ)
383 #define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ)
384 #define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ)
385
386 #define S_LDT_SRICTRL_WANTPREQ 12
387 #define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ)
388 #define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ)
389 #define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ)
390
391 #define S_LDT_SRICTRL_BUFRELSPACE 16
392 #define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE)
393 #define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE)
394 #define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE)
395
396 /*
397 * LDT SRI Transmit Buffer Count register (Table 8-26)
398 */
399
400 #define S_LDT_TXBUFCNT_PCMD 0
401 #define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD)
402 #define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD)
403 #define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD)
404
405 #define S_LDT_TXBUFCNT_PDATA 4
406 #define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA)
407 #define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA)
408 #define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA)
409
410 #define S_LDT_TXBUFCNT_NPCMD 8
411 #define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD)
412 #define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD)
413 #define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD)
414
415 #define S_LDT_TXBUFCNT_NPDATA 12
416 #define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA)
417 #define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA)
418 #define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA)
419
420 #define S_LDT_TXBUFCNT_RCMD 16
421 #define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD)
422 #define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD)
423 #define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD)
424
425 #define S_LDT_TXBUFCNT_RDATA 20
426 #define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA)
427 #define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA)
428 #define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA)
429
430 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
431 /*
432 * Additional Status Register
433 */
434
435 #define S_LDT_ADDSTATUS_TGTDONE 0
436 #define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE)
437 #define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE)
438 #define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE)
439 #endif /* 1250 PASS2 || 112x PASS1 */
440
441 #endif
442
443